Simplify DMA matching a bit.

This commit is contained in:
Dario Nieuwenhuis 2024-04-29 18:30:50 +02:00
parent 706b07e020
commit a51bae6042
2 changed files with 41 additions and 37 deletions

View File

@ -1267,69 +1267,73 @@ fn process_core(
let mut peripherals: Vec<_> = peripherals.into_values().collect(); let mut peripherals: Vec<_> = peripherals.into_values().collect();
peripherals.sort_by_key(|x| x.name.clone()); peripherals.sort_by_key(|x| x.name.clone());
// Collect DMA versions in the chip // Collect DMA versions in the chip
let mut chip_dmas: Vec<_> = group let mut dmas: Vec<_> = group
.ips .ips
.values() .values()
.filter_map(|ip| { .filter_map(|ip| {
let version = &ip.version; let version = &ip.version;
let sort = match ip.name.as_str() { let instance = &ip.instance_name;
"DMA" => 1, if let Some(dma) = dma_channels
"BDMA" => 2, .0
"BDMA1" => 3, .get(version)
"BDMA2" => 4, .or_else(|| dma_channels.0.get(&format!("{version}:{instance}")))
"GPDMA" => 5, {
_ => 0, Some((ip.name.clone(), instance.clone(), dma))
};
if sort > 0 && dma_channels.0.contains_key(version) {
Some((sort, version.clone()))
} else { } else {
None None
} }
}) })
.collect(); .collect();
chip_dmas.sort(); dmas.sort_by_key(|(name, instance, _)| {
chip_dmas.dedup(); (
let chip_dmas: Vec<_> = chip_dmas.into_iter().map(|(_sort, version)| version).collect(); match name.as_str() {
// Process DMA channels "DMA" => 1,
let chs = chip_dmas "BDMA" => 2,
.iter() "BDMA1" => 3,
.flat_map(|dma| dma_channels.0.get(dma).unwrap().channels.clone()); "BDMA2" => 4,
"GPDMA" => 5,
"HPDMA" => 6,
_ => 0,
},
instance.clone(),
)
});
// The dma_channels[xx] is generic for multiple chips. The current chip may have less DMAs, // The dma_channels[xx] is generic for multiple chips. The current chip may have less DMAs,
// so we have to filter it. // so we have to filter it.
let chs: Vec<_> = chs.filter(|ch| have_peris.contains(&ch.dma)).collect(); let dma_channels = dmas
let core_dma_channels = chs.clone(); .iter()
let have_chs: HashSet<_> = chs.into_iter().collect(); .flat_map(|(_, _, dma)| dma.channels.clone())
.filter(|ch| have_peris.contains(&ch.dma))
.collect::<Vec<_>>();
let have_chs: HashSet<_> = dma_channels.iter().map(|ch| ch.name.clone()).collect();
// Process peripheral - DMA channel associations // Process peripheral - DMA channel associations
for p in &mut peripherals { for p in &mut peripherals {
let mut chs = Vec::new(); let mut chs = Vec::new();
for dma in &chip_dmas { for (_, _, dma) in &dmas {
if let Some(peri_chs) = dma_channels.0.get(dma).unwrap().peripherals.get(&p.name) { if let Some(peri_chs) = dma.peripherals.get(&p.name) {
chs.extend( chs.extend(
peri_chs peri_chs
.iter() .iter()
.filter(|ch| { .filter(|ch| match &ch.channel {
if let Some(ch_channel) = &ch.channel { None => true,
have_chs.iter().any(|x| &x.name == ch_channel) Some(channel) => have_chs.contains(channel),
} else {
true
}
}) })
.cloned(), .cloned(),
); );
} }
} }
if !chs.is_empty() {
chs.sort_by_key(|ch| (ch.channel.clone(), ch.dmamux.clone(), ch.request)); chs.sort_by_key(|ch| (ch.channel.clone(), ch.dmamux.clone(), ch.request));
p.dma_channels = chs; p.dma_channels = chs;
} }
}
let mut core = stm32_data_serde::chip::Core { let mut core = stm32_data_serde::chip::Core {
name: core_name.clone(), name: core_name.clone(),
peripherals, peripherals,
nvic_priority_bits: None, nvic_priority_bits: None,
interrupts: vec![], interrupts: vec![],
dma_channels: core_dma_channels, dma_channels,
}; };
chip_interrupts.process(&mut core, chip_name, h, group); chip_interrupts.process(&mut core, chip_name, h, group);

View File

@ -296,7 +296,7 @@ impl DmaChannels {
// GPDMA // GPDMA
for (file, gpdmax, instance, count, count_2d) in [ for (file, instance, version, count, count_2d) in [
("H5_GPDMA.yaml", "GPDMA1", "STM32H5_dma3_Cube", 8, 2), ("H5_GPDMA.yaml", "GPDMA1", "STM32H5_dma3_Cube", 8, 2),
("H5_GPDMA.yaml", "GPDMA2", "Instance2_STM32H5_dma3_Cube", 8, 2), ("H5_GPDMA.yaml", "GPDMA2", "Instance2_STM32H5_dma3_Cube", 8, 2),
("U5_GPDMA1.yaml", "GPDMA1", "STM32U5_dma3_Cube", 16, 4), ("U5_GPDMA1.yaml", "GPDMA1", "STM32U5_dma3_Cube", 16, 4),
@ -326,7 +326,7 @@ impl DmaChannels {
.or_default() .or_default()
.push(stm32_data_serde::chip::core::peripheral::DmaChannel { .push(stm32_data_serde::chip::core::peripheral::DmaChannel {
signal: request.to_string(), signal: request.to_string(),
dma: Some(gpdmax.to_string()), dma: Some(instance.to_string()),
channel: None, channel: None,
dmamux: None, dmamux: None,
request: Some(request_num), request: Some(request_num),
@ -335,8 +335,8 @@ impl DmaChannels {
for i in 0..count { for i in 0..count {
chip_dma.channels.push(stm32_data_serde::chip::core::DmaChannels { chip_dma.channels.push(stm32_data_serde::chip::core::DmaChannels {
name: format!("{gpdmax}_CH{i}"), name: format!("{instance}_CH{i}"),
dma: gpdmax.to_string(), dma: instance.to_string(),
channel: i, channel: i,
dmamux: None, dmamux: None,
dmamux_channel: None, dmamux_channel: None,
@ -344,7 +344,7 @@ impl DmaChannels {
}); });
} }
dma_channels.insert(instance.to_string(), chip_dma); dma_channels.insert(format!("{version}:{instance}"), chip_dma);
} }
Ok(Self(dma_channels)) Ok(Self(dma_channels))