From a4892a4f77bc7816df9703710647098f92949a2f Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 11 Jan 2023 17:49:19 +0100 Subject: [PATCH] pwr_u5: cleanup enums. --- data/registers/pwr_u5.yaml | 406 ++++++++----------------------------- 1 file changed, 83 insertions(+), 323 deletions(-) diff --git a/data/registers/pwr_u5.yaml b/data/registers/pwr_u5.yaml index f675be9..c118bb1 100644 --- a/data/registers/pwr_u5.yaml +++ b/data/registers/pwr_u5.yaml @@ -148,7 +148,7 @@ fieldset/CR1: description: PWR control register 1 fields: - name: LPMS - description: "Low-power mode selection\r These bits select the low-power mode entered when the CPU enters the Deepsleep mode.\r 10x: Standby mode (Standby mode also entered if LPMS = 11X in CR1\r with BREN = 1 in BDCR1)\r 11x: Shutdown mode if BREN = 0 in BDCR1" + description: "Low-power mode selection\r These bits select the low-power mode entered when the CPU enters the Deepsleep mode.\r 10x: Standby mode (Standby mode also entered if LPMS=11X in CR1\r with BREN=1 in BDCR1)\r 11x: Shutdown mode if BREN = 0 in BDCR1" bit_offset: 0 bit_size: 3 enum: LPMS @@ -193,57 +193,57 @@ fieldset/CR2: description: "SRAM1 page 1 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 0 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM1PDS2 description: "SRAM1 page 2 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 1 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM1PDS3 description: "SRAM1 page 3 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 2 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM2PDS1 description: "SRAM2 page 1 (8 Kbytes) power-down in Stop modes (Stop 0, 1, 2)\r Note: The SRAM2 page 1 retention in Stop 3 is controlled by RRSB1 bit in CR1." bit_offset: 4 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM2PDS2 description: "SRAM2 page 2 (56 Kbytes) power-down in Stop modes (Stop 0, 1, 2)\r Note: The SRAM2 page 2 retention in Stop 3 is controlled by RRSB2 bit in CR1." bit_offset: 5 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM4PDS description: "SRAM4 power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 6 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: ICRAMPDS description: "ICACHE SRAM power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 8 bit_size: 1 - enum: ICRAMPDS + enum: PDS - name: DC1RAMPDS description: "DCACHE1 SRAM power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 9 bit_size: 1 - enum: DCRAMPDS + enum: PDS - name: DMA2DRAMPDS description: "DMA2D SRAM power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 10 bit_size: 1 - enum: DMADRAMPDS + enum: PDS - name: PRAMPDS - description: "FMAC, FDCAN and USB peripherals SRAM power-down in Stop modes (Stop 0, 1, 2, 3)" + description: "FMAC, FDCAN and USB peripherals SRAM power-down in Stop modes (Stop0,1,2,3)" bit_offset: 11 bit_size: 1 - enum: PRAMPDS + enum: PDS - name: PKARAMPDS description: PKA SRAM power-down bit_offset: 12 bit_size: 1 - enum: PKARAMPDS + enum: PDS - name: SRAM4FWU description: "SRAM4 fast wakeup from Stop 0, Stop 1 and Stop 2 modes\r This bit is used to obtain the best trade-off between low-power consumption and wakeup time. SRAM4 wakeup time increases the wakeup time when exiting Stop 0, 1 and 2 modes, and also increases the LPDMA access time to SRAM4 during Stop modes." bit_offset: 13 @@ -258,47 +258,46 @@ fieldset/CR2: description: "SRAM3 page 1 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 16 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM3PDS2 description: "SRAM3 page 2 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 17 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM3PDS3 description: "SRAM3 page 3 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 18 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM3PDS4 description: "SRAM3 page 4 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 19 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM3PDS5 description: "SRAM3 page 5 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 20 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM3PDS6 description: "SRAM3 page 6 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 21 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM3PDS7 description: "SRAM3 page 7 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 22 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRAM3PDS8 description: "SRAM3 page 8 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)" bit_offset: 23 bit_size: 1 - enum: SRAMPDS + enum: PDS - name: SRDRUN description: SmartRun domain in Run mode bit_offset: 31 bit_size: 1 - enum: SRDRUN fieldset/CR3: description: PWR control register 3 fields: @@ -336,12 +335,12 @@ fieldset/PRIVCFGR: description: "PWR secure functions privilege configuration\r This bit is set and reset by software. It can be written only by a secure privileged access." bit_offset: 0 bit_size: 1 - enum: SPRIV + enum: PRIV - name: NSPRIV description: "PWR non-secure functions privilege configuration\r This bit is set and reset by software. It can be written only by privileged access, secure or non-secure." bit_offset: 1 bit_size: 1 - enum: NSPRIV + enum: PRIV fieldset/SECCFGR: description: PWR security configuration register fields: @@ -349,79 +348,77 @@ fieldset/SECCFGR: description: WUP1 secure protection bit_offset: 0 bit_size: 1 - enum: WUPSEC + enum: SEC - name: WUP2SEC description: WUP2 secure protection bit_offset: 1 bit_size: 1 - enum: WUPSEC + enum: SEC - name: WUP3SEC description: WUP3 secure protection bit_offset: 2 bit_size: 1 - enum: WUPSEC + enum: SEC - name: WUP4SEC description: WUP4 secure protection bit_offset: 3 bit_size: 1 - enum: WUPSEC + enum: SEC - name: WUP5SEC description: WUP5 secure protection bit_offset: 4 bit_size: 1 - enum: WUPSEC + enum: SEC - name: WUP6SEC description: WUP6 secure protection bit_offset: 5 bit_size: 1 - enum: WUPSEC + enum: SEC - name: WUP7SEC description: WUP7 secure protection bit_offset: 6 bit_size: 1 - enum: WUPSEC + enum: SEC - name: WUP8SEC description: WUP8 secure protection bit_offset: 7 bit_size: 1 - enum: WUPSEC + enum: SEC - name: LPMSEC description: Low-power modes secure protection bit_offset: 12 bit_size: 1 - enum: LPMSEC + enum: SEC - name: VDMSEC description: Voltage detection and monitoring secure protection bit_offset: 13 bit_size: 1 - enum: VDMSEC + enum: SEC - name: VBSEC description: Backup domain secure protection bit_offset: 14 bit_size: 1 - enum: VBSEC + enum: SEC - name: APCSEC description: Pull-up/pull-down secure protection bit_offset: 15 bit_size: 1 - enum: APCSEC + enum: SEC fieldset/SR: description: PWR status register fields: - name: CSSF - description: "Clear Stop and Standby flags\r This bit is protected against non-secure access when LPMSEC = 1 in SECCFGR.\r This bit is protected against unprivileged access when LPMSEC = 1 and SPRIV = 1 in PRIVCFGR, or when LPMSEC = 0 and NSPRIV = 1.\r Writing 1 to this bit clears the STOPF and SBF flags." + description: "Clear Stop and Standby flags\r This bit is protected against non-secure access when LPMSEC=1 in SECCFGR.\r This bit is protected against unprivileged access when LPMSEC=1 and SPRIV=1 in PRIVCFGR, or when LPMSEC=0 and NSPRIV=1.\r Writing 1 to this bit clears the STOPF and SBF flags." bit_offset: 0 bit_size: 1 - name: STOPF description: "Stop flag\r This bit is set by hardware when the device enters a Stop mode, and is cleared by software by writing 1 to the CSSF bit." bit_offset: 1 bit_size: 1 - enum: STOPF - name: SBF description: "Standby flag\r This bit is set by hardware when the device enters the Standby mode, and is cleared by writing 1 to the CSSF bit, or by a power-on reset. It is not cleared by the system reset." bit_offset: 2 bit_size: 1 - enum: SBF fieldset/SVMCR: description: PWR supply voltage monitoring control register fields: @@ -429,7 +426,6 @@ fieldset/SVMCR: description: Power voltage detector enable bit_offset: 4 bit_size: 1 - enum: PVDE - name: PVDLS description: "Power voltage detector level selection\r These bits select the voltage threshold detected by the power voltage detector:" bit_offset: 5 @@ -444,35 +440,32 @@ fieldset/SVMCR: bit_offset: 25 bit_size: 1 - name: AVM1EN - description: VDDA independent analog supply voltage monitor 1 enable (1.6 V threshold) + description: VDDA independent analog supply voltage monitor 1 enable (1.6V threshold) bit_offset: 26 bit_size: 1 - name: AVM2EN - description: VDDA independent analog supply voltage monitor 2 enable (1.8 V threshold) + description: VDDA independent analog supply voltage monitor 2 enable (1.8V threshold) bit_offset: 27 bit_size: 1 - name: USV description: VDDUSB independent USB supply valid bit_offset: 28 bit_size: 1 - enum: USV - name: IO2SV description: "VDDIO2 independent I/Os supply valid\r This bit is used to validate the VDDIO2 supply for electrical and logical isolation purpose.\r Setting this bit is mandatory to use PG[15:2]. If VDDIO2 is not always present in the application, the VDDIO2 voltage monitor can be used to determine whether this supply is ready or not." bit_offset: 29 bit_size: 1 - enum: IOSV - name: ASV description: VDDA independent analog supply valid bit_offset: 30 bit_size: 1 - enum: ASV fieldset/SVMSR: fields: - name: REGS description: Regulator selection bit_offset: 1 bit_size: 1 - enum: REGS + enum: REGSEL - name: PVDO description: VDD voltage detector output bit_offset: 4 @@ -482,7 +475,6 @@ fieldset/SVMSR: description: Voltage level ready for currently used VOS bit_offset: 15 bit_size: 1 - enum: ACTVOSRDY - name: ACTVOS description: "VOS currently applied to VCORE\r This field provides the last VOS value." bit_offset: 16 @@ -492,22 +484,18 @@ fieldset/SVMSR: description: VDDUSB ready bit_offset: 24 bit_size: 1 - enum: VDDUSBRDY - name: VDDIO2RDY description: VDDIO2 ready bit_offset: 25 bit_size: 1 - enum: VDDIORDY - name: VDDA1RDY description: VDDA ready versus 1.6V voltage monitor bit_offset: 26 bit_size: 1 - enum: VDDARDY - name: VDDA2RDY - description: VDDA ready versus 1.8 V voltage monitor + description: VDDA ready versus 1.8V voltage monitor bit_offset: 27 bit_size: 1 - enum: VDDARDY fieldset/UCPDR: description: PWR USB Type-C™ and Power Delivery register fields: @@ -515,7 +503,6 @@ fieldset/UCPDR: description: "UCPD dead battery disable\r After exiting reset, the USB Type-C “dead battery” behavior is enabled, which may have a pull-down effect on CC1 and CC2 pins. It is recommended to disable it in all cases, either to stop this pull-down or to handover control to the UCPD (the UCPD must be initialized before doing the disable)." bit_offset: 0 bit_size: 1 - enum: UCPD_DBDIS - name: UCPD_STBY description: "UCPD Standby mode\r When set, this bit is used to memorize the UCPD configuration in Standby mode.\r This bit must be written to 1 just before entering Standby mode when using UCPD.\r It must be written to 0 after exiting the Standby mode and before writing any UCPD registers." bit_offset: 1 @@ -527,14 +514,12 @@ fieldset/VOSR: description: "EPOD booster ready\r This bit is set to 1 by hardware when the power booster startup time is reached. The system clock frequency can be switched higher than 50 MHz only after this bit is set." bit_offset: 14 bit_size: 1 - enum: BOOSTRDY - name: VOSRDY description: Ready bit for VCORE voltage scaling output selection bit_offset: 15 bit_size: 1 - enum: VOSRDY - name: VOS - description: "Voltage scaling range selection\r This field is protected against non-secure access when SYSCLKSEC = 1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC = 1 in RCC_SECCFGR and SPRIV = 1 in PRIVCFGR, or when SYSCLKSEC = 0 and NSPRIV = 1." + description: "Voltage scaling range selection\r This field is protected against non-secure access when SYSCLKSEC=1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC=1 in RCC_SECCFGR and SPRIV=1 in PRIVCFGR, or when SYSCLKSEC=0 and NSPRIV=1." bit_offset: 16 bit_size: 2 enum: VOS @@ -616,7 +601,7 @@ fieldset/WUCR2: bit_size: 1 enum: WUPP - name: WUPP8 - description: "Wakeup pin WKUP8 polarity\r This bit must be configured when WUPEN8 = 0." + description: "Wakeup pin WKUP8 polarity\r This bit must be configured when WUPEN8=0." bit_offset: 7 bit_size: 1 enum: WUPP @@ -702,202 +687,103 @@ fieldset/WUSR: description: PWR wakeup status register fields: - name: WUF1 - description: "Wakeup flag 1\r This bit is set when a wakeup event is detected on WKUP1 pin. This bit is cleared by writing 1 in the CWUF1 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN1 = 0." + description: "Wakeup flag 1\r This bit is set when a wakeup event is detected on WKUP1 pin. This bit is cleared by writing 1 in the CWUF1 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN1=0." bit_offset: 0 bit_size: 1 - name: WUF2 - description: "Wakeup flag 2\r This bit is set when a wakeup event is detected on WKUP2 pin. This bit is cleared by writing 1 in the CWUF2 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN2 = 0." + description: "Wakeup flag 2\r This bit is set when a wakeup event is detected on WKUP2 pin. This bit is cleared by writing 1 in the CWUF2 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN2=0." bit_offset: 1 bit_size: 1 - name: WUF3 - description: "Wakeup flag 3\r This bit is set when a wakeup event is detected on WKUP3 pin. This bit is cleared by writing 1 in the CWUF3 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN3 = 0." + description: "Wakeup flag 3\r This bit is set when a wakeup event is detected on WKUP3 pin. This bit is cleared by writing 1 in the CWUF3 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN3=0." bit_offset: 2 bit_size: 1 - name: WUF4 - description: "Wakeup flag 4\r This bit is set when a wakeup event is detected on WKUP4 pin. This bit is cleared by writing 1 in the CWUF4 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN4 = 0." + description: "Wakeup flag 4\r This bit is set when a wakeup event is detected on WKUP4 pin. This bit is cleared by writing 1 in the CWUF4 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN4=0." bit_offset: 3 bit_size: 1 - name: WUF5 - description: "Wakeup flag 5\r This bit is set when a wakeup event is detected on WKUP5 pin. This bit is cleared by writing 1 in the CWUF5 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN5 = 0." + description: "Wakeup flag 5\r This bit is set when a wakeup event is detected on WKUP5 pin. This bit is cleared by writing 1 in the CWUF5 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN5=0." bit_offset: 4 bit_size: 1 - name: WUF6 - description: "Wakeup flag 6\r This bit is set when a wakeup event is detected on WKUP6 pin. This bit is cleared by writing 1 in the CWUF6 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN6 = 0.\r If WUSEL = 11, this bit is cleared by hardware when all internal wakeup source are cleared." + description: "Wakeup flag 6\r This bit is set when a wakeup event is detected on WKUP6 pin. This bit is cleared by writing 1 in the CWUF6 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN6=0.\r If WUSEL=11, this bit is cleared by hardware when all internal wakeup source are cleared." bit_offset: 5 bit_size: 1 - name: WUF7 - description: "Wakeup flag 7\r This bit is set when a wakeup event is detected on WKUP7 pin. This bit is cleared by writing 1 in the CWUF7 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN7 = 0.\r If WUSEL = 11, this bit is cleared by hardware when all internal wakeup source are cleared." + description: "Wakeup flag 7\r This bit is set when a wakeup event is detected on WKUP7 pin. This bit is cleared by writing 1 in the CWUF7 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN7=0.\r If WUSEL=11, this bit is cleared by hardware when all internal wakeup source are cleared." bit_offset: 6 bit_size: 1 - name: WUF8 - description: "Wakeup flag 8\r This bit is set when a wakeup event is detected on WKUP8 pin. This bit is cleared by writing 1 in the CWUF8 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN8 = 0.\r If WUSEL = 11, this bit is cleared by hardware when all internal wakeup source are cleared." + description: "Wakeup flag 8\r This bit is set when a wakeup event is detected on WKUP8 pin. This bit is cleared by writing 1 in the CWUF8 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN8=0.\r If WUSEL=11, this bit is cleared by hardware when all internal wakeup source are cleared." bit_offset: 7 bit_size: 1 enum/ACTVOS: bit_size: 2 variants: - - name: B_0x0 + - name: Range4 description: Range 4 (lowest power) value: 0 - - name: B_0x1 + - name: Range3 description: Range 3 value: 1 - - name: B_0x2 + - name: Range2 description: Range 2 value: 2 - - name: B_0x3 + - name: Range1 description: Range 1 (highest frequency) value: 3 -enum/ACTVOSRDY: - bit_size: 1 - variants: - - name: B_0x0 - description: "VCORE is above or below the current voltage scaling provided by ACTVOS[1:0]." - value: 0 - - name: B_0x1 - description: "VCORE is equal to the current voltage scaling provided by ACTVOS[1:0]" - value: 1 -enum/APCSEC: - bit_size: 1 - variants: - - name: B_0x0 - description: APCR can be read and written with secure or non-secure access. - value: 0 - - name: B_0x1 - description: APCR can be read and written only with secure access. - value: 1 -enum/ASV: - bit_size: 1 - variants: - - name: B_0x0 - description: "VDDA not present: logical and electrical isolation is applied to ignore this supply." - value: 0 - - name: B_0x1 - description: VDDA valid - value: 1 -enum/BOOSTRDY: - bit_size: 1 - variants: - - name: B_0x0 - description: Power booster not ready - value: 0 - - name: B_0x1 - description: Power booster ready - value: 1 enum/DBP: bit_size: 1 variants: - - name: B_0x0 + - name: Disabled description: Write access to Backup domain disabled value: 0 - - name: B_0x1 + - name: Enabled description: Write access to Backup domain enabled value: 1 -enum/DCRAMPDS: - bit_size: 1 - variants: - - name: B_0x0 - description: DCACHE1 SRAM content retained in Stop modes - value: 0 - - name: B_0x1 - description: DCACHE1 SRAM content lost in Stop modes - value: 1 -enum/DMADRAMPDS: - bit_size: 1 - variants: - - name: B_0x0 - description: DMA2D SRAM content retained in Stop modes - value: 0 - - name: B_0x1 - description: DMA2D SRAM content lost in Stop modes - value: 1 enum/FLASHFWU: bit_size: 1 variants: - - name: B_0x0 + - name: LowPower description: Flash memory enters low-power mode in Stop 0 and Stop 1 modes (lower-power consumption). value: 0 - - name: B_0x1 + - name: Normal description: Flash memory remains in normal mode in Stop 0 and Stop 1 modes (faster wakeup time). value: 1 -enum/ICRAMPDS: - bit_size: 1 - variants: - - name: B_0x0 - description: ICACHE SRAM content retained in Stop modes - value: 0 - - name: B_0x1 - description: ICACHE SRAM content lost in Stop modes - value: 1 -enum/IOSV: - bit_size: 1 - variants: - - name: B_0x0 - description: "VDDIO2 not present: logical and electrical isolation is applied to ignore this supply." - value: 0 - - name: B_0x1 - description: VDDIO2 valid - value: 1 enum/LPMS: bit_size: 3 variants: - - name: B_0x0 + - name: Stop0 description: Stop 0 mode value: 0 - - name: B_0x1 + - name: Stop1 description: Stop 1 mode value: 1 - - name: B_0x2 + - name: Stop2 description: Stop 2 mode value: 2 - - name: B_0x3 + - name: Stop3 description: Stop 3 mode value: 3 -enum/LPMSEC: +enum/PDS: bit_size: 1 variants: - - name: B_0x0 - description: "CR1, CR2 and CSSF in the SR can be read and written with secure or non-secure access." + - name: Retained + description: Content retained in Stop modes value: 0 - - name: B_0x1 - description: "CR1, CR2, and CSSF in the SR can be read and written only with secure access." + - name: Lost + description: Content lost in Stop modes value: 1 -enum/NSPRIV: +enum/PRIV: bit_size: 1 variants: - - name: B_0x0 + - name: Unprivileged description: Read and write to PWR non-secure functions can be done by privileged or unprivileged access. value: 0 - - name: B_0x1 + - name: Privileged description: Read and write to PWR non-secure functions can be done by privileged access only. value: 1 -enum/PKARAMPDS: - bit_size: 1 - variants: - - name: B_0x0 - description: PKA SRAM content retained in Stop modes - value: 0 - - name: B_0x1 - description: PKA SRAM content lost in Stop modes - value: 1 -enum/PRAMPDS: - bit_size: 1 - variants: - - name: B_0x0 - description: "FMAC, FDCAN and USB peripherals SRAM content retained in Stop modes" - value: 0 - - name: B_0x1 - description: "FMAC, FDCAN and USB peripherals SRAM content lost in Stop modes" - value: 1 -enum/PVDE: - bit_size: 1 - variants: - - name: B_0x0 - description: Power voltage detector disabled - value: 0 - - name: B_0x1 - description: Power voltage detector enabled - value: 1 enum/PVDLS: bit_size: 3 variants: @@ -928,56 +814,38 @@ enum/PVDLS: enum/PVDO: bit_size: 1 variants: - - name: B_0x0 + - name: AboveOrEqual description: "VDD is equal or above the PVD threshold selected by PVDLS[2:0]." value: 0 - - name: B_0x1 + - name: Below description: "VDD is below the PVD threshold selected by PVDLS[2:0]." value: 1 -enum/REGS: - bit_size: 1 - variants: - - name: B_0x0 - description: LDO selected - value: 0 - - name: B_0x1 - description: SMPS selected - value: 1 enum/REGSEL: bit_size: 1 variants: - - name: B_0x0 + - name: LDO description: LDO selected value: 0 - - name: B_0x1 + - name: SMPS description: SMPS selected value: 1 enum/RRSB: bit_size: 1 variants: - - name: B_0x0 + - name: NotRetained description: SRAM2 page1 content not retained in Stop 3 and Standby modes value: 0 - - name: B_0x1 + - name: Retained description: SRAM2 page1 content retained in Stop 3 and Standby modes value: 1 -enum/SBF: +enum/SEC: bit_size: 1 variants: - - name: B_0x0 - description: The device did not enter Standby mode. + - name: NonSecure + description: "CR1, CR2 and CSSF in the SR can be read and written with secure or non-secure access." value: 0 - - name: B_0x1 - description: The device entered Standby mode. - value: 1 -enum/SPRIV: - bit_size: 1 - variants: - - name: B_0x0 - description: Read and write to PWR secure functions can be done by privileged or unprivileged access. - value: 0 - - name: B_0x1 - description: Read and write to PWR secure functions can be done by privileged access only. + - name: Secure + description: "CR1, CR2, and CSSF in the SR can be read and written only with secure access." value: 1 enum/SRAMFWU: bit_size: 1 @@ -991,39 +859,12 @@ enum/SRAMFWU: enum/SRAMPD: bit_size: 1 variants: - - name: B_0x0 + - name: PoweredOn description: SRAM1 powered on value: 0 - - name: B_0x1 + - name: PoweredOff description: SRAM1 powered off value: 1 -enum/SRAMPDS: - bit_size: 1 - variants: - - name: B_0x0 - description: SRAM3 page 1 content retained in Stop modes - value: 0 - - name: B_0x1 - description: SRAM3 page 1 content lost in Stop modes - value: 1 -enum/SRDRUN: - bit_size: 1 - variants: - - name: B_0x0 - description: "SmartRun domain AHB3 and APB3 clocks disabled by default in Stop 0,1, 2 modes" - value: 0 - - name: B_0x1 - description: "SmartRun domain AHB3 and APB3 clocks kept enabled in Stop 0,1, 2 modes" - value: 1 -enum/STOPF: - bit_size: 1 - variants: - - name: B_0x0 - description: The device did not enter any Stop mode. - value: 0 - - name: B_0x1 - description: The device entered a Stop mode. - value: 1 enum/TEMPH: bit_size: 1 variants: @@ -1042,24 +883,6 @@ enum/TEMPL: - name: B_0x1 description: Temperature ≤ low threshold value: 1 -enum/UCPD_DBDIS: - bit_size: 1 - variants: - - name: B_0x0 - description: UCPD dead battery pull-down behavior enabled on UCPDx_CC1 and UCPDx_CC2 pins - value: 0 - - name: B_0x1 - description: UCPD dead battery pull-down behavior disabled on UCPDx_CC1 and UCPDx_CC2 pins - value: 1 -enum/USV: - bit_size: 1 - variants: - - name: B_0x0 - description: "VDDUSB not present: logical and electrical isolation is applied to ignore this supply." - value: 0 - - name: B_0x1 - description: VDDUSB valid - value: 1 enum/VBATH: bit_size: 1 variants: @@ -1087,51 +910,6 @@ enum/VBRS: - name: B_0x1 description: Charge VBAT through a 1.5 kΩ resistor value: 1 -enum/VBSEC: - bit_size: 1 - variants: - - name: B_0x0 - description: "BDCR1, BDCR2 and DBPR can be read and written with secure or non-secure access." - value: 0 - - name: B_0x1 - description: "BDCR1, BDCR2 and DBPR can be read and written only with secure access." - value: 1 -enum/VDDARDY: - bit_size: 1 - variants: - - name: B_0x0 - description: VDDA is below the threshold of the VDDA voltage monitor 2 (around 1.8 V). - value: 0 - - name: B_0x1 - description: VDDA is equal or above the threshold of the VDDA voltage monitor 2 (around 1.8 V). - value: 1 -enum/VDDIORDY: - bit_size: 1 - variants: - - name: B_0x0 - description: VDDIO2 is below the threshold of the VDDIO2 voltage monitor. - value: 0 - - name: B_0x1 - description: VDDIO2 is equal or above the threshold of the VDDIO2 voltage monitor. - value: 1 -enum/VDDUSBRDY: - bit_size: 1 - variants: - - name: B_0x0 - description: VDDUSB is below the threshold of the VDDUSB voltage monitor. - value: 0 - - name: B_0x1 - description: VDDUSB is equal or above the threshold of the VDDUSB voltage monitor. - value: 1 -enum/VDMSEC: - bit_size: 1 - variants: - - name: B_0x0 - description: SVMCR and CR3 can be read and written with secure or non-secure access. - value: 0 - - name: B_0x1 - description: SVMCR and CR3 can be read and written only with secure access. - value: 1 enum/VOS: bit_size: 2 variants: @@ -1147,15 +925,6 @@ enum/VOS: - name: B_0x3 description: Range 1 (highest frequency). This value cannot be written when VCOREMEN = 1 in TAMP_OR register. value: 3 -enum/VOSRDY: - bit_size: 1 - variants: - - name: B_0x0 - description: "Not ready, voltage level < VOS selected level" - value: 0 - - name: B_0x1 - description: "Ready, voltage level ≥ VOS selected level" - value: 1 enum/WUPP: bit_size: 1 variants: @@ -1165,15 +934,6 @@ enum/WUPP: - name: B_0x1 description: Detection on low level (falling edge) value: 1 -enum/WUPSEC: - bit_size: 1 - variants: - - name: B_0x0 - description: "Bits related to the WKUP3 pin in WUCR1, WUCR2, WUCR3 and WUSCR can be read and written with secure or non-secure access." - value: 0 - - name: B_0x1 - description: "Bits related to the WKUP3 pin in WUCR1, WUCR2, WUCR3 and WUSCR can be read and written only with secure access." - value: 1 enum/WUSEL: bit_size: 2 variants: