From 9f019bd9bad4313c34d6017a20fd5c8129104ef6 Mon Sep 17 00:00:00 2001 From: Olle Sandberg Date: Thu, 19 Oct 2023 14:22:02 +0200 Subject: [PATCH] wwdg: register definitions for window watchdog v2 --- data/registers/wwdg_v2.yaml | 76 +++++++++++++++++++++++++++++++++++++ stm32-data-gen/src/chips.rs | 1 + 2 files changed, 77 insertions(+) create mode 100644 data/registers/wwdg_v2.yaml diff --git a/data/registers/wwdg_v2.yaml b/data/registers/wwdg_v2.yaml new file mode 100644 index 0000000..2e0680d --- /dev/null +++ b/data/registers/wwdg_v2.yaml @@ -0,0 +1,76 @@ +block/WWDG: + description: Window watchdog + items: + - name: CR + description: Control register + byte_offset: 0 + fieldset: CR + - name: CFR + description: Configuration register + byte_offset: 4 + fieldset: CFR + - name: SR + description: Status register + byte_offset: 8 + fieldset: SR +fieldset/CFR: + description: Configuration register + fields: + - name: W + description: 7-bit window value + bit_offset: 0 + bit_size: 7 + - name: EWI + description: Early wakeup interrupt + bit_offset: 9 + bit_size: 1 + - name: WDGTB + description: Timer base + bit_offset: 11 + bit_size: 3 + enum: WDGTB +fieldset/CR: + description: Control register + fields: + - name: T + description: 7-bit counter (MSB to LSB) + bit_offset: 0 + bit_size: 7 + - name: WDGA + description: Activation bit (true is enabled, false is disabled) + bit_offset: 7 + bit_size: 1 +fieldset/SR: + description: Status register + fields: + - name: EWIF + description: Early wakeup interrupt flag + bit_offset: 0 + bit_size: 1 +enum/WDGTB: + bit_size: 3 + variants: + - name: Div1 + description: Counter clock (PCLK1 div 4096) div 1 + value: 0 + - name: Div2 + description: Counter clock (PCLK1 div 4096) div 2 + value: 1 + - name: Div4 + description: Counter clock (PCLK1 div 4096) div 4 + value: 2 + - name: Div8 + description: Counter clock (PCLK1 div 4096) div 8 + value: 3 + - name: Div16 + description: Counter clock (PCLK1 div 4096) div 16 + value: 4 + - name: Div32 + description: Counter clock (PCLK1 div 4096) div 32 + value: 5 + - name: Div64 + description: Counter clock (PCLK1 div 4096) div 64 + value: 6 + - name: Div128 + description: Counter clock (PCLK1 div 4096) div 128 + value: 7 diff --git a/stm32-data-gen/src/chips.rs b/stm32-data-gen/src/chips.rs index dd202d1..318801f 100644 --- a/stm32-data-gen/src/chips.rs +++ b/stm32-data-gen/src/chips.rs @@ -234,6 +234,7 @@ impl PeriMatcher { (".*:IWDG:iwdg1_v1_1", ("iwdg", "v1", "IWDG")), (".*:IWDG:iwdg1_v2_0", ("iwdg", "v2", "IWDG")), (".*:WWDG:wwdg1_v1_0", ("wwdg", "v1", "WWDG")), + (".*:WWDG:wwdg1_v2_0", ("wwdg", "v2", "WWDG")), (".*:JPEG:jpeg1_v1_0", ("jpeg", "v1", "JPEG")), (".*:LPTIM:F7_lptimer1_v1_1", ("lptim", "v1", "LPTIM")), (".*:HRTIM:hrtim_v1_0", ("hrtim", "v1", "HRTIM")),