From 9c753da57b15649da3d3b70f284a9cea3f57b03b Mon Sep 17 00:00:00 2001 From: Ben Gamari Date: Fri, 30 Jul 2021 13:50:56 -0400 Subject: [PATCH] Add a bit of documentation for register extraction process --- README.md | 26 +++++++++++++++++++++++++- merge_regs.py | 0 2 files changed, 25 insertions(+), 1 deletion(-) mode change 100644 => 100755 merge_regs.py diff --git a/README.md b/README.md index 83242de..2de36b3 100644 --- a/README.md +++ b/README.md @@ -42,4 +42,28 @@ This generates all the YAMLs in `data/` except those in `data/registers/`, which ## Extracting new register blocks -TODO document +For instance, to add support for the G0 series first download all the source +SVDs: +``` +$ ./d download-all +``` +Now extract the RCC peripheral registers: +``` +./d install-chiptool +./d extract-all RCC --transform ./transform-RCC.yaml +``` +Note that we have used a transform to mechanically clean up some of the RCC +definitions. This will produce a YAML file for each chip model in `./tmp/RCC` +At this point we need to choose the model with the largest peripheral set (e.g. +the STM32G081) and compare its YAML against each of the other models' to verify +that they are all mutually consistent. + +Finally, we can merge +``` +./merge_regs.py tmp/RCC/g0*.yaml +``` +This will produce `regs_merged.yaml`, which we can copy into its final resting +place: +``` +mv regs_merged.yaml data/registers/rcc_g0.yaml +``` diff --git a/merge_regs.py b/merge_regs.py old mode 100644 new mode 100755