From 9ba39f0f2dbf4e0626a7eb43cc5dbf52cf109087 Mon Sep 17 00:00:00 2001
From: shakencodes <shakencodes@gmail.com>
Date: Wed, 1 Nov 2023 13:04:57 -0700
Subject: [PATCH] Corrects name of enum/ADCSEL::PLLSAI1_R on smt32l5

---
 data/registers/rcc_l5.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/data/registers/rcc_l5.yaml b/data/registers/rcc_l5.yaml
index 77e857b..050f0b7 100644
--- a/data/registers/rcc_l5.yaml
+++ b/data/registers/rcc_l5.yaml
@@ -1931,7 +1931,7 @@ enum/ADCSEL:
   - name: DISABLE
     description: No clock selected
     value: 0
-  - name: PLL1_Q
+  - name: PLLSAI1_R
     description: PLLADC1CLK clock selected
     value: 1
   - name: SYS