From 99cd26c33f33017c0f8b541c39e229b7acff5b3f Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Fri, 30 Jul 2021 13:53:38 -0400 Subject: [PATCH] Parse memory layouts for actual region sizes. --- data/memories.yaml | 702 +++++++++++++++++++++++++++++++++++++++++++ parse.py | 73 +++-- parse_memory.py | 0 util/parse_memory.py | 119 ++++++++ 4 files changed, 876 insertions(+), 18 deletions(-) create mode 100644 data/memories.yaml create mode 100644 parse_memory.py create mode 100644 util/parse_memory.py diff --git a/data/memories.yaml b/data/memories.yaml new file mode 100644 index 0000000..88ee797 --- /dev/null +++ b/data/memories.yaml @@ -0,0 +1,702 @@ +- device-id: 0x410 + names: + - STM32F101 + - STM32F102 + - STM32F103 + ram: + address: 0x20000000 + bytes: 0x5000 + flash: + address: 0x8000000 + bytes: 0x20000 +- device-id: 0x411 + names: + - STM32F2xx + ram: + address: 0x20000000 + bytes: 0x20000 + flash: + address: 0x8000000 + bytes: 0x100000 +- device-id: 0x412 + names: + - STM32F101 + - STM32F102 + - STM32F103 + ram: + address: 0x20000000 + bytes: 0x2800 + flash: + address: 0x8000000 + bytes: 0x8000 +- device-id: 0x413 + names: + - STM32F405xx + - STM32F407xx + - STM32F415xx + - STM32F417xx + ram: + address: 0x20000000 + bytes: 0x20000 + flash: + address: 0x8000000 + bytes: 0x100000 +- device-id: 0x414 + names: + - STM32F101 + - STM32F103 + ram: + address: 0x20000000 + bytes: 0x10000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x415 + names: + - STM32L4x1 + - STM32L475xx + - STM32L476xx + - STM32L486xx + ram: + address: 0x20000000 + bytes: 0x18000 + flash: + address: 0x8000000 + bytes: 0x100000 +- device-id: 0x416 + names: + - STM32L100x8 + - STM32L100xB + - STM32L15xx6 + - STM32L15xx8 + - STM32L15xxB + ram: + address: 0x20000000 + bytes: 0x2800 + flash: + address: 0x8000000 + bytes: 0x20000 +- device-id: 0x417 + names: + - STM32L05x + - STM32L06x + - STM32L010 + ram: + address: 0x20000000 + bytes: 0x2000 + flash: + address: 0x8000000 + bytes: 0x10000 +- device-id: 0x418 + names: + - STM32F105 + - STM32F107 + ram: + address: 0x20000000 + bytes: 0x10000 + flash: + address: 0x8000000 + bytes: 0x40000 +- device-id: 0x419 + names: + - STM32F42xxx + - STM32F43xxx + ram: + address: 0x20000000 + bytes: 0x30000 + flash: + address: 0x8000000 + bytes: 0x200000 +- device-id: 0x420 + names: + - STM32F100 + - STMMedium + ram: + address: 0x20000000 + bytes: 0x2000 + flash: + address: 0x8000000 + bytes: 0x20000 +- device-id: 0x421 + names: + - STM32F446xx + ram: + address: 0x20000000 + bytes: 0x20000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x422 + names: + - STM32F302xB + - STM32F302xC + - STM32F303xB + - STM32F303xC + - STM32F358xx + ram: + address: 0x20000000 + bytes: 0xa000 + flash: + address: 0x8000000 + bytes: 0x40000 +- device-id: 0x423 + names: + - STM32F401xB + - STM32F401xC + ram: + address: 0x20000000 + bytes: 0x10000 + flash: + address: 0x8000000 + bytes: 0x40000 +- device-id: 0x425 + names: + - STM32L03x + - STM32L04x + - STM32L010 + ram: + address: 0x20000000 + bytes: 0x2000 + flash: + address: 0x8000000 + bytes: 0x8000 +- device-id: 0x427 + names: + - STM32L100xC + - STM32L15xxC + - STM32L162xC + ram: + address: 0x20000000 + bytes: 0x8000 + flash: + address: 0x8000000 + bytes: 0x40000 +- device-id: 0x428 + names: + - STM32F100 + ram: + address: 0x20000000 + bytes: 0x8000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x429 + names: + - STM32L100x6xxA + - STM32L100x8xxA + - STM32L100xBxxA + - STM32L15xx6xxA + - STM32L15xx8xxA + - STM32L15xxBxxA + ram: + address: 0x20000000 + bytes: 0x4000 + flash: + address: 0x8000000 + bytes: 0x20000 +- device-id: 0x430 + names: + - STM32F101 + - STM32F103 + ram: + address: 0x20000000 + bytes: 0x18000 + flash: + address: 0x8000000 + bytes: 0x100000 +- device-id: 0x431 + names: + - STM32F411xC + - STM32F411xE + ram: + address: 0x20000000 + bytes: 0x10000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x432 + names: + - STM32F37xx + ram: + address: 0x20000000 + bytes: 0x8000 + flash: + address: 0x8000000 + bytes: 0x40000 +- device-id: 0x433 + names: + - STM32F401xD + - STM32F401xE + ram: + address: 0x20000000 + bytes: 0x10000 + flash: + address: 0x8000000 + bytes: 0x800000 +- device-id: 0x434 + names: + - STM32F469xx + - STM32F467xx + ram: + address: 0x20000000 + bytes: 0x50000 + flash: + address: 0x8000000 + bytes: 0x200000 +- device-id: 0x435 + names: + - STM32L43xxx + - STM32L44xxx + ram: + address: 0x20000000 + bytes: 0xc000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x436 + names: + - STM32L15xxD + - STM32L162xD + ram: + address: 0x20000000 + bytes: 0xc000 + flash: + address: 0x8000000 + bytes: 0x20000 +- device-id: 0x437 + names: + - STM32L15xxE + - STM32L162xE + ram: + address: 0x20000000 + bytes: 0x14000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x438 + names: + - STM32F303x4 + - STM32F303x6 + - STM32F303x8 + - STM32F328xx + - STM32F334xx + ram: + address: 0x20000000 + bytes: 0x3000 + flash: + address: 0x8000000 + bytes: 0x10000 +- device-id: 0x439 + names: + - STM32F301x4 + - STM32F301x6 + - STM32F301x8 + - STM32F302x4 + - STM32F302x6 + - STM32F302x8 + - STM32F318xx + ram: + address: 0x20000000 + bytes: 0x4000 + flash: + address: 0x8000000 + bytes: 0x10000 +- device-id: 0x440 + names: + - STM32F05x + - STMF030x8 + ram: + address: 0x20000000 + bytes: 0x1ff8 + flash: + address: 0x8000000 + bytes: 0x10000 +- device-id: 0x441 + names: + - STM32F412 + ram: + address: 0x20000000 + bytes: 0x40000 + flash: + address: 0x8000000 + bytes: 0x100000 +- device-id: 0x442 + names: + - STM32F09x + - STMF030xC + ram: + address: 0x20000000 + bytes: 0x8000 + flash: + address: 0x8000000 + bytes: 0x40000 +- device-id: 0x443 + names: + - STM32C01x + ram: + address: 0x20000000 + bytes: 0x1800 + flash: + address: 0x8000000 + bytes: 0x8000 +- device-id: 0x444 + names: + - STM32F03x + ram: + address: 0x20000000 + bytes: 0x1000 + flash: + address: 0x8000000 + bytes: 0x8000 +- device-id: 0x445 + names: + - STM32F04x + - STMF070x6 + ram: + address: 0x20000000 + bytes: 0x1800 + flash: + address: 0x8000000 + bytes: 0x8000 +- device-id: 0x446 + names: + - STM32F302xE + - STM32F303xE + - STM32F398xx + ram: + address: 0x20000000 + bytes: 0x10000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x447 + names: + - STM32L07x + - STM32L08x + - STM32L010 + ram: + address: 0x20000000 + bytes: 0x5000 + flash: + address: 0x8000000 + bytes: 0x20000 +- device-id: 0x448 + names: + - STM32F07x + ram: + address: 0x20000000 + bytes: 0x4000 + flash: + address: 0x8000000 + bytes: 0x20000 +- device-id: 0x449 + names: + - STM32F74x + - STM32F75x + ram: + address: 0x20000000 + bytes: 0x50000 + flash: + address: 0x8000000 + bytes: 0x100000 +- device-id: 0x450 + names: + - STM32H7xx + ram: + address: 0x24000000 + bytes: 0x80000 + flash: + address: 0x8000000 + bytes: 0x200000 +- device-id: 0x451 + names: + - STM32F76x + - STM32F77x + ram: + address: 0x20000000 + bytes: 0x80000 + flash: + address: 0x8000000 + bytes: 0x200000 +- device-id: 0x452 + names: + - STM32F72x + - STM32F73x + ram: + address: 0x20000000 + bytes: 0x40000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x453 + names: + - STM32C0 + ram: + address: 0x20000000 + bytes: 0x1800 + flash: + address: 0x8000000 + bytes: 0x8000 +- device-id: 0x456 + names: + - STM32G051 + - STM32G061 + ram: + address: 0x20000000 + bytes: 0x4000 + flash: + address: 0x8000000 + bytes: 0x10000 +- device-id: 0x457 + names: + - STM32L01x + - STM32L02x + ram: + address: 0x20000000 + bytes: 0x800 + flash: + address: 0x8000000 + bytes: 0x4000 +- device-id: 0x458 + names: + - STM32F410 + ram: + address: 0x20000000 + bytes: 0x8000 + flash: + address: 0x8000000 + bytes: 0x20000 +- device-id: 0x460 + names: + - STM32G07x + - STM32G08x + ram: + address: 0x20000000 + bytes: 0x8000 + flash: + address: 0x8000000 + bytes: 0x20000 +- device-id: 0x461 + names: + - STM32L496xx + - STM32L4A6xx + ram: + address: 0x20000000 + bytes: 0x40000 + flash: + address: 0x8000000 + bytes: 0x100000 +- device-id: 0x462 + names: + - STM32L45x + - STM32L46x + ram: + address: 0x20000000 + bytes: 0x20000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x463 + names: + - STM32F413 + - STM32F423 + ram: + address: 0x20000000 + bytes: 0x50000 + flash: + address: 0x8000000 + bytes: 0x180000 +- device-id: 0x464 + names: + - STM32L41x + ram: + address: 0x20000000 + bytes: 0xa000 + flash: + address: 0x8000000 + bytes: 0x20000 +- device-id: 0x466 + names: + - STM32G03x + - STM32G04x + ram: + address: 0x20000000 + bytes: 0x2000 + flash: + address: 0x8000000 + bytes: 0x10000 +- device-id: 0x467 + names: + - STM32G0B1xx + - STM32G0C1xx + ram: + address: 0x20000000 + bytes: 0x20000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x468 + names: + - STM32G43x + - STM32G44x + ram: + address: 0x20000000 + bytes: 0x5000 + flash: + address: 0x8000000 + bytes: 0x20000 +- device-id: 0x469 + names: + - STM32G47x + - STM32G48x + ram: + address: 0x20000000 + bytes: 0x18000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x470 + names: + - STM32L4Rxxx + - STM32L4Sxxx + ram: + address: 0x20000000 + bytes: 0x30000 + flash: + address: 0x8000000 + bytes: 0x200000 +- device-id: 0x471 + names: + - STM32L4Pxxx + - STM32L4Qxxx + ram: + address: 0x20000000 + bytes: 0x30000 + flash: + address: 0x8000000 + bytes: 0x100000 +- device-id: 0x472 + names: + - STM32L5xx + ram: + address: 0x20000000 + bytes: 0x40000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x479 + names: + - STM32G491xC + - STM32G491xE + ram: + address: 0x20000000 + bytes: 0x8000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x480 + names: + - STM32H7A + - STM32H7B + ram: + address: 0x24000000 + bytes: 0x100000 + flash: + address: 0x8000000 + bytes: 0x200000 +- device-id: 0x481 + names: + - STM32U5xx + ram: + address: 0x20000000 + bytes: 0x8000 + flash: + address: 0x8000000 + bytes: 0x400000 +- device-id: 0x482 + names: + - STM32U575 + - STM32U585 + ram: + address: 0x20000000 + bytes: 0xc0000 + flash: + address: 0x8000000 + bytes: 0x200000 +- device-id: 0x483 + names: + - STM32H72x + - STM32H73x + ram: + address: 0x24000000 + bytes: 0x20000 + flash: + address: 0x8000000 + bytes: 0x100000 +- device-id: 0x484 + names: + - STM32H5xx + ram: + address: 0x20000000 + bytes: 0x40000 + flash: + address: 0x8000000 + bytes: 0x200000 +- device-id: 0x492 + names: + - STM32WBA55 + - STM32WBA54 + ram: + address: 0x20000000 + bytes: 0x10000 + flash: + address: 0x8000000 + bytes: 0x100000 +- device-id: 0x494 + names: + - STM32WB1xxx + ram: + address: 0x20000000 + bytes: 0x3000 + flash: + address: 0x8000000 + bytes: 0x50000 +- device-id: 0x495 + names: + - STM32WB5x + ram: + address: 0x20000000 + bytes: 0x30000 + flash: + address: 0x8000000 + bytes: 0x100000 +- device-id: 0x496 + names: + - STM32WB35xx + ram: + address: 0x20000000 + bytes: 0x8000 + flash: + address: 0x8000000 + bytes: 0x80000 +- device-id: 0x497 + names: + - STM32WLxx + ram: + address: 0x20000000 + bytes: 0x3000 + flash: + address: 0x8000000 + bytes: 0x40000 +- device-id: 0x500 + names: + - STM32MP1 + ram: + address: 0x10000000 + bytes: 0x20000 +- device-id: 0x501 + names: + - STM32MP13xx + ram: + address: 0x10000000 + bytes: 0x20000 diff --git a/parse.py b/parse.py index 31b9e2a..8ccf9f8 100755 --- a/parse.py +++ b/parse.py @@ -15,22 +15,28 @@ import os from collections import OrderedDict from glob import glob + class DecimalInt: def __init__(self, val): self.val = val + def represent_decimal_int(dumper, data): return dumper.represent_int(data.val) + yaml.add_representer(DecimalInt, represent_decimal_int) + class HexInt: def __init__(self, val): self.val = val + def represent_hex_int(dumper, data): return dumper.represent_int(hex(data.val)) + yaml.add_representer(HexInt, represent_hex_int) @@ -71,7 +77,6 @@ def represent_ordereddict(dumper, data): yaml.add_representer(OrderedDict, represent_ordereddict) - def hexint_presenter(dumper, data): if data > 0x10000: return dumper.represent_int(hex(data)) @@ -488,6 +493,7 @@ def chip_name_from_package_name(x): return r raise Exception("bad name: {}".format(x)) + memories_map = { 'flash': [ 'FLASH', 'FLASH_BANK1', 'FLASH_BANK2', @@ -533,11 +539,11 @@ def parse_chips(): chip_name = chip_name_from_package_name(package_name) flash = OrderedDict({ 'bytes': DecimalInt(int(package_flashs[package_i]) * 1024), - 'regions': [] + 'regions': {}, }) ram = OrderedDict({ 'bytes': DecimalInt(int(package_rams[package_i]) * 1024), - 'regions': [], + 'regions': {}, }) gpio_af = next(filter(lambda x: x['@Name'] == 'GPIO', r['IP']))['@Version'] gpio_af = removesuffix(gpio_af, '_gpio_v1_0') @@ -709,13 +715,14 @@ def parse_chips(): found.append(key) - chip['flash']['regions'].append( - OrderedDict({ - key: { - 'base': HexInt(h['defines']['all'][each + '_BASE']), - } - }) - ) + chip['flash']['regions'][key] = OrderedDict( { + 'base': HexInt(h['defines']['all'][each + '_BASE']) + } ) + + if key == 'BANK_1' or key == 'BANK_2': + flash_size = determine_flash_size(chip_name) + if flash_size is not None: + chip['flash']['regions'][key]['bytes'] = DecimalInt(flash_size) found = [] @@ -733,15 +740,14 @@ def parse_chips(): found.append(key) - chip['ram']['regions'].append( - OrderedDict({ - key: { - 'base': HexInt(h['defines']['all'][each + '_BASE']) - } - }) - ) - + chip['ram']['regions'][key] = OrderedDict( { + 'base': HexInt(h['defines']['all'][each + '_BASE']) + } ) + if key == 'SRAM': + ram_size = determine_ram_size(chip_name) + if ram_size is not None: + chip['ram']['regions'][key]['bytes'] = DecimalInt(ram_size) # print("Got", len(chip['cores']), "cores") for core in chip['cores']: @@ -1310,7 +1316,38 @@ def filter_interrupts(peri_irqs, all_irqs): return filtered +memories = [] +def parse_memories(): + with open('data/memories.yaml', 'r') as yaml_file: + m = yaml.load(yaml_file, Loader=SafeLoader) + for each in m: + memories.append(each) + + +def determine_ram_size(chip_name): + for each in memories: + for name in each['names']: + if is_chip_name_match(name, chip_name): + return each['ram']['bytes'] + + return None + +def determine_flash_size(chip_name): + for each in memories: + for name in each['names']: + if is_chip_name_match(name, chip_name): + return each['flash']['bytes'] + + return None + +def is_chip_name_match(pattern, chip_name): + pattern = pattern.replace('x', '.') + return re.match(pattern + ".*", chip_name) + + + +parse_memories() parse_interrupts() parse_rcc_regs() parse_documentations() diff --git a/parse_memory.py b/parse_memory.py new file mode 100644 index 0000000..e69de29 diff --git a/util/parse_memory.py b/util/parse_memory.py new file mode 100644 index 0000000..2331c63 --- /dev/null +++ b/util/parse_memory.py @@ -0,0 +1,119 @@ +#!/usr/bin/env python3 + +import sys +import xmltodict +import yaml +from collections import OrderedDict +from glob import glob + +try: + from yaml import CSafeLoader as SafeLoader +except ImportError: + from yaml import SafeLoader + + +def represent_ordereddict(dumper, data): + value = [] + + for item_key, item_value in data.items(): + node_key = dumper.represent_data(item_key) + node_value = dumper.represent_data(item_value) + + value.append((node_key, node_value)) + + return yaml.nodes.MappingNode(u'tag:yaml.org,2002:map', value) + +yaml.add_representer(OrderedDict, represent_ordereddict) + +def represent_int(dumper, data): + return dumper.represent_int(hex(data)) + +yaml.add_representer(int, represent_int) + +def splat_names(base, parts): + names = [] + for part in parts: + if part.startswith("STM32"): + names.append( base ) + else: + names.append( base[0: len(base) - len(part)] + part) + + return names + + +def split_names(str): + cleaned = [] + names = str.split("/") + current_base = None + for name in names: + name = name.split(' ')[0].strip() + if '-' in name: + parts = name.split('-') + current_base = parts[0] + splatted = splat_names(current_base, parts ) + current_base = splatted[0] + cleaned = cleaned + splatted + elif name.startswith("STM32"): + current_base = name + cleaned.append(name) + else: + cleaned.append( current_base[0: len(current_base) - len(name)] + name) + return cleaned + +memories = [] + +def parse_files(dir): + for f in sorted(glob(dir + '/*.xml')): + #print("parsing ", f); + device = xmltodict.parse(open(f, 'rb'))['Root']['Device'] + device_id = device['DeviceID'] + name = device['Name'] + names = split_names(name) + flash_size = None + flash_addr = None + ram_size = None + ram_addr = None + + for peripheral in device['Peripherals']['Peripheral']: + if peripheral['Name'] == 'Embedded SRAM' and ram_size is None: + configs = peripheral['Configuration'] + if type(configs) != list: + configs = [ configs ] + ram_addr = int(configs[0]['Parameters']['@address'], 16) + ram_size = int(configs[0]['Parameters']['@size'], 16) + #print( f'ram {addr} {size}') + if peripheral['Name'] == 'Embedded Flash' and flash_size is None: + configs = peripheral['Configuration'] + if type(configs) != list: + configs = [ configs ] + flash_addr = int(configs[0]['Parameters']['@address'], 16) + flash_size = int(configs[0]['Parameters']['@size'], 16) + #print( f'flash {addr} {size}') + + chunk = OrderedDict( { + 'device-id': int(device_id, 16), + 'names': names, + }) + + if ram_size is not None: + chunk['ram'] = OrderedDict( { + 'address': ram_addr, + 'bytes': ram_size, + }) + + if flash_size is not None: + chunk['flash'] = OrderedDict( { + 'address': flash_addr, + 'bytes': flash_size, + }) + + memories.append( chunk ) + +dir = sys.argv[1] + +parse_files(dir) + +with open('data/memories.yaml', 'w') as f: + f.write(yaml.dump(memories, width=500)) + +#print(yaml.dump(memories, width=500)) \ No newline at end of file