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Merge pull request #320 from eZioPan/spi-cleanup

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spi-cleanup
This commit is contained in:
Dario Nieuwenhuis 2023-12-24 18:59:35 +00:00 committed by GitHub
commit 94c4bbe9d8
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GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 7 additions and 87 deletions
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22
data/registers/spi_v2.yaml
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@ -212,10 +212,9 @@ fieldset/I2SCFGR:
bit_size: 2
enum: ISCFG
- name: I2SE
description: I2S Enable
description: I2S Enabled
bit_offset: 10
bit_size: 1
enum: ISE
- name: I2SMOD
description: I2S mode selection
bit_offset: 11
@ -241,7 +240,6 @@ fieldset/I2SPR:
description: Master clock output enable
bit_offset: 9
bit_size: 1
enum: MCKOE
fieldset/RXCRCR:
description: RX CRC register
fields:
@ -531,15 +529,6 @@ enum/ISCFG:
- name: MasterRx
description: Master - receive
value: 3
enum/ISE:
bit_size: 1
variants:
- name: Disabled
description: I2S peripheral is disabled
value: 0
- name: Enabled
description: I2S peripheral is enabled
value: 1
enum/ISMOD:
bit_size: 1
variants:
@ -591,15 +580,6 @@ enum/LSBFIRST:
- name: LSBFirst
description: Data is transmitted/received with the LSB first
value: 1
enum/MCKOE:
bit_size: 1
variants:
- name: Disabled
description: Master clock output is disabled
value: 0
- name: Enabled
description: Master clock output is enabled
value: 1
enum/MSTR:
bit_size: 1
variants:

24
data/registers/spi_v3.yaml
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@ -164,10 +164,9 @@ fieldset/CFG2:
bit_size: 1
enum: SSOM
- name: AFCNTR
description: Alternate function GPIOs control
description: Alternate function always control GPIOs
bit_offset: 31
bit_size: 1
enum: AFCNTR
fieldset/CR1:
description: control register 1
fields:
@ -197,10 +196,9 @@ fieldset/CR1:
bit_offset: 12
bit_size: 1
- name: CRC33_17
description: 32-bit CRC polynomial configuration
description: Full size (33-bit or 17-bit) CRC polynomial is used
bit_offset: 13
bit_size: 1
enum: CRC_
- name: RCRCINI
description: CRC calculation initialization pattern control for receiver
bit_offset: 14
@ -423,15 +421,6 @@ fieldset/UDRDR:
description: Data at slave underrun condition
bit_offset: 0
bit_size: 32
enum/AFCNTR:
bit_size: 1
variants:
- name: NotControlled
description: Peripheral takes no control of GPIOs while disabled
value: 0
- name: Controlled
description: Peripheral controls GPIOs while disabled
value: 1
enum/COMM:
bit_size: 2
variants:
@ -465,15 +454,6 @@ enum/CPOL:
- name: IdleHigh
description: CK to 1 when idle
value: 1
enum/CRC_:
bit_size: 1
variants:
- name: Disabled
description: Full size (33/17 bit) CRC polynomial is not used
value: 0
- name: Enabled
description: Full size (33/17 bit) CRC polynomial is used
value: 1
enum/FTHLV:
bit_size: 4
variants:

24
data/registers/spi_v4.yaml
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@ -175,10 +175,9 @@ fieldset/CFG2:
bit_size: 1
enum: SSOM
- name: AFCNTR
description: Alternate function GPIOs control
description: Alternate function always control GPIOs
bit_offset: 31
bit_size: 1
enum: AFCNTR
fieldset/CR1:
description: control register 1
fields:
@ -208,10 +207,9 @@ fieldset/CR1:
bit_offset: 12
bit_size: 1
- name: CRC33_17
description: 32-bit CRC polynomial configuration
description: Full size (33-bit or 17-bit) CRC polynomial is used
bit_offset: 13
bit_size: 1
enum: CRC_
- name: RCRCINI
description: CRC calculation initialization pattern control for receiver
bit_offset: 14
@ -418,15 +416,6 @@ fieldset/UDRDR:
description: Data at slave underrun condition
bit_offset: 0
bit_size: 32
enum/AFCNTR:
bit_size: 1
variants:
- name: NotControlled
description: Peripheral takes no control of GPIOs while disabled
value: 0
- name: Controlled
description: Peripheral controls GPIOs while disabled
value: 1
enum/COMM:
bit_size: 2
variants:
@ -460,15 +449,6 @@ enum/CPOL:
- name: IdleHigh
description: CK to 1 when idle
value: 1
enum/CRC_:
bit_size: 1
variants:
- name: Disabled
description: Full size (33/17 bit) CRC polynomial is not used
value: 0
- name: Enabled
description: Full size (33/17 bit) CRC polynomial is used
value: 1
enum/FTHLV:
bit_size: 4
variants:

24
data/registers/spi_v5.yaml
View File

@ -200,10 +200,9 @@ fieldset/CFG2:
bit_size: 1
enum: SSOM
- name: AFCNTR
description: Alternate function GPIOs control
description: Alternate function always control GPIOs
bit_offset: 31
bit_size: 1
enum: AFCNTR
fieldset/CR1:
description: control register 1
fields:
@ -233,10 +232,9 @@ fieldset/CR1:
bit_offset: 12
bit_size: 1
- name: CRC33_17
description: 32-bit CRC polynomial configuration
description: Full size (33-bit or 17-bit) CRC polynomial is used
bit_offset: 13
bit_size: 1
enum: CRC_
- name: RCRCINI
description: CRC calculation initialization pattern control for receiver
bit_offset: 14
@ -443,15 +441,6 @@ fieldset/UDRDR:
description: Data at slave underrun condition
bit_offset: 0
bit_size: 32
enum/AFCNTR:
bit_size: 1
variants:
- name: NotControlled
description: Peripheral takes no control of GPIOs while disabled
value: 0
- name: Controlled
description: Peripheral controls GPIOs while disabled
value: 1
enum/COMM:
bit_size: 2
variants:
@ -485,15 +474,6 @@ enum/CPOL:
- name: IdleHigh
description: CK to 1 when idle
value: 1
enum/CRC_:
bit_size: 1
variants:
- name: Disabled
description: Full size (33/17 bit) CRC polynomial is not used
value: 0
- name: Enabled
description: Full size (33/17 bit) CRC polynomial is used
value: 1
enum/FTHLV:
bit_size: 4
variants: