guangzong/stm32-data
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Do not lowercase clock names.

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This commit is contained in:
Dario Nieuwenhuis 2024-02-16 00:26:37 +01:00
parent e2c7a7eae0
commit 917db8f71e
1 changed files with 14 additions and 19 deletions
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33
stm32-data-gen/src/rcc.rs
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@ -174,10 +174,10 @@ impl ParsedRccs {
let val = MuxInfo { let val = MuxInfo {
mux: Mux { mux: Mux {
register: reg.to_ascii_lowercase(), register: reg.clone(),
field: field.name.to_ascii_lowercase(), field: field.name.clone(),
}, },
variants: enumm.variants.iter().map(|v| v.name.to_ascii_lowercase()).collect(), variants: enumm.variants.iter().map(|v| v.name.clone()).collect(),
}; };
if mux.insert(peri.to_string(), val).is_some() { if mux.insert(peri.to_string(), val).is_some() {
@ -206,8 +206,8 @@ impl ParsedRccs {
if let Some(rstr) = ir.fieldsets.get(&reg.replace("ENR", "RSTR")) { if let Some(rstr) = ir.fieldsets.get(&reg.replace("ENR", "RSTR")) {
if let Some(_field) = rstr.fields.iter().find(|field| field.name == format!("{peri}RST")) { if let Some(_field) = rstr.fields.iter().find(|field| field.name == format!("{peri}RST")) {
reset = Some(stm32_data_serde::chip::core::peripheral::rcc::Reset { reset = Some(stm32_data_serde::chip::core::peripheral::rcc::Reset {
register: reg.replace("ENR", "RSTR").to_ascii_lowercase(), register: reg.replace("ENR", "RSTR"),
field: format!("{peri}RST").to_ascii_lowercase(), field: format!("{peri}RST"),
}); });
} }
} }
@ -220,25 +220,20 @@ impl ParsedRccs {
StopMode::Stop1 StopMode::Stop1
}; };
// Timers are a bit special, they may have a x2 freq let mut clock = clock.replace("AHB", "HCLK").replace("APB", "PCLK");
let peri_clock = if regex!(r"^(HR)?TIM\d+$").is_match(peri) {
format!("{clock}_TIM")
} else {
clock.to_string()
};
let peri_clock = peri_clock // Timers are a bit special, they may have a x2 freq
.to_ascii_lowercase() if regex!(r"^(HR)?TIM\d+$").is_match(peri) {
.replace("ahb", "hclk") clock.push_str("_TIM");
.replace("apb", "pclk"); }
let val = EnRst { let val = EnRst {
enable: peripheral::rcc::Enable { enable: peripheral::rcc::Enable {
register: reg.to_ascii_lowercase(), register: reg.clone(),
field: field.name.to_ascii_lowercase(), field: field.name.clone(),
}, },
reset, reset,
clock: peri_clock, clock,
stop_mode, stop_mode,
}; };
@ -301,7 +296,7 @@ impl ParsedRccs {
let en_rst = get_with_fallback(peri_name, &rcc.en_rst, FALLBACKS)?; let en_rst = get_with_fallback(peri_name, &rcc.en_rst, FALLBACKS)?;
let mux = get_with_fallback(peri_name, &rcc.mux, FALLBACKS); let mux = get_with_fallback(peri_name, &rcc.mux, FALLBACKS);
let phclk = regex!("^[ph]clk"); let phclk = regex!("^[PH]CLK");
if let Some(mux) = mux { if let Some(mux) = mux {
if phclk.is_match(&en_rst.clock) { if phclk.is_match(&en_rst.clock) {
for v in &mux.variants { for v in &mux.variants {