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Regenerate with dual core support

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* Add support for WL55 chip family
This commit is contained in:
Ulf Lilleengen 2021-06-16 15:10:42 +02:00
parent d4fad162ac
commit 9161dbcac9
2 changed files with 1842 additions and 0 deletions
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1424
data/registers/rcc_wl55.yaml Normal file
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data/registers/syscfg_wl55.yaml Normal file
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---
block/SYSCFG:
description: System configuration controller
items:
- name: MEMRMP
description: memory remap register
byte_offset: 0
fieldset: MEMRMP
- name: CFGR1
description: configuration register 1
byte_offset: 4
fieldset: CFGR1
- name: EXTICR
description: external interrupt configuration register 1
array:
len: 4
stride: 4
byte_offset: 8
fieldset: EXTICR
- name: SCSR
description: SCSR
byte_offset: 24
fieldset: SCSR
- name: CFGR2
description: CFGR2
byte_offset: 28
fieldset: CFGR2
- name: SWPR
description: SWPR
byte_offset: 32
fieldset: SWPR
- name: SKR
description: SKR
byte_offset: 36
access: Write
fieldset: SKR
- name: IMR1
description: SYSCFG CPU1 interrupt mask register 1
byte_offset: 256
fieldset: IMR1
- name: IMR2
description: SYSCFG CPU1 interrupt mask register 2
byte_offset: 260
fieldset: IMR2
- name: C2IMR1
description: SYSCFG CPU2 interrupt mask register 1
byte_offset: 264
fieldset: C2IMR1
- name: C2IMR2
description: SYSCFG CPU2 interrupt mask register 2
byte_offset: 268
fieldset: C2IMR2
- name: RFDCR
description: radio debug control register
byte_offset: 520
fieldset: RFDCR
fieldset/C2IMR1:
description: SYSCFG CPU2 interrupt mask register 1
fields:
- name: RTCSTAMPTAMPLSECSSIM
description: RTCSTAMPTAMPLSECSSIM
bit_offset: 0
bit_size: 1
- name: RTCALARMIM
description: RTCALARMIM
bit_offset: 1
bit_size: 1
- name: RTCSSRUIM
description: RTCSSRUIM
bit_offset: 2
bit_size: 1
- name: RTCWKUPIM
description: RTCWKUPIM
bit_offset: 3
bit_size: 1
- name: RCCIM
description: RCCIM
bit_offset: 5
bit_size: 1
- name: FLASHIM
description: FLASHIM
bit_offset: 6
bit_size: 1
- name: PKAIM
description: PKAIM
bit_offset: 8
bit_size: 1
- name: AESIM
description: AESIM
bit_offset: 10
bit_size: 1
- name: COMPIM
description: COMPIM
bit_offset: 11
bit_size: 1
- name: ADCIM
description: ADCIM
bit_offset: 12
bit_size: 1
- name: DACIM
description: DACIM
bit_offset: 13
bit_size: 1
- name: EXTI0IM
description: EXTI0IM
bit_offset: 16
bit_size: 1
- name: EXTI1IM
description: EXTI1IM
bit_offset: 17
bit_size: 1
- name: EXTI2IM
description: EXTI2IM
bit_offset: 18
bit_size: 1
- name: EXTI3IM
description: EXTI3IM
bit_offset: 19
bit_size: 1
- name: EXTI4IM
description: EXTI4IM
bit_offset: 20
bit_size: 1
- name: EXTI5IM
description: EXTI5IM
bit_offset: 21
bit_size: 1
- name: EXTI6IM
description: EXTI6IM
bit_offset: 22
bit_size: 1
- name: EXTI7IM
description: EXTI7IM
bit_offset: 23
bit_size: 1
- name: EXTI8IM
description: EXTI8IM
bit_offset: 24
bit_size: 1
- name: EXTI9IM
description: EXTI9IM
bit_offset: 25
bit_size: 1
- name: EXTI10IM
description: EXTI10IM
bit_offset: 26
bit_size: 1
- name: EXTI11IM
description: EXTI11IM
bit_offset: 27
bit_size: 1
- name: EXTI12IM
description: EXTI12IM
bit_offset: 28
bit_size: 1
- name: EXTI13IM
description: EXTI13IM
bit_offset: 29
bit_size: 1
- name: EXTI14IM
description: EXTI14IM
bit_offset: 30
bit_size: 1
- name: EXTI15IM
description: EXTI15IM
bit_offset: 31
bit_size: 1
fieldset/C2IMR2:
description: SYSCFG CPU2 interrupt mask register 2
fields:
- name: DMA1CH1IM
description: DMA1CH1IM
bit_offset: 0
bit_size: 1
- name: DMA1CH2IM
description: DMA1CH2IM
bit_offset: 1
bit_size: 1
- name: DMA1CH3IM
description: DMA1CH3IM
bit_offset: 2
bit_size: 1
- name: DMA1CH4IM
description: DMA1CH4IM
bit_offset: 3
bit_size: 1
- name: DMA1CH5IM
description: DMA1CH5IM
bit_offset: 4
bit_size: 1
- name: DMA1CH6IM
description: DMA1CH6IM
bit_offset: 5
bit_size: 1
- name: DMA1CH7IM
description: DMA1CH7IM
bit_offset: 6
bit_size: 1
- name: DMA2CH1IM
description: DMA2CH1IM
bit_offset: 8
bit_size: 1
- name: DMA2CH2IM
description: DMA2CH2IM
bit_offset: 9
bit_size: 1
- name: DMA2CH3IM
description: DMA2CH3IM
bit_offset: 10
bit_size: 1
- name: DMA2CH4IM
description: DMA2CH4IM
bit_offset: 11
bit_size: 1
- name: DMA2CH5IM
description: DMA2CH5IM
bit_offset: 12
bit_size: 1
- name: DMA2CH6IM
description: DMA2CH6IM
bit_offset: 13
bit_size: 1
- name: DMA2CH7IM
description: DMA2CH7IM
bit_offset: 14
bit_size: 1
- name: DMAMUX1IM
description: DMAMUX1IM
bit_offset: 15
bit_size: 1
- name: PVM3IM
description: PVM3IM
bit_offset: 18
bit_size: 1
- name: PVDIM
description: PVDIM
bit_offset: 20
bit_size: 1
fieldset/CFGR1:
description: configuration register 1
fields:
- name: BOOSTEN
description: I/O analog switch voltage booster enable
bit_offset: 8
bit_size: 1
- name: I2C_PB6_FMP
description: Fast-mode Plus (Fm+) driving capability activation on PB6
bit_offset: 16
bit_size: 1
- name: I2C_PB7_FMP
description: Fast-mode Plus (Fm+) driving capability activation on PB7
bit_offset: 17
bit_size: 1
- name: I2C_PB8_FMP
description: Fast-mode Plus (Fm+) driving capability activation on PB8
bit_offset: 18
bit_size: 1
- name: I2C_PB9_FMP
description: Fast-mode Plus (Fm+) driving capability activation on PB9
bit_offset: 19
bit_size: 1
- name: I2C1_FMP
description: I2C1 Fast-mode Plus driving capability activation
bit_offset: 20
bit_size: 1
- name: I2C2_FMP
description: I2C2 Fast-mode Plus driving capability activation
bit_offset: 21
bit_size: 1
- name: I2C3_FMP
description: I2C3 Fast-mode Plus driving capability activation
bit_offset: 22
bit_size: 1
fieldset/CFGR2:
description: CFGR2
fields:
- name: CLL
description: CPU1 LOCKUP (Hardfault) output enable bit
bit_offset: 0
bit_size: 1
- name: SPL
description: SRAM2 parity lock bit
bit_offset: 1
bit_size: 1
- name: PVDL
description: PVD lock enable bit
bit_offset: 2
bit_size: 1
- name: ECCL
description: ECC Lock
bit_offset: 3
bit_size: 1
- name: SPF
description: SRAM2 parity error flag
bit_offset: 8
bit_size: 1
fieldset/EXTICR:
description: external interrupt configuration register 4
fields:
- name: EXTI
description: EXTI12 configuration bits
bit_offset: 0
bit_size: 3
array:
len: 4
stride: 4
fieldset/IMR1:
description: SYSCFG CPU1 interrupt mask register 1
fields:
- name: RTCSTAMPTAMPLSECSSIM
description: RTCSTAMPTAMPLSECSSIM
bit_offset: 0
bit_size: 1
- name: RTCSSRUIM
description: RTCSSRUIM
bit_offset: 2
bit_size: 1
- name: EXTI5IM
description: EXTI5IM
bit_offset: 21
bit_size: 1
- name: EXTI6IM
description: EXTI6IM
bit_offset: 22
bit_size: 1
- name: EXTI7IM
description: EXTI7IM
bit_offset: 23
bit_size: 1
- name: EXTI8IM
description: EXTI8IM
bit_offset: 24
bit_size: 1
- name: EXTI9IM
description: EXTI9IM
bit_offset: 25
bit_size: 1
- name: EXTI10IM
description: EXTI10IM
bit_offset: 26
bit_size: 1
- name: EXTI11IM
description: EXTI11IM
bit_offset: 27
bit_size: 1
- name: EXTI12IM
description: EXTI12IM
bit_offset: 28
bit_size: 1
- name: EXTI13IM
description: EXTI13IM
bit_offset: 29
bit_size: 1
- name: EXTI14IM
description: EXTI14IM
bit_offset: 30
bit_size: 1
- name: EXTI15IM
description: EXTI15IM
bit_offset: 31
bit_size: 1
fieldset/IMR2:
description: SYSCFG CPU1 interrupt mask register 2
fields:
- name: PVM3IM
description: PVM3IM
bit_offset: 18
bit_size: 1
- name: PVDIM
description: PVDIM
bit_offset: 20
bit_size: 1
fieldset/MEMRMP:
description: memory remap register
fields:
- name: MEM_MODE
description: Memory mapping selection
bit_offset: 0
bit_size: 3
fieldset/RFDCR:
description: radio debug control register
fields:
- name: RFTBSEL
description: radio debug test bus selection
bit_offset: 0
bit_size: 1
fieldset/SCSR:
description: SCSR
fields:
- name: SRAM2ER
description: SRAM2 erase
bit_offset: 0
bit_size: 1
- name: SRAMBSY
description: "SRAM1, SRAM2 and PKA SRAM busy by erase operation"
bit_offset: 1
bit_size: 1
- name: PKASRAMBSY
description: PKA SRAM busy by erase operation
bit_offset: 8
bit_size: 1
fieldset/SKR:
description: SKR
fields:
- name: KEY
description: SRAM2 write protection key for software erase
bit_offset: 0
bit_size: 8
fieldset/SWPR:
description: SWPR
fields:
- name: PWP
description: SRAM2 1Kbyte page 0 write protection
bit_offset: 0
bit_size: 1
array:
len: 32
stride: 1