Merge pull request #387 from msrd0/octospi1en

Add OCTOSPI1 register bits
This commit is contained in:
Dario Nieuwenhuis 2024-02-07 18:23:45 +00:00 committed by GitHub
commit 90698114d6
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@ -558,6 +558,10 @@ fieldset/AHB3ENR:
description: QUADSPI and QUADSPI Delay Clock Enable description: QUADSPI and QUADSPI Delay Clock Enable
bit_offset: 14 bit_offset: 14
bit_size: 1 bit_size: 1
- name: OCTOSPI1EN
description: OCTOSPI2 and OCTOSPI2 delay block enable
bit_offset: 14
bit_size: 1
- name: SDMMC1EN - name: SDMMC1EN
description: SDMMC1 and SDMMC1 Delay Clock Enable description: SDMMC1 and SDMMC1 Delay Clock Enable
bit_offset: 16 bit_offset: 16
@ -621,6 +625,10 @@ fieldset/AHB3LPENR:
description: QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode description: QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode
bit_offset: 14 bit_offset: 14
bit_size: 1 bit_size: 1
- name: OCTOSPI1LPEN
description: OCTOSPI1 and OCTOSPI1 delay block enable during CSleep Mode
bit_offset: 14
bit_size: 1
- name: SDMMC1LPEN - name: SDMMC1LPEN
description: SDMMC1 and SDMMC1 Delay Clock Enable During CSleep Mode description: SDMMC1 and SDMMC1 Delay Clock Enable During CSleep Mode
bit_offset: 16 bit_offset: 16
@ -680,6 +688,10 @@ fieldset/AHB3RSTR:
description: QUADSPI and QUADSPI delay block reset description: QUADSPI and QUADSPI delay block reset
bit_offset: 14 bit_offset: 14
bit_size: 1 bit_size: 1
- name: OCTOSPI1RST
description: OCTOSPI1 and OCTOSPI1 delay block reset
bit_offset: 14
bit_size: 1
- name: SDMMC1RST - name: SDMMC1RST
description: SDMMC1 and SDMMC1 delay block reset description: SDMMC1 and SDMMC1 delay block reset
bit_offset: 16 bit_offset: 16
@ -3055,6 +3067,11 @@ fieldset/D1CCIPR:
bit_offset: 4 bit_offset: 4
bit_size: 2 bit_size: 2
enum: FMCSEL enum: FMCSEL
- name: OCTOSPISEL
description: OCTOSPI kernel clock source selection
bit_offset: 4
bit_size: 2
enum: FMCSEL
- name: DSISEL - name: DSISEL
description: kernel clock source selection description: kernel clock source selection
bit_offset: 8 bit_offset: 8