Merge pull request #345 from eZioPan/sai-cleanup

sai-cleanup
This commit is contained in:
Dario Nieuwenhuis 2024-01-05 23:41:15 +00:00 committed by GitHub
commit 8fd4d70ecb
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5 changed files with 3 additions and 220 deletions

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@ -144,7 +144,6 @@ fieldset/CR2:
description: FIFO flush. This bit is set by software. It is always read as 0. This bit should be configured when the SAI is disabled. description: FIFO flush. This bit is set by software. It is always read as 0. This bit should be configured when the SAI is disabled.
bit_offset: 3 bit_offset: 3
bit_size: 1 bit_size: 1
enum: FFLUSH
- name: TRIS - name: TRIS
description: 'Tristate management on data line. This bit is set and cleared by software. It is meaningful only if the audio block is configured as a transmitter. This bit is not used when the audio block is configured in SPDIF mode. It should be configured when SAI is disabled. Refer to Section: Output data line management on an inactive slot for more details.' description: 'Tristate management on data line. This bit is set and cleared by software. It is meaningful only if the audio block is configured as a transmitter. This bit is not used when the audio block is configured in SPDIF mode. It should be configured when SAI is disabled. Refer to Section: Output data line management on an inactive slot for more details.'
bit_offset: 4 bit_offset: 4
@ -263,12 +262,10 @@ fieldset/SR:
description: Overrun / underrun. This bit is read only. The overrun and underrun conditions can occur only when the audio block is configured as a receiver and a transmitter, respectively. It can generate an interrupt if OVRUDRIE bit is set in SAI_xIM register. This flag is cleared when the software sets COVRUDR bit in SAI_xCLRFR register. description: Overrun / underrun. This bit is read only. The overrun and underrun conditions can occur only when the audio block is configured as a receiver and a transmitter, respectively. It can generate an interrupt if OVRUDRIE bit is set in SAI_xIM register. This flag is cleared when the software sets COVRUDR bit in SAI_xCLRFR register.
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
enum: OVRUDR
- name: MUTEDET - name: MUTEDET
description: Mute detection. This bit is read only. This flag is set if consecutive 0 values are received in each slot of a given audio frame and for a consecutive number of audio frames (set in the MUTECNT bit in the SAI_xCR2 register). It can generate an interrupt if MUTEDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets bit CMUTEDET in the SAI_xCLRFR register. description: Mute detection. This bit is read only. This flag is set if consecutive 0 values are received in each slot of a given audio frame and for a consecutive number of audio frames (set in the MUTECNT bit in the SAI_xCR2 register). It can generate an interrupt if MUTEDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets bit CMUTEDET in the SAI_xCLRFR register.
bit_offset: 1 bit_offset: 1
bit_size: 1 bit_size: 1
enum: MUTEDET
- name: WCKCFG - name: WCKCFG
description: Wrong clock configuration flag. This bit is read only. This bit is used only when the audio block operates in master mode (MODE[1] = 0) and NODIV = 0. It can generate an interrupt if WCKCFGIE bit is set in SAI_xIM register. This flag is cleared when the software sets CWCKCFG bit in SAI_xCLRFR register. description: Wrong clock configuration flag. This bit is read only. This bit is used only when the audio block operates in master mode (MODE[1] = 0) and NODIV = 0. It can generate an interrupt if WCKCFGIE bit is set in SAI_xIM register. This flag is cleared when the software sets CWCKCFG bit in SAI_xCLRFR register.
bit_offset: 2 bit_offset: 2
@ -278,7 +275,6 @@ fieldset/SR:
description: 'FIFO request. This bit is read only. The request depends on the audio block configuration: If the block is configured in transmission mode, the FIFO request is related to a write request operation in the SAI_xDR. If the block configured in reception, the FIFO request related to a read request operation from the SAI_xDR. This flag can generate an interrupt if FREQIE bit is set in SAI_xIM register.' description: 'FIFO request. This bit is read only. The request depends on the audio block configuration: If the block is configured in transmission mode, the FIFO request is related to a write request operation in the SAI_xDR. If the block configured in reception, the FIFO request related to a read request operation from the SAI_xDR. This flag can generate an interrupt if FREQIE bit is set in SAI_xIM register.'
bit_offset: 3 bit_offset: 3
bit_size: 1 bit_size: 1
enum: FREQ
- name: CNRDY - name: CNRDY
description: Codec not ready. This bit is read only. This bit is used only when the AC97 audio protocol is selected in the SAI_xCR1 register and configured in receiver mode. It can generate an interrupt if CNRDYIE bit is set in SAI_xIM register. This flag is cleared when the software sets CCNRDY bit in SAI_xCLRFR register. description: Codec not ready. This bit is read only. This bit is used only when the AC97 audio protocol is selected in the SAI_xCR1 register and configured in receiver mode. It can generate an interrupt if CNRDYIE bit is set in SAI_xIM register. This flag is cleared when the software sets CCNRDY bit in SAI_xCLRFR register.
bit_offset: 4 bit_offset: 4
@ -288,26 +284,15 @@ fieldset/SR:
description: Anticipated frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97or SPDIF mode. It can generate an interrupt if AFSDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets CAFSDET bit in SAI_xCLRFR register. description: Anticipated frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97or SPDIF mode. It can generate an interrupt if AFSDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets CAFSDET bit in SAI_xCLRFR register.
bit_offset: 5 bit_offset: 5
bit_size: 1 bit_size: 1
enum: AFSDET
- name: LFSDET - name: LFSDET
description: Late frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97 or SPDIF mode. It can generate an interrupt if LFSDETIE bit is set in the SAI_xIM register. This flag is cleared when the software sets bit CLFSDET in SAI_xCLRFR register description: Late frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97 or SPDIF mode. It can generate an interrupt if LFSDETIE bit is set in the SAI_xIM register. This flag is cleared when the software sets bit CLFSDET in SAI_xCLRFR register
bit_offset: 6 bit_offset: 6
bit_size: 1 bit_size: 1
enum: LFSDET
- name: FLVL - name: FLVL
description: 'FIFO level threshold. This bit is read only. The FIFO level threshold flag is managed only by hardware and its setting depends on SAI block configuration (transmitter or receiver mode). If the SAI block is configured as transmitter: If SAI block is configured as receiver:' description: 'FIFO level threshold. This bit is read only. The FIFO level threshold flag is managed only by hardware and its setting depends on SAI block configuration (transmitter or receiver mode). If the SAI block is configured as transmitter: If SAI block is configured as receiver:'
bit_offset: 16 bit_offset: 16
bit_size: 3 bit_size: 3
enum: FLVL enum: FLVL
enum/AFSDET:
bit_size: 1
variants:
- name: NoError
description: No error
value: 0
- name: EarlySync
description: Frame synchronization signal is detected earlier than expected
value: 1
enum/CKSTR: enum/CKSTR:
bit_size: 1 bit_size: 1
variants: variants:
@ -368,15 +353,6 @@ enum/DS:
- name: Bit32 - name: Bit32
description: 32 bits description: 32 bits
value: 7 value: 7
enum/FFLUSH:
bit_size: 1
variants:
- name: NoFlush
description: No FIFO flush
value: 0
- name: Flush
description: FIFO flush. Programming this bit to 1 triggers the FIFO Flush. All the internal FIFO pointers (read and write) are cleared
value: 1
enum/FLVL: enum/FLVL:
bit_size: 3 bit_size: 3
variants: variants:
@ -398,15 +374,6 @@ enum/FLVL:
- name: Full - name: Full
description: FIFO full description: FIFO full
value: 5 value: 5
enum/FREQ:
bit_size: 1
variants:
- name: NoRequest
description: No FIFO request
value: 0
- name: Request
description: FIFO request to read or to write the SAI_xDR
value: 1
enum/FSOFF: enum/FSOFF:
bit_size: 1 bit_size: 1
variants: variants:
@ -443,15 +410,6 @@ enum/FTH:
- name: Full - name: Full
description: FIFO full description: FIFO full
value: 4 value: 4
enum/LFSDET:
bit_size: 1
variants:
- name: NoError
description: No error
value: 0
- name: NoSync
description: Frame synchronization signal is not present at the right time
value: 1
enum/LSBFIRST: enum/LSBFIRST:
bit_size: 1 bit_size: 1
variants: variants:
@ -485,15 +443,6 @@ enum/MONO:
- name: Mono - name: Mono
description: Mono mode description: Mono mode
value: 1 value: 1
enum/MUTEDET:
bit_size: 1
variants:
- name: NoMute
description: No MUTE detection on the SD input line
value: 0
- name: Mute
description: MUTE value detected on the SD input line (0 value) for a specified number of consecutive audio frame
value: 1
enum/MUTEVAL: enum/MUTEVAL:
bit_size: 1 bit_size: 1
variants: variants:
@ -521,15 +470,6 @@ enum/OUTDRIV:
- name: Immediately - name: Immediately
description: Audio block output driven immediately after the setting of this bit description: Audio block output driven immediately after the setting of this bit
value: 1 value: 1
enum/OVRUDR:
bit_size: 1
variants:
- name: NoError
description: No overrun/underrun error
value: 0
- name: Overrun
description: Overrun/underrun error detection
value: 1
enum/PRTCFG: enum/PRTCFG:
bit_size: 2 bit_size: 2
variants: variants:

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@ -148,7 +148,6 @@ fieldset/CR2:
description: FIFO flush. This bit is set by software. It is always read as 0. This bit should be configured when the SAI is disabled. description: FIFO flush. This bit is set by software. It is always read as 0. This bit should be configured when the SAI is disabled.
bit_offset: 3 bit_offset: 3
bit_size: 1 bit_size: 1
enum: FFLUSH
- name: TRIS - name: TRIS
description: 'Tristate management on data line. This bit is set and cleared by software. It is meaningful only if the audio block is configured as a transmitter. This bit is not used when the audio block is configured in SPDIF mode. It should be configured when SAI is disabled. Refer to Section: Output data line management on an inactive slot for more details.' description: 'Tristate management on data line. This bit is set and cleared by software. It is meaningful only if the audio block is configured as a transmitter. This bit is not used when the audio block is configured in SPDIF mode. It should be configured when SAI is disabled. Refer to Section: Output data line management on an inactive slot for more details.'
bit_offset: 4 bit_offset: 4
@ -278,12 +277,10 @@ fieldset/SR:
description: Overrun / underrun. This bit is read only. The overrun and underrun conditions can occur only when the audio block is configured as a receiver and a transmitter, respectively. It can generate an interrupt if OVRUDRIE bit is set in SAI_xIM register. This flag is cleared when the software sets COVRUDR bit in SAI_xCLRFR register. description: Overrun / underrun. This bit is read only. The overrun and underrun conditions can occur only when the audio block is configured as a receiver and a transmitter, respectively. It can generate an interrupt if OVRUDRIE bit is set in SAI_xIM register. This flag is cleared when the software sets COVRUDR bit in SAI_xCLRFR register.
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
enum: OVRUDR
- name: MUTEDET - name: MUTEDET
description: Mute detection. This bit is read only. This flag is set if consecutive 0 values are received in each slot of a given audio frame and for a consecutive number of audio frames (set in the MUTECNT bit in the SAI_xCR2 register). It can generate an interrupt if MUTEDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets bit CMUTEDET in the SAI_xCLRFR register. description: Mute detection. This bit is read only. This flag is set if consecutive 0 values are received in each slot of a given audio frame and for a consecutive number of audio frames (set in the MUTECNT bit in the SAI_xCR2 register). It can generate an interrupt if MUTEDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets bit CMUTEDET in the SAI_xCLRFR register.
bit_offset: 1 bit_offset: 1
bit_size: 1 bit_size: 1
enum: MUTEDET
- name: WCKCFG - name: WCKCFG
description: Wrong clock configuration flag. This bit is read only. This bit is used only when the audio block operates in master mode (MODE[1] = 0) and NODIV = 0. It can generate an interrupt if WCKCFGIE bit is set in SAI_xIM register. This flag is cleared when the software sets CWCKCFG bit in SAI_xCLRFR register. description: Wrong clock configuration flag. This bit is read only. This bit is used only when the audio block operates in master mode (MODE[1] = 0) and NODIV = 0. It can generate an interrupt if WCKCFGIE bit is set in SAI_xIM register. This flag is cleared when the software sets CWCKCFG bit in SAI_xCLRFR register.
bit_offset: 2 bit_offset: 2
@ -293,7 +290,6 @@ fieldset/SR:
description: 'FIFO request. This bit is read only. The request depends on the audio block configuration: If the block is configured in transmission mode, the FIFO request is related to a write request operation in the SAI_xDR. If the block configured in reception, the FIFO request related to a read request operation from the SAI_xDR. This flag can generate an interrupt if FREQIE bit is set in SAI_xIM register.' description: 'FIFO request. This bit is read only. The request depends on the audio block configuration: If the block is configured in transmission mode, the FIFO request is related to a write request operation in the SAI_xDR. If the block configured in reception, the FIFO request related to a read request operation from the SAI_xDR. This flag can generate an interrupt if FREQIE bit is set in SAI_xIM register.'
bit_offset: 3 bit_offset: 3
bit_size: 1 bit_size: 1
enum: FREQ
- name: CNRDY - name: CNRDY
description: Codec not ready. This bit is read only. This bit is used only when the AC97 audio protocol is selected in the SAI_xCR1 register and configured in receiver mode. It can generate an interrupt if CNRDYIE bit is set in SAI_xIM register. This flag is cleared when the software sets CCNRDY bit in SAI_xCLRFR register. description: Codec not ready. This bit is read only. This bit is used only when the AC97 audio protocol is selected in the SAI_xCR1 register and configured in receiver mode. It can generate an interrupt if CNRDYIE bit is set in SAI_xIM register. This flag is cleared when the software sets CCNRDY bit in SAI_xCLRFR register.
bit_offset: 4 bit_offset: 4
@ -303,26 +299,15 @@ fieldset/SR:
description: Anticipated frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97or SPDIF mode. It can generate an interrupt if AFSDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets CAFSDET bit in SAI_xCLRFR register. description: Anticipated frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97or SPDIF mode. It can generate an interrupt if AFSDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets CAFSDET bit in SAI_xCLRFR register.
bit_offset: 5 bit_offset: 5
bit_size: 1 bit_size: 1
enum: AFSDET
- name: LFSDET - name: LFSDET
description: Late frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97 or SPDIF mode. It can generate an interrupt if LFSDETIE bit is set in the SAI_xIM register. This flag is cleared when the software sets bit CLFSDET in SAI_xCLRFR register description: Late frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97 or SPDIF mode. It can generate an interrupt if LFSDETIE bit is set in the SAI_xIM register. This flag is cleared when the software sets bit CLFSDET in SAI_xCLRFR register
bit_offset: 6 bit_offset: 6
bit_size: 1 bit_size: 1
enum: LFSDET
- name: FLVL - name: FLVL
description: 'FIFO level threshold. This bit is read only. The FIFO level threshold flag is managed only by hardware and its setting depends on SAI block configuration (transmitter or receiver mode). If the SAI block is configured as transmitter: If SAI block is configured as receiver:' description: 'FIFO level threshold. This bit is read only. The FIFO level threshold flag is managed only by hardware and its setting depends on SAI block configuration (transmitter or receiver mode). If the SAI block is configured as transmitter: If SAI block is configured as receiver:'
bit_offset: 16 bit_offset: 16
bit_size: 3 bit_size: 3
enum: FLVL enum: FLVL
enum/AFSDET:
bit_size: 1
variants:
- name: NoError
description: No error
value: 0
- name: EarlySync
description: Frame synchronization signal is detected earlier than expected
value: 1
enum/CKSTR: enum/CKSTR:
bit_size: 1 bit_size: 1
variants: variants:
@ -383,15 +368,6 @@ enum/DS:
- name: Bit32 - name: Bit32
description: 32 bits description: 32 bits
value: 7 value: 7
enum/FFLUSH:
bit_size: 1
variants:
- name: NoFlush
description: No FIFO flush
value: 0
- name: Flush
description: FIFO flush. Programming this bit to 1 triggers the FIFO Flush. All the internal FIFO pointers (read and write) are cleared
value: 1
enum/FLVL: enum/FLVL:
bit_size: 3 bit_size: 3
variants: variants:
@ -413,15 +389,6 @@ enum/FLVL:
- name: Full - name: Full
description: FIFO full description: FIFO full
value: 5 value: 5
enum/FREQ:
bit_size: 1
variants:
- name: NoRequest
description: No FIFO request
value: 0
- name: Request
description: FIFO request to read or to write the SAI_xDR
value: 1
enum/FSOFF: enum/FSOFF:
bit_size: 1 bit_size: 1
variants: variants:
@ -458,15 +425,6 @@ enum/FTH:
- name: Full - name: Full
description: FIFO full description: FIFO full
value: 4 value: 4
enum/LFSDET:
bit_size: 1
variants:
- name: NoError
description: No error
value: 0
- name: NoSync
description: Frame synchronization signal is not present at the right time
value: 1
enum/LSBFIRST: enum/LSBFIRST:
bit_size: 1 bit_size: 1
variants: variants:
@ -500,15 +458,6 @@ enum/MONO:
- name: Mono - name: Mono
description: Mono mode description: Mono mode
value: 1 value: 1
enum/MUTEDET:
bit_size: 1
variants:
- name: NoMute
description: No MUTE detection on the SD input line
value: 0
- name: Mute
description: MUTE value detected on the SD input line (0 value) for a specified number of consecutive audio frame
value: 1
enum/MUTEVAL: enum/MUTEVAL:
bit_size: 1 bit_size: 1
variants: variants:
@ -536,15 +485,6 @@ enum/OUTDRIV:
- name: Immediately - name: Immediately
description: Audio block output driven immediately after the setting of this bit description: Audio block output driven immediately after the setting of this bit
value: 1 value: 1
enum/OVRUDR:
bit_size: 1
variants:
- name: NoError
description: No overrun/underrun error
value: 0
- name: Overrun
description: Overrun/underrun error detection
value: 1
enum/PRTCFG: enum/PRTCFG:
bit_size: 2 bit_size: 2
variants: variants:

View File

@ -351,12 +351,10 @@ fieldset/SR:
description: Overrun / underrun. This bit is read only. The overrun and underrun conditions can occur only when the audio block is configured as a receiver and a transmitter, respectively. It can generate an interrupt if OVRUDRIE bit is set in SAI_xIM register. This flag is cleared when the software sets COVRUDR bit in SAI_xCLRFR register. description: Overrun / underrun. This bit is read only. The overrun and underrun conditions can occur only when the audio block is configured as a receiver and a transmitter, respectively. It can generate an interrupt if OVRUDRIE bit is set in SAI_xIM register. This flag is cleared when the software sets COVRUDR bit in SAI_xCLRFR register.
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
enum: OVRUDR
- name: MUTEDET - name: MUTEDET
description: Mute detection. This bit is read only. This flag is set if consecutive 0 values are received in each slot of a given audio frame and for a consecutive number of audio frames (set in the MUTECNT bit in the SAI_xCR2 register). It can generate an interrupt if MUTEDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets bit CMUTEDET in the SAI_xCLRFR register. description: Mute detection. This bit is read only. This flag is set if consecutive 0 values are received in each slot of a given audio frame and for a consecutive number of audio frames (set in the MUTECNT bit in the SAI_xCR2 register). It can generate an interrupt if MUTEDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets bit CMUTEDET in the SAI_xCLRFR register.
bit_offset: 1 bit_offset: 1
bit_size: 1 bit_size: 1
enum: MUTEDET
- name: WCKCFG - name: WCKCFG
description: Wrong clock configuration flag. This bit is read only. This bit is used only when the audio block operates in master mode (MODE[1] = 0) and NODIV = 0. It can generate an interrupt if WCKCFGIE bit is set in SAI_xIM register. This flag is cleared when the software sets CWCKCFG bit in SAI_xCLRFR register. description: Wrong clock configuration flag. This bit is read only. This bit is used only when the audio block operates in master mode (MODE[1] = 0) and NODIV = 0. It can generate an interrupt if WCKCFGIE bit is set in SAI_xIM register. This flag is cleared when the software sets CWCKCFG bit in SAI_xCLRFR register.
bit_offset: 2 bit_offset: 2
@ -366,7 +364,6 @@ fieldset/SR:
description: 'FIFO request. This bit is read only. The request depends on the audio block configuration: If the block is configured in transmission mode, the FIFO request is related to a write request operation in the SAI_xDR. If the block configured in reception, the FIFO request related to a read request operation from the SAI_xDR. This flag can generate an interrupt if FREQIE bit is set in SAI_xIM register.' description: 'FIFO request. This bit is read only. The request depends on the audio block configuration: If the block is configured in transmission mode, the FIFO request is related to a write request operation in the SAI_xDR. If the block configured in reception, the FIFO request related to a read request operation from the SAI_xDR. This flag can generate an interrupt if FREQIE bit is set in SAI_xIM register.'
bit_offset: 3 bit_offset: 3
bit_size: 1 bit_size: 1
enum: FREQ
- name: CNRDY - name: CNRDY
description: Codec not ready. This bit is read only. This bit is used only when the AC97 audio protocol is selected in the SAI_xCR1 register and configured in receiver mode. It can generate an interrupt if CNRDYIE bit is set in SAI_xIM register. This flag is cleared when the software sets CCNRDY bit in SAI_xCLRFR register. description: Codec not ready. This bit is read only. This bit is used only when the AC97 audio protocol is selected in the SAI_xCR1 register and configured in receiver mode. It can generate an interrupt if CNRDYIE bit is set in SAI_xIM register. This flag is cleared when the software sets CCNRDY bit in SAI_xCLRFR register.
bit_offset: 4 bit_offset: 4
@ -376,26 +373,15 @@ fieldset/SR:
description: Anticipated frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97or SPDIF mode. It can generate an interrupt if AFSDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets CAFSDET bit in SAI_xCLRFR register. description: Anticipated frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97or SPDIF mode. It can generate an interrupt if AFSDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets CAFSDET bit in SAI_xCLRFR register.
bit_offset: 5 bit_offset: 5
bit_size: 1 bit_size: 1
enum: AFSDET
- name: LFSDET - name: LFSDET
description: Late frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97 or SPDIF mode. It can generate an interrupt if LFSDETIE bit is set in the SAI_xIM register. This flag is cleared when the software sets bit CLFSDET in SAI_xCLRFR register description: Late frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97 or SPDIF mode. It can generate an interrupt if LFSDETIE bit is set in the SAI_xIM register. This flag is cleared when the software sets bit CLFSDET in SAI_xCLRFR register
bit_offset: 6 bit_offset: 6
bit_size: 1 bit_size: 1
enum: LFSDET
- name: FLVL - name: FLVL
description: 'FIFO level threshold. This bit is read only. The FIFO level threshold flag is managed only by hardware and its setting depends on SAI block configuration (transmitter or receiver mode). If the SAI block is configured as transmitter: If SAI block is configured as receiver:' description: 'FIFO level threshold. This bit is read only. The FIFO level threshold flag is managed only by hardware and its setting depends on SAI block configuration (transmitter or receiver mode). If the SAI block is configured as transmitter: If SAI block is configured as receiver:'
bit_offset: 16 bit_offset: 16
bit_size: 3 bit_size: 3
enum: FLVL enum: FLVL
enum/AFSDET:
bit_size: 1
variants:
- name: NoError
description: No error
value: 0
- name: EarlySync
description: Frame synchronization signal is detected earlier than expected
value: 1
enum/CKSTR: enum/CKSTR:
bit_size: 1 bit_size: 1
variants: variants:
@ -477,15 +463,6 @@ enum/FLVL:
- name: Full - name: Full
description: FIFO full description: FIFO full
value: 5 value: 5
enum/FREQ:
bit_size: 1
variants:
- name: NoRequest
description: No FIFO request
value: 0
- name: Request
description: FIFO request to read or to write the SAI_xDR
value: 1
enum/FSOFF: enum/FSOFF:
bit_size: 1 bit_size: 1
variants: variants:
@ -522,15 +499,6 @@ enum/FTH:
- name: Full - name: Full
description: FIFO full description: FIFO full
value: 4 value: 4
enum/LFSDET:
bit_size: 1
variants:
- name: NoError
description: No error
value: 0
- name: NoSync
description: Frame synchronization signal is not present at the right time
value: 1
enum/LSBFIRST: enum/LSBFIRST:
bit_size: 1 bit_size: 1
variants: variants:
@ -564,15 +532,6 @@ enum/MONO:
- name: Mono - name: Mono
description: Mono mode description: Mono mode
value: 1 value: 1
enum/MUTEDET:
bit_size: 1
variants:
- name: NoMute
description: No MUTE detection on the SD input line
value: 0
- name: Mute
description: MUTE value detected on the SD input line (0 value) for a specified number of consecutive audio frame
value: 1
enum/MUTEVAL: enum/MUTEVAL:
bit_size: 1 bit_size: 1
variants: variants:
@ -600,15 +559,6 @@ enum/OUTDRIV:
- name: Immediately - name: Immediately
description: Audio block output driven immediately after the setting of this bit description: Audio block output driven immediately after the setting of this bit
value: 1 value: 1
enum/OVRUDR:
bit_size: 1
variants:
- name: NoError
description: No overrun/underrun error
value: 0
- name: Overrun
description: Overrun/underrun error detection
value: 1
enum/PRTCFG: enum/PRTCFG:
bit_size: 2 bit_size: 2
variants: variants:

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@ -355,12 +355,10 @@ fieldset/SR:
description: Overrun / underrun. This bit is read only. The overrun and underrun conditions can occur only when the audio block is configured as a receiver and a transmitter, respectively. It can generate an interrupt if OVRUDRIE bit is set in SAI_xIM register. This flag is cleared when the software sets COVRUDR bit in SAI_xCLRFR register. description: Overrun / underrun. This bit is read only. The overrun and underrun conditions can occur only when the audio block is configured as a receiver and a transmitter, respectively. It can generate an interrupt if OVRUDRIE bit is set in SAI_xIM register. This flag is cleared when the software sets COVRUDR bit in SAI_xCLRFR register.
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
enum: OVRUDR
- name: MUTEDET - name: MUTEDET
description: Mute detection. This bit is read only. This flag is set if consecutive 0 values are received in each slot of a given audio frame and for a consecutive number of audio frames (set in the MUTECNT bit in the SAI_xCR2 register). It can generate an interrupt if MUTEDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets bit CMUTEDET in the SAI_xCLRFR register. description: Mute detection. This bit is read only. This flag is set if consecutive 0 values are received in each slot of a given audio frame and for a consecutive number of audio frames (set in the MUTECNT bit in the SAI_xCR2 register). It can generate an interrupt if MUTEDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets bit CMUTEDET in the SAI_xCLRFR register.
bit_offset: 1 bit_offset: 1
bit_size: 1 bit_size: 1
enum: MUTEDET
- name: WCKCFG - name: WCKCFG
description: Wrong clock configuration flag. This bit is read only. This bit is used only when the audio block operates in master mode (MODE[1] = 0) and NODIV = 0. It can generate an interrupt if WCKCFGIE bit is set in SAI_xIM register. This flag is cleared when the software sets CWCKCFG bit in SAI_xCLRFR register. description: Wrong clock configuration flag. This bit is read only. This bit is used only when the audio block operates in master mode (MODE[1] = 0) and NODIV = 0. It can generate an interrupt if WCKCFGIE bit is set in SAI_xIM register. This flag is cleared when the software sets CWCKCFG bit in SAI_xCLRFR register.
bit_offset: 2 bit_offset: 2
@ -370,7 +368,6 @@ fieldset/SR:
description: 'FIFO request. This bit is read only. The request depends on the audio block configuration: If the block is configured in transmission mode, the FIFO request is related to a write request operation in the SAI_xDR. If the block configured in reception, the FIFO request related to a read request operation from the SAI_xDR. This flag can generate an interrupt if FREQIE bit is set in SAI_xIM register.' description: 'FIFO request. This bit is read only. The request depends on the audio block configuration: If the block is configured in transmission mode, the FIFO request is related to a write request operation in the SAI_xDR. If the block configured in reception, the FIFO request related to a read request operation from the SAI_xDR. This flag can generate an interrupt if FREQIE bit is set in SAI_xIM register.'
bit_offset: 3 bit_offset: 3
bit_size: 1 bit_size: 1
enum: FREQ
- name: CNRDY - name: CNRDY
description: Codec not ready. This bit is read only. This bit is used only when the AC97 audio protocol is selected in the SAI_xCR1 register and configured in receiver mode. It can generate an interrupt if CNRDYIE bit is set in SAI_xIM register. This flag is cleared when the software sets CCNRDY bit in SAI_xCLRFR register. description: Codec not ready. This bit is read only. This bit is used only when the AC97 audio protocol is selected in the SAI_xCR1 register and configured in receiver mode. It can generate an interrupt if CNRDYIE bit is set in SAI_xIM register. This flag is cleared when the software sets CCNRDY bit in SAI_xCLRFR register.
bit_offset: 4 bit_offset: 4
@ -380,26 +377,15 @@ fieldset/SR:
description: Anticipated frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97or SPDIF mode. It can generate an interrupt if AFSDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets CAFSDET bit in SAI_xCLRFR register. description: Anticipated frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97or SPDIF mode. It can generate an interrupt if AFSDETIE bit is set in SAI_xIM register. This flag is cleared when the software sets CAFSDET bit in SAI_xCLRFR register.
bit_offset: 5 bit_offset: 5
bit_size: 1 bit_size: 1
enum: AFSDET
- name: LFSDET - name: LFSDET
description: Late frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97 or SPDIF mode. It can generate an interrupt if LFSDETIE bit is set in the SAI_xIM register. This flag is cleared when the software sets bit CLFSDET in SAI_xCLRFR register description: Late frame synchronization detection. This bit is read only. This flag can be set only if the audio block is configured in slave mode. It is not used in AC97 or SPDIF mode. It can generate an interrupt if LFSDETIE bit is set in the SAI_xIM register. This flag is cleared when the software sets bit CLFSDET in SAI_xCLRFR register
bit_offset: 6 bit_offset: 6
bit_size: 1 bit_size: 1
enum: LFSDET
- name: FLVL - name: FLVL
description: 'FIFO level threshold. This bit is read only. The FIFO level threshold flag is managed only by hardware and its setting depends on SAI block configuration (transmitter or receiver mode). If the SAI block is configured as transmitter: If SAI block is configured as receiver:' description: 'FIFO level threshold. This bit is read only. The FIFO level threshold flag is managed only by hardware and its setting depends on SAI block configuration (transmitter or receiver mode). If the SAI block is configured as transmitter: If SAI block is configured as receiver:'
bit_offset: 16 bit_offset: 16
bit_size: 3 bit_size: 3
enum: FLVL enum: FLVL
enum/AFSDET:
bit_size: 1
variants:
- name: NoError
description: No error
value: 0
- name: EarlySync
description: Frame synchronization signal is detected earlier than expected
value: 1
enum/CKSTR: enum/CKSTR:
bit_size: 1 bit_size: 1
variants: variants:
@ -481,15 +467,6 @@ enum/FLVL:
- name: Full - name: Full
description: FIFO full description: FIFO full
value: 5 value: 5
enum/FREQ:
bit_size: 1
variants:
- name: NoRequest
description: No FIFO request
value: 0
- name: Request
description: FIFO request to read or to write the SAI_xDR
value: 1
enum/FSOFF: enum/FSOFF:
bit_size: 1 bit_size: 1
variants: variants:
@ -526,15 +503,6 @@ enum/FTH:
- name: Full - name: Full
description: FIFO full description: FIFO full
value: 4 value: 4
enum/LFSDET:
bit_size: 1
variants:
- name: NoError
description: No error
value: 0
- name: NoSync
description: Frame synchronization signal is not present at the right time
value: 1
enum/LSBFIRST: enum/LSBFIRST:
bit_size: 1 bit_size: 1
variants: variants:
@ -568,15 +536,6 @@ enum/MONO:
- name: Mono - name: Mono
description: Mono mode description: Mono mode
value: 1 value: 1
enum/MUTEDET:
bit_size: 1
variants:
- name: NoMute
description: No MUTE detection on the SD input line
value: 0
- name: Mute
description: MUTE value detected on the SD input line (0 value) for a specified number of consecutive audio frame
value: 1
enum/MUTEVAL: enum/MUTEVAL:
bit_size: 1 bit_size: 1
variants: variants:
@ -604,15 +563,6 @@ enum/OUTDRIV:
- name: Immediately - name: Immediately
description: Audio block output driven immediately after the setting of this bit description: Audio block output driven immediately after the setting of this bit
value: 1 value: 1
enum/OVRUDR:
bit_size: 1
variants:
- name: NoError
description: No overrun/underrun error
value: 0
- name: Overrun
description: Overrun/underrun error detection
value: 1
enum/PRTCFG: enum/PRTCFG:
bit_size: 2 bit_size: 2
variants: variants:

3
transforms/SAI.yaml Normal file
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@ -0,0 +1,3 @@
transforms:
- !DeleteEnums
from: ^(AFSDET|AFSDET|FREQ|LFSDET|MUTEDET|OVRUDR|FFLUSH)$