diff --git a/data/registers/rcc_f4.yaml b/data/registers/rcc_f4.yaml index b395f0a..98bc4fe 100644 --- a/data/registers/rcc_f4.yaml +++ b/data/registers/rcc_f4.yaml @@ -420,7 +420,7 @@ fieldset/AHB2LPENR: description: Flexible memory controller module clock enable during Sleep mode bit_offset: 0 bit_size: 1 - - name: QSPILPEN + - name: QUADSPILPEN description: QUADSPI memory controller module clock enable during Sleep mode bit_offset: 1 bit_size: 1 @@ -489,7 +489,7 @@ fieldset/AHB3LPENR: description: Flexible static memory controller module clock enable during Sleep mode bit_offset: 0 bit_size: 1 - - name: QSPILPEN + - name: QUADSPILPEN description: QUADSPI memory controller module clock enable during Sleep mode bit_offset: 1 bit_size: 1 @@ -504,7 +504,7 @@ fieldset/AHB3RSTR: description: Flexible static memory controller module reset bit_offset: 0 bit_size: 1 - - name: QSPIRST + - name: QUADSPIRST description: QUADSPI module reset bit_offset: 1 bit_size: 1 diff --git a/data/registers/rcc_g4.yaml b/data/registers/rcc_g4.yaml index 67cf1ec..21108fc 100644 --- a/data/registers/rcc_g4.yaml +++ b/data/registers/rcc_g4.yaml @@ -435,7 +435,7 @@ fieldset/AHB3RSTR: description: Flexible memory controller reset bit_offset: 0 bit_size: 1 - - name: QSPIRST + - name: QUADSPIRST description: Quad SPI 1 module reset bit_offset: 8 bit_size: 1 @@ -446,7 +446,7 @@ fieldset/AHB3SMENR: description: Flexible memory controller clocks enable during Sleep and Stop modes bit_offset: 0 bit_size: 1 - - name: QSPISMEN + - name: QUADSPISMEN description: QUADSPI memory interface clock enable during Sleep and Stop modes bit_offset: 8 bit_size: 1 @@ -1040,7 +1040,7 @@ fieldset/CCIPR2: description: I2C4 clock source selection bit_offset: 0 bit_size: 2 - - name: QSPISEL + - name: QUADSPISEL description: Octospi clock source selection bit_offset: 20 bit_size: 2 diff --git a/data/registers/rcc_h7.yaml b/data/registers/rcc_h7.yaml index 32a408d..3dfd9a6 100644 --- a/data/registers/rcc_h7.yaml +++ b/data/registers/rcc_h7.yaml @@ -613,7 +613,7 @@ fieldset/AHB3LPENR: description: FMC Peripheral Clocks Enable During CSleep Mode bit_offset: 12 bit_size: 1 - - name: QSPILPEN + - name: QUADSPILPEN description: QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode bit_offset: 14 bit_size: 1 @@ -672,7 +672,7 @@ fieldset/AHB3RSTR: description: FMC block reset bit_offset: 12 bit_size: 1 - - name: QSPIRST + - name: QUADSPIRST description: QUADSPI and QUADSPI delay block reset bit_offset: 14 bit_size: 1 @@ -1989,7 +1989,7 @@ fieldset/C1_AHB3LPENR: description: FMC Peripheral Clocks Enable During CSleep Mode bit_offset: 12 bit_size: 1 - - name: QSPILPEN + - name: QUADSPILPEN description: QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode bit_offset: 14 bit_size: 1 @@ -3046,7 +3046,7 @@ fieldset/D1CCIPR: bit_offset: 0 bit_size: 2 enum: FMCSEL - - name: QSPISEL + - name: QUADSPISEL description: QUADSPI kernel clock source selection bit_offset: 4 bit_size: 2 diff --git a/data/registers/rcc_h7ab.yaml b/data/registers/rcc_h7ab.yaml index a074b3b..96512be 100644 --- a/data/registers/rcc_h7ab.yaml +++ b/data/registers/rcc_h7ab.yaml @@ -549,7 +549,7 @@ fieldset/AHB3LPENR: description: FMC Peripheral Clocks Enable During CSleep Mode bit_offset: 12 bit_size: 1 - - name: QSPILPEN + - name: QUADSPILPEN description: QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode bit_offset: 14 bit_size: 1 @@ -608,7 +608,7 @@ fieldset/AHB3RSTR: description: FMC block reset bit_offset: 12 bit_size: 1 - - name: QSPIRST + - name: QUADSPIRST description: QUADSPI and QUADSPI delay block reset bit_offset: 14 bit_size: 1 diff --git a/data/registers/rcc_h7rm0433.yaml b/data/registers/rcc_h7rm0433.yaml index 352e67b..c83d3b9 100644 --- a/data/registers/rcc_h7rm0433.yaml +++ b/data/registers/rcc_h7rm0433.yaml @@ -613,7 +613,7 @@ fieldset/AHB3LPENR: description: FMC Peripheral Clocks Enable During CSleep Mode bit_offset: 12 bit_size: 1 - - name: QSPILPEN + - name: QUADSPILPEN description: QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode bit_offset: 14 bit_size: 1 @@ -672,7 +672,7 @@ fieldset/AHB3RSTR: description: FMC block reset bit_offset: 12 bit_size: 1 - - name: QSPIRST + - name: QUADSPIRST description: QUADSPI and QUADSPI delay block reset bit_offset: 14 bit_size: 1 @@ -1989,7 +1989,7 @@ fieldset/C1_AHB3LPENR: description: FMC Peripheral Clocks Enable During CSleep Mode bit_offset: 12 bit_size: 1 - - name: QSPILPEN + - name: QUADSPILPEN description: QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode bit_offset: 14 bit_size: 1 @@ -3046,7 +3046,7 @@ fieldset/D1CCIPR: bit_offset: 0 bit_size: 2 enum: FMCSEL - - name: QSPISEL + - name: QUADSPISEL description: QUADSPI kernel clock source selection bit_offset: 4 bit_size: 2 diff --git a/data/registers/rcc_l4.yaml b/data/registers/rcc_l4.yaml index 70018d1..58a8177 100644 --- a/data/registers/rcc_l4.yaml +++ b/data/registers/rcc_l4.yaml @@ -412,8 +412,8 @@ fieldset/AHB3ENR: description: Flexible memory controller clock enable bit_offset: 0 bit_size: 1 - - name: QSPIEN - description: QSPIEN + - name: QUADSPIEN + description: QUADSPIEN bit_offset: 8 bit_size: 1 fieldset/AHB3RSTR: @@ -423,7 +423,7 @@ fieldset/AHB3RSTR: description: Flexible memory controller reset bit_offset: 0 bit_size: 1 - - name: QSPIRST + - name: QUADSPIRST description: Quad SPI memory interface reset bit_offset: 8 bit_size: 1 @@ -434,8 +434,8 @@ fieldset/AHB3SMENR: description: Flexible memory controller clocks enable during Sleep and Stop modes bit_offset: 0 bit_size: 1 - - name: QSPISMEN - description: QSPISMEN + - name: QUADSPISMEN + description: QUADSPISMEN bit_offset: 8 bit_size: 1 fieldset/APB1ENR1: diff --git a/data/registers/rcc_wb.yaml b/data/registers/rcc_wb.yaml index 9acca78..e88bce7 100644 --- a/data/registers/rcc_wb.yaml +++ b/data/registers/rcc_wb.yaml @@ -407,7 +407,7 @@ fieldset/AHB3ENR: fieldset/AHB3RSTR: description: AHB3 peripheral reset register fields: - - name: QSPIRST + - name: QUADSPIRST description: Quad SPI memory interface reset bit_offset: 8 bit_size: 1 @@ -438,8 +438,8 @@ fieldset/AHB3RSTR: fieldset/AHB3SMENR: description: AHB3 peripheral clocks enable in Sleep and Stop modes register fields: - - name: QSPISMEN - description: QSPISMEN + - name: QUADSPISMEN + description: QUADSPISMEN bit_offset: 8 bit_size: 1 - name: PKASMEN