diff --git a/data/registers/dsihost_v1.yaml b/data/registers/dsihost_v1.yaml new file mode 100644 index 0000000..c1fc718 --- /dev/null +++ b/data/registers/dsihost_v1.yaml @@ -0,0 +1,1741 @@ +block/DSIHOST: + description: DSI Host. + items: + - name: VR + description: DSI Host Version Register. + byte_offset: 0 + access: Read + fieldset: VR + - name: CR + description: DSI Host Control Register. + byte_offset: 4 + fieldset: CR + - name: CCR + description: DSI HOST Clock Control Register. + byte_offset: 8 + fieldset: CCR + - name: LVCIDR + description: DSI Host LTDC VCID Register. + byte_offset: 12 + fieldset: LVCIDR + - name: LCOLCR + description: DSI Host LTDC Color Coding Register. + byte_offset: 16 + fieldset: LCOLCR + - name: LPCR + description: DSI Host LTDC Polarity Configuration Register. + byte_offset: 20 + fieldset: LPCR + - name: LPMCR + description: DSI Host Low-Power mode Configuration Register. + byte_offset: 24 + fieldset: LPMCR + - name: PCR + description: DSI Host Protocol Configuration Register. + byte_offset: 44 + fieldset: PCR + - name: GVCIDR + description: DSI Host Generic VCID Register. + byte_offset: 48 + fieldset: GVCIDR + - name: MCR + description: DSI Host mode Configuration Register. + byte_offset: 52 + fieldset: MCR + - name: VMCR + description: DSI Host Video mode Configuration Register. + byte_offset: 56 + fieldset: VMCR + - name: VPCR + description: DSI Host Video Packet Configuration Register. + byte_offset: 60 + fieldset: VPCR + - name: VCCR + description: DSI Host Video Chunks Configuration Register. + byte_offset: 64 + fieldset: VCCR + - name: VNPCR + description: DSI Host Video Null Packet Configuration Register. + byte_offset: 68 + fieldset: VNPCR + - name: VHSACR + description: DSI Host Video HSA Configuration Register. + byte_offset: 72 + fieldset: VHSACR + - name: VHBPCR + description: DSI Host Video HBP Configuration Register. + byte_offset: 76 + fieldset: VHBPCR + - name: VLCR + description: DSI Host Video Line Configuration Register. + byte_offset: 80 + fieldset: VLCR + - name: VVSACR + description: DSI Host Video VSA Configuration Register. + byte_offset: 84 + fieldset: VVSACR + - name: VVBPCR + description: DSI Host Video VBP Configuration Register. + byte_offset: 88 + fieldset: VVBPCR + - name: VVFPCR + description: DSI Host Video VFP Configuration Register. + byte_offset: 92 + fieldset: VVFPCR + - name: VVACR + description: DSI Host Video VA Configuration Register. + byte_offset: 96 + fieldset: VVACR + - name: LCCR + description: DSI Host LTDC Command Configuration Register. + byte_offset: 100 + fieldset: LCCR + - name: CMCR + description: DSI Host Command mode Configuration Register. + byte_offset: 104 + fieldset: CMCR + - name: GHCR + description: DSI Host Generic Header Configuration Register. + byte_offset: 108 + fieldset: GHCR + - name: GPDR + description: DSI Host Generic Payload Data Register. + byte_offset: 112 + fieldset: GPDR + - name: GPSR + description: DSI Host Generic Packet Status Register. + byte_offset: 116 + access: Read + fieldset: GPSR + - name: TCCR0 + description: DSI Host Timeout Counter Configuration Register 0. + byte_offset: 120 + fieldset: TCCR0 + - name: TCCR1 + description: DSI Host Timeout Counter Configuration Register 1. + byte_offset: 124 + fieldset: TCCR1 + - name: TCCR2 + description: DSI Host Timeout Counter Configuration Register 2. + byte_offset: 128 + fieldset: TCCR2 + - name: TCCR3 + description: DSI Host Timeout Counter Configuration Register 3. + byte_offset: 132 + fieldset: TCCR3 + - name: TCCR4 + description: DSI Host Timeout Counter Configuration Register 4. + byte_offset: 136 + fieldset: TCCR4 + - name: TCCR5 + description: DSI Host Timeout Counter Configuration Register 5. + byte_offset: 140 + fieldset: TCCR5 + - name: CLCR + description: DSI Host Clock Lane Configuration Register. + byte_offset: 148 + fieldset: CLCR + - name: CLTCR + description: DSI Host Clock Lane Timer Configuration Register. + byte_offset: 152 + fieldset: CLTCR + - name: DLTCR + description: DSI Host Data Lane Timer Configuration Register. + byte_offset: 156 + fieldset: DLTCR + - name: PCTLR + description: DSI Host PHY Control Register. + byte_offset: 160 + fieldset: PCTLR + - name: PCONFR + description: DSI Host PHY Configuration Register. + byte_offset: 164 + fieldset: PCONFR + - name: PUCR + description: DSI Host PHY ULPS Control Register. + byte_offset: 168 + fieldset: PUCR + - name: PTTCR + description: DSI Host PHY TX Triggers Configuration Register. + byte_offset: 172 + fieldset: PTTCR + - name: PSR + description: DSI Host PHY Status Register. + byte_offset: 176 + access: Read + fieldset: PSR + - name: ISR0 + description: DSI Host Interrupt & Status Register 0. + byte_offset: 188 + access: Read + fieldset: ISR0 + - name: ISR1 + description: DSI Host Interrupt & Status Register 1. + byte_offset: 192 + access: Read + fieldset: ISR1 + - name: IER0 + description: DSI Host Interrupt Enable Register 0. + byte_offset: 196 + fieldset: IER0 + - name: IER1 + description: DSI Host Interrupt Enable Register 1. + byte_offset: 200 + fieldset: IER1 + - name: FIR0 + description: DSI Host Force Interrupt Register 0. + byte_offset: 216 + access: Write + fieldset: FIR0 + - name: FIR1 + description: DSI Host Force Interrupt Register 1. + byte_offset: 220 + access: Write + fieldset: FIR1 + - name: VSCR + description: DSI Host Video Shadow Control Register. + byte_offset: 256 + fieldset: VSCR + - name: LCVCIDR + description: DSI Host LTDC Current VCID Register. + byte_offset: 268 + access: Read + fieldset: LCVCIDR + - name: LCCCR + description: DSI Host LTDC Current Color Coding Register. + byte_offset: 272 + access: Read + fieldset: LCCCR + - name: LPMCCR + description: DSI Host Low-Power mode Current Configuration Register. + byte_offset: 280 + access: Read + fieldset: LPMCCR + - name: VMCCR + description: DSI Host Video mode Current Configuration Register. + byte_offset: 312 + access: Read + fieldset: VMCCR + - name: VPCCR + description: DSI Host Video Packet Current Configuration Register. + byte_offset: 316 + access: Read + fieldset: VPCCR + - name: VCCCR + description: DSI Host Video Chunks Current Configuration Register. + byte_offset: 320 + access: Read + fieldset: VCCCR + - name: VNPCCR + description: DSI Host Video Null Packet Current Configuration Register. + byte_offset: 324 + access: Read + fieldset: VNPCCR + - name: VHSACCR + description: DSI Host Video HSA Current Configuration Register. + byte_offset: 328 + access: Read + fieldset: VHSACCR + - name: VHBPCCR + description: DSI Host Video HBP Current Configuration Register. + byte_offset: 332 + access: Read + fieldset: VHBPCCR + - name: VLCCR + description: DSI Host Video Line Current Configuration Register. + byte_offset: 336 + access: Read + fieldset: VLCCR + - name: VVSACCR + description: DSI Host Video VSA Current Configuration Register. + byte_offset: 340 + access: Read + fieldset: VVSACCR + - name: VVBPCCR + description: DSI Host Video VBP Current Configuration Register. + byte_offset: 344 + access: Read + fieldset: VVBPCCR + - name: VVFPCCR + description: DSI Host Video VFP Current Configuration Register. + byte_offset: 348 + access: Read + fieldset: VVFPCCR + - name: VVACCR + description: DSI Host Video VA Current Configuration Register. + byte_offset: 352 + access: Read + fieldset: VVACCR + - name: WCFGR + description: DSI Wrapper Configuration Register. + byte_offset: 1024 + fieldset: WCFGR + - name: WCR + description: DSI Wrapper Control Register. + byte_offset: 1028 + fieldset: WCR + - name: WIER + description: DSI Wrapper Interrupt Enable Register. + byte_offset: 1032 + fieldset: WIER + - name: WISR + description: DSI Wrapper Interrupt & Status Register. + byte_offset: 1036 + access: Read + fieldset: WISR + - name: WIFCR + description: DSI Wrapper Interrupt Flag Clear Register. + byte_offset: 1040 + fieldset: WIFCR + - name: WPCR0 + description: DSI Wrapper PHY Configuration Register 0. + byte_offset: 1048 + fieldset: WPCR0 + - name: WPCR1 + description: DSI Wrapper PHY Configuration Register 1. + byte_offset: 1052 + fieldset: WPCR1 + - name: WPCR2 + description: DSI Wrapper PHY Configuration Register 2. + byte_offset: 1056 + fieldset: WPCR2 + - name: WPCR3 + description: DSI Wrapper PHY Configuration Register 3. + byte_offset: 1060 + fieldset: WPCR3 + - name: WPCR4 + description: DSI Wrapper PHY Configuration Register 4. + byte_offset: 1064 + fieldset: WPCR4 + - name: WRPCR + description: DSI Wrapper Regulator and PLL Control Register. + byte_offset: 1072 + fieldset: WRPCR +fieldset/CCR: + description: DSI HOST Clock Control Register. + fields: + - name: TXECKDIV + description: TX Escape Clock Division. + bit_offset: 0 + bit_size: 8 + - name: TOCKDIV + description: Timeout Clock Division. + bit_offset: 8 + bit_size: 8 +fieldset/CLCR: + description: DSI Host Clock Lane Configuration Register. + fields: + - name: DPCC + description: D-PHY Clock Control. + bit_offset: 0 + bit_size: 1 + - name: ACR + description: Automatic Clock lane Control. + bit_offset: 1 + bit_size: 1 +fieldset/CLTCR: + description: DSI Host Clock Lane Timer Configuration Register. + fields: + - name: LP2HS_TIME + description: Low-Power to High-Speed Time. + bit_offset: 0 + bit_size: 10 + - name: HS2LP_TIME + description: High-Speed to Low-Power Time. + bit_offset: 16 + bit_size: 10 +fieldset/CMCR: + description: DSI Host Command mode Configuration Register. + fields: + - name: TEARE + description: Tearing Effect Acknowledge Request Enable. + bit_offset: 0 + bit_size: 1 + - name: ARE + description: Acknowledge Request Enable. + bit_offset: 1 + bit_size: 1 + - name: GSW0TX + description: Generic Short Write Zero parameters Transmission. + bit_offset: 8 + bit_size: 1 + - name: GSW1TX + description: Generic Short Write One parameters Transmission. + bit_offset: 9 + bit_size: 1 + - name: GSW2TX + description: Generic Short Write Two parameters Transmission. + bit_offset: 10 + bit_size: 1 + - name: GSR0TX + description: Generic Short Read Zero parameters Transmission. + bit_offset: 11 + bit_size: 1 + - name: GSR1TX + description: Generic Short Read One parameters Transmission. + bit_offset: 12 + bit_size: 1 + - name: GSR2TX + description: Generic Short Read Two parameters Transmission. + bit_offset: 13 + bit_size: 1 + - name: GLWTX + description: Generic Long Write Transmission. + bit_offset: 14 + bit_size: 1 + - name: DSW0TX + description: DCS Short Write Zero parameter Transmission. + bit_offset: 16 + bit_size: 1 + - name: DSW1TX + description: DCS Short Read One parameter Transmission. + bit_offset: 17 + bit_size: 1 + - name: DSR0TX + description: DCS Short Read Zero parameter Transmission. + bit_offset: 18 + bit_size: 1 + - name: DLWTX + description: DCS Long Write Transmission. + bit_offset: 19 + bit_size: 1 + - name: MRDPS + description: Maximum Read Packet Size. + bit_offset: 24 + bit_size: 1 +fieldset/CR: + description: DSI Host Control Register. + fields: + - name: EN + description: Enable. + bit_offset: 0 + bit_size: 1 +fieldset/DLTCR: + description: DSI Host Data Lane Timer Configuration Register. + fields: + - name: MRD_TIME + description: Maximum Read Time. + bit_offset: 0 + bit_size: 15 + - name: LP2HS_TIME + description: Low-Power To High-Speed Time. + bit_offset: 16 + bit_size: 8 + - name: HS2LP_TIME + description: High-Speed To Low-Power Time. + bit_offset: 24 + bit_size: 8 +fieldset/FIR0: + description: DSI Host Force Interrupt Register 0. + fields: + - name: FAE0 + description: Force Acknowledge Error 0. + bit_offset: 0 + bit_size: 1 + - name: FAE1 + description: Force Acknowledge Error 1. + bit_offset: 1 + bit_size: 1 + - name: FAE2 + description: Force Acknowledge Error 2. + bit_offset: 2 + bit_size: 1 + - name: FAE3 + description: Force Acknowledge Error 3. + bit_offset: 3 + bit_size: 1 + - name: FAE4 + description: Force Acknowledge Error 4. + bit_offset: 4 + bit_size: 1 + - name: FAE5 + description: Force Acknowledge Error 5. + bit_offset: 5 + bit_size: 1 + - name: FAE6 + description: Force Acknowledge Error 6. + bit_offset: 6 + bit_size: 1 + - name: FAE7 + description: Force Acknowledge Error 7. + bit_offset: 7 + bit_size: 1 + - name: FAE8 + description: Force Acknowledge Error 8. + bit_offset: 8 + bit_size: 1 + - name: FAE9 + description: Force Acknowledge Error 9. + bit_offset: 9 + bit_size: 1 + - name: FAE10 + description: Force Acknowledge Error 10. + bit_offset: 10 + bit_size: 1 + - name: FAE11 + description: Force Acknowledge Error 11. + bit_offset: 11 + bit_size: 1 + - name: FAE12 + description: Force Acknowledge Error 12. + bit_offset: 12 + bit_size: 1 + - name: FAE13 + description: Force Acknowledge Error 13. + bit_offset: 13 + bit_size: 1 + - name: FAE14 + description: Force Acknowledge Error 14. + bit_offset: 14 + bit_size: 1 + - name: FAE15 + description: Force Acknowledge Error 15. + bit_offset: 15 + bit_size: 1 + - name: FPE0 + description: Force PHY Error 0. + bit_offset: 16 + bit_size: 1 + - name: FPE1 + description: Force PHY Error 1. + bit_offset: 17 + bit_size: 1 + - name: FPE2 + description: Force PHY Error 2. + bit_offset: 18 + bit_size: 1 + - name: FPE3 + description: Force PHY Error 3. + bit_offset: 19 + bit_size: 1 + - name: FPE4 + description: Force PHY Error 4. + bit_offset: 20 + bit_size: 1 +fieldset/FIR1: + description: DSI Host Force Interrupt Register 1. + fields: + - name: FTOHSTX + description: Force Timeout High-Speed Transmission. + bit_offset: 0 + bit_size: 1 + - name: FTOLPRX + description: Force Timeout Low-Power Reception. + bit_offset: 1 + bit_size: 1 + - name: FECCSE + description: Force ECC Single-bit Error. + bit_offset: 2 + bit_size: 1 + - name: FECCME + description: Force ECC Multi-bit Error. + bit_offset: 3 + bit_size: 1 + - name: FCRCE + description: Force CRC Error. + bit_offset: 4 + bit_size: 1 + - name: FPSE + description: Force Packet Size Error. + bit_offset: 5 + bit_size: 1 + - name: FEOTPE + description: Force EoTp Error. + bit_offset: 6 + bit_size: 1 + - name: FLPWRE + description: Force LTDC Payload Write Error. + bit_offset: 7 + bit_size: 1 + - name: FGCWRE + description: Force Generic Command Write Error. + bit_offset: 8 + bit_size: 1 + - name: FGPWRE + description: Force Generic Payload Write Error. + bit_offset: 9 + bit_size: 1 + - name: FGPTXE + description: Force Generic Payload Transmit Error. + bit_offset: 10 + bit_size: 1 + - name: FGPRDE + description: Force Generic Payload Read Error. + bit_offset: 11 + bit_size: 1 + - name: FGPRXE + description: Force Generic Payload Receive Error. + bit_offset: 12 + bit_size: 1 +fieldset/GHCR: + description: DSI Host Generic Header Configuration Register. + fields: + - name: DT + description: Type. + bit_offset: 0 + bit_size: 6 + - name: VCID + description: Channel. + bit_offset: 6 + bit_size: 2 + - name: WCLSB + description: WordCount LSB. + bit_offset: 8 + bit_size: 8 + - name: WCMSB + description: WordCount MSB. + bit_offset: 16 + bit_size: 8 +fieldset/GPDR: + description: DSI Host Generic Payload Data Register. + fields: + - name: DATA1 + description: Payload Byte 1. + bit_offset: 0 + bit_size: 8 + - name: DATA2 + description: Payload Byte 2. + bit_offset: 8 + bit_size: 8 + - name: DATA3 + description: Payload Byte 3. + bit_offset: 16 + bit_size: 8 + - name: DATA4 + description: Payload Byte 4. + bit_offset: 24 + bit_size: 8 +fieldset/GPSR: + description: DSI Host Generic Packet Status Register. + fields: + - name: CMDFE + description: Command FIFO Empty. + bit_offset: 0 + bit_size: 1 + - name: CMDFF + description: Command FIFO Full. + bit_offset: 1 + bit_size: 1 + - name: PWRFE + description: Payload Write FIFO Empty. + bit_offset: 2 + bit_size: 1 + - name: PWRFF + description: Payload Write FIFO Full. + bit_offset: 3 + bit_size: 1 + - name: PRDFE + description: Payload Read FIFO Empty. + bit_offset: 4 + bit_size: 1 + - name: PRDFF + description: Payload Read FIFO Full. + bit_offset: 5 + bit_size: 1 + - name: RCB + description: Read Command Busy. + bit_offset: 6 + bit_size: 1 +fieldset/GVCIDR: + description: DSI Host Generic VCID Register. + fields: + - name: VCID + description: Virtual Channel ID. + bit_offset: 0 + bit_size: 2 +fieldset/IER0: + description: DSI Host Interrupt Enable Register 0. + fields: + - name: AE0IE + description: Acknowledge Error 0 Interrupt Enable. + bit_offset: 0 + bit_size: 1 + - name: AE1IE + description: Acknowledge Error 1 Interrupt Enable. + bit_offset: 1 + bit_size: 1 + - name: AE2IE + description: Acknowledge Error 2 Interrupt Enable. + bit_offset: 2 + bit_size: 1 + - name: AE3IE + description: Acknowledge Error 3 Interrupt Enable. + bit_offset: 3 + bit_size: 1 + - name: AE4IE + description: Acknowledge Error 4 Interrupt Enable. + bit_offset: 4 + bit_size: 1 + - name: AE5IE + description: Acknowledge Error 5 Interrupt Enable. + bit_offset: 5 + bit_size: 1 + - name: AE6IE + description: Acknowledge Error 6 Interrupt Enable. + bit_offset: 6 + bit_size: 1 + - name: AE7IE + description: Acknowledge Error 7 Interrupt Enable. + bit_offset: 7 + bit_size: 1 + - name: AE8IE + description: Acknowledge Error 8 Interrupt Enable. + bit_offset: 8 + bit_size: 1 + - name: AE9IE + description: Acknowledge Error 9 Interrupt Enable. + bit_offset: 9 + bit_size: 1 + - name: AE10IE + description: Acknowledge Error 10 Interrupt Enable. + bit_offset: 10 + bit_size: 1 + - name: AE11IE + description: Acknowledge Error 11 Interrupt Enable. + bit_offset: 11 + bit_size: 1 + - name: AE12IE + description: Acknowledge Error 12 Interrupt Enable. + bit_offset: 12 + bit_size: 1 + - name: AE13IE + description: Acknowledge Error 13 Interrupt Enable. + bit_offset: 13 + bit_size: 1 + - name: AE14IE + description: Acknowledge Error 14 Interrupt Enable. + bit_offset: 14 + bit_size: 1 + - name: AE15IE + description: Acknowledge Error 15 Interrupt Enable. + bit_offset: 15 + bit_size: 1 + - name: PE0IE + description: PHY Error 0 Interrupt Enable. + bit_offset: 16 + bit_size: 1 + - name: PE1IE + description: PHY Error 1 Interrupt Enable. + bit_offset: 17 + bit_size: 1 + - name: PE2IE + description: PHY Error 2 Interrupt Enable. + bit_offset: 18 + bit_size: 1 + - name: PE3IE + description: PHY Error 3 Interrupt Enable. + bit_offset: 19 + bit_size: 1 + - name: PE4IE + description: PHY Error 4 Interrupt Enable. + bit_offset: 20 + bit_size: 1 +fieldset/IER1: + description: DSI Host Interrupt Enable Register 1. + fields: + - name: TOHSTXIE + description: Timeout High-Speed Transmission Interrupt Enable. + bit_offset: 0 + bit_size: 1 + - name: TOLPRXIE + description: Timeout Low-Power Reception Interrupt Enable. + bit_offset: 1 + bit_size: 1 + - name: ECCSEIE + description: ECC Single-bit Error Interrupt Enable. + bit_offset: 2 + bit_size: 1 + - name: ECCMEIE + description: ECC Multi-bit Error Interrupt Enable. + bit_offset: 3 + bit_size: 1 + - name: CRCEIE + description: CRC Error Interrupt Enable. + bit_offset: 4 + bit_size: 1 + - name: PSEIE + description: Packet Size Error Interrupt Enable. + bit_offset: 5 + bit_size: 1 + - name: EOTPEIE + description: EoTp Error Interrupt Enable. + bit_offset: 6 + bit_size: 1 + - name: LPWREIE + description: LTDC Payload Write Error Interrupt Enable. + bit_offset: 7 + bit_size: 1 + - name: GCWREIE + description: Generic Command Write Error Interrupt Enable. + bit_offset: 8 + bit_size: 1 + - name: GPWREIE + description: Generic Payload Write Error Interrupt Enable. + bit_offset: 9 + bit_size: 1 + - name: GPTXEIE + description: Generic Payload Transmit Error Interrupt Enable. + bit_offset: 10 + bit_size: 1 + - name: GPRDEIE + description: Generic Payload Read Error Interrupt Enable. + bit_offset: 11 + bit_size: 1 + - name: GPRXEIE + description: Generic Payload Receive Error Interrupt Enable. + bit_offset: 12 + bit_size: 1 +fieldset/ISR0: + description: DSI Host Interrupt & Status Register 0. + fields: + - name: AE0 + description: Acknowledge Error 0. + bit_offset: 0 + bit_size: 1 + - name: AE1 + description: Acknowledge Error 1. + bit_offset: 1 + bit_size: 1 + - name: AE2 + description: Acknowledge Error 2. + bit_offset: 2 + bit_size: 1 + - name: AE3 + description: Acknowledge Error 3. + bit_offset: 3 + bit_size: 1 + - name: AE4 + description: Acknowledge Error 4. + bit_offset: 4 + bit_size: 1 + - name: AE5 + description: Acknowledge Error 5. + bit_offset: 5 + bit_size: 1 + - name: AE6 + description: Acknowledge Error 6. + bit_offset: 6 + bit_size: 1 + - name: AE7 + description: Acknowledge Error 7. + bit_offset: 7 + bit_size: 1 + - name: AE8 + description: Acknowledge Error 8. + bit_offset: 8 + bit_size: 1 + - name: AE9 + description: Acknowledge Error 9. + bit_offset: 9 + bit_size: 1 + - name: AE10 + description: Acknowledge Error 10. + bit_offset: 10 + bit_size: 1 + - name: AE11 + description: Acknowledge Error 11. + bit_offset: 11 + bit_size: 1 + - name: AE12 + description: Acknowledge Error 12. + bit_offset: 12 + bit_size: 1 + - name: AE13 + description: Acknowledge Error 13. + bit_offset: 13 + bit_size: 1 + - name: AE14 + description: Acknowledge Error 14. + bit_offset: 14 + bit_size: 1 + - name: AE15 + description: Acknowledge Error 15. + bit_offset: 15 + bit_size: 1 + - name: PE0 + description: PHY Error 0. + bit_offset: 16 + bit_size: 1 + - name: PE1 + description: PHY Error 1. + bit_offset: 17 + bit_size: 1 + - name: PE2 + description: PHY Error 2. + bit_offset: 18 + bit_size: 1 + - name: PE3 + description: PHY Error 3. + bit_offset: 19 + bit_size: 1 + - name: PE4 + description: PHY Error 4. + bit_offset: 20 + bit_size: 1 +fieldset/ISR1: + description: DSI Host Interrupt & Status Register 1. + fields: + - name: TOHSTX + description: Timeout High-Speed Transmission. + bit_offset: 0 + bit_size: 1 + - name: TOLPRX + description: Timeout Low-Power Reception. + bit_offset: 1 + bit_size: 1 + - name: ECCSE + description: ECC Single-bit Error. + bit_offset: 2 + bit_size: 1 + - name: ECCME + description: ECC Multi-bit Error. + bit_offset: 3 + bit_size: 1 + - name: CRCE + description: CRC Error. + bit_offset: 4 + bit_size: 1 + - name: PSE + description: Packet Size Error. + bit_offset: 5 + bit_size: 1 + - name: EOTPE + description: EoTp Error. + bit_offset: 6 + bit_size: 1 + - name: LPWRE + description: LTDC Payload Write Error. + bit_offset: 7 + bit_size: 1 + - name: GCWRE + description: Generic Command Write Error. + bit_offset: 8 + bit_size: 1 + - name: GPWRE + description: Generic Payload Write Error. + bit_offset: 9 + bit_size: 1 + - name: GPTXE + description: Generic Payload Transmit Error. + bit_offset: 10 + bit_size: 1 + - name: GPRDE + description: Generic Payload Read Error. + bit_offset: 11 + bit_size: 1 + - name: GPRXE + description: Generic Payload Receive Error. + bit_offset: 12 + bit_size: 1 +fieldset/LCCCR: + description: DSI Host LTDC Current Color Coding Register. + fields: + - name: COLC + description: Color Coding. + bit_offset: 0 + bit_size: 4 + - name: LPE + description: Loosely Packed Enable. + bit_offset: 8 + bit_size: 1 +fieldset/LCCR: + description: DSI Host LTDC Command Configuration Register. + fields: + - name: CMDSIZE + description: Command Size. + bit_offset: 0 + bit_size: 16 +fieldset/LCOLCR: + description: DSI Host LTDC Color Coding Register. + fields: + - name: COLC + description: Color Coding. + bit_offset: 0 + bit_size: 4 + - name: LPE + description: Loosely Packet Enable. + bit_offset: 8 + bit_size: 1 +fieldset/LCVCIDR: + description: DSI Host LTDC Current VCID Register. + fields: + - name: VCID + description: Virtual Channel ID. + bit_offset: 0 + bit_size: 2 +fieldset/LPCR: + description: DSI Host LTDC Polarity Configuration Register. + fields: + - name: DEP + description: Data Enable Polarity. + bit_offset: 0 + bit_size: 1 + - name: VSP + description: VSYNC Polarity. + bit_offset: 1 + bit_size: 1 + - name: HSP + description: HSYNC Polarity. + bit_offset: 2 + bit_size: 1 +fieldset/LPMCCR: + description: DSI Host Low-Power mode Current Configuration Register. + fields: + - name: VLPSIZE + description: VACT Largest Packet Size. + bit_offset: 0 + bit_size: 8 + - name: LPSIZE + description: Largest Packet Size. + bit_offset: 16 + bit_size: 8 +fieldset/LPMCR: + description: DSI Host Low-Power mode Configuration Register. + fields: + - name: VLPSIZE + description: VACT Largest Packet Size. + bit_offset: 0 + bit_size: 8 + - name: LPSIZE + description: Largest Packet Size. + bit_offset: 16 + bit_size: 8 +fieldset/LVCIDR: + description: DSI Host LTDC VCID Register. + fields: + - name: VCID + description: Virtual Channel ID. + bit_offset: 0 + bit_size: 2 +fieldset/MCR: + description: DSI Host mode Configuration Register. + fields: + - name: CMDM + description: Command mode. + bit_offset: 0 + bit_size: 1 +fieldset/PCONFR: + description: DSI Host PHY Configuration Register. + fields: + - name: NL + description: Number of Lanes. + bit_offset: 0 + bit_size: 2 + - name: SW_TIME + description: Stop Wait Time. + bit_offset: 8 + bit_size: 8 +fieldset/PCR: + description: DSI Host Protocol Configuration Register. + fields: + - name: ETTXE + description: EoTp Transmission Enable. + bit_offset: 0 + bit_size: 1 + - name: ETRXE + description: EoTp Reception Enable. + bit_offset: 1 + bit_size: 1 + - name: BTAE + description: Bus Turn Around Enable. + bit_offset: 2 + bit_size: 1 + - name: ECCRXE + description: ECC Reception Enable. + bit_offset: 3 + bit_size: 1 + - name: CRCRXE + description: CRC Reception Enable. + bit_offset: 4 + bit_size: 1 +fieldset/PCTLR: + description: DSI Host PHY Control Register. + fields: + - name: DEN + description: Digital Enable. + bit_offset: 1 + bit_size: 1 + - name: CKE + description: Clock Enable. + bit_offset: 2 + bit_size: 1 +fieldset/PSR: + description: DSI Host PHY Status Register. + fields: + - name: PD + description: PHY Direction. + bit_offset: 1 + bit_size: 1 + - name: PSSC + description: PHY Stop State Clock lane. + bit_offset: 2 + bit_size: 1 + - name: UANC + description: ULPS Active Not Clock lane. + bit_offset: 3 + bit_size: 1 + - name: PSS0 + description: PHY Stop State lane 0. + bit_offset: 4 + bit_size: 1 + - name: UAN0 + description: ULPS Active Not lane 1. + bit_offset: 5 + bit_size: 1 + - name: RUE0 + description: RX ULPS Escape lane 0. + bit_offset: 6 + bit_size: 1 + - name: PSS1 + description: PHY Stop State lane 1. + bit_offset: 7 + bit_size: 1 + - name: UAN1 + description: ULPS Active Not lane 1. + bit_offset: 8 + bit_size: 1 +fieldset/PTTCR: + description: DSI Host PHY TX Triggers Configuration Register. + fields: + - name: TX_TRIG + description: Transmission Trigger. + bit_offset: 0 + bit_size: 4 +fieldset/PUCR: + description: DSI Host PHY ULPS Control Register. + fields: + - name: URCL + description: ULPS Request on Clock Lane. + bit_offset: 0 + bit_size: 1 + - name: UECL + description: ULPS Exit on Clock Lane. + bit_offset: 1 + bit_size: 1 + - name: URDL + description: ULPS Request on Data Lane. + bit_offset: 2 + bit_size: 1 + - name: UEDL + description: ULPS Exit on Data Lane. + bit_offset: 3 + bit_size: 1 +fieldset/TCCR0: + description: DSI Host Timeout Counter Configuration Register 0. + fields: + - name: LPRX_TOCNT + description: Low-power Reception Timeout Counter. + bit_offset: 0 + bit_size: 16 + - name: HSTX_TOCNT + description: High-Speed Transmission Timeout Counter. + bit_offset: 16 + bit_size: 16 +fieldset/TCCR1: + description: DSI Host Timeout Counter Configuration Register 1. + fields: + - name: HSRD_TOCNT + description: High-Speed Read Timeout Counter. + bit_offset: 0 + bit_size: 16 +fieldset/TCCR2: + description: DSI Host Timeout Counter Configuration Register 2. + fields: + - name: LPRD_TOCNT + description: Low-Power Read Timeout Counter. + bit_offset: 0 + bit_size: 16 +fieldset/TCCR3: + description: DSI Host Timeout Counter Configuration Register 3. + fields: + - name: HSWR_TOCNT + description: High-Speed Write Timeout Counter. + bit_offset: 0 + bit_size: 16 + - name: PM + description: Presp mode. + bit_offset: 24 + bit_size: 1 +fieldset/TCCR4: + description: DSI Host Timeout Counter Configuration Register 4. + fields: + - name: LSWR_TOCNT + description: Low-Power Write Timeout Counter. + bit_offset: 0 + bit_size: 16 +fieldset/TCCR5: + description: DSI Host Timeout Counter Configuration Register 5. + fields: + - name: BTA_TOCNT + description: Bus-Turn-Around Timeout Counter. + bit_offset: 0 + bit_size: 16 +fieldset/VCCCR: + description: DSI Host Video Chunks Current Configuration Register. + fields: + - name: NUMC + description: Number of Chunks. + bit_offset: 0 + bit_size: 13 +fieldset/VCCR: + description: DSI Host Video Chunks Configuration Register. + fields: + - name: NUMC + description: Number of Chunks. + bit_offset: 0 + bit_size: 13 +fieldset/VHBPCCR: + description: DSI Host Video HBP Current Configuration Register. + fields: + - name: HBP + description: Horizontal Back-Porch duration. + bit_offset: 0 + bit_size: 12 +fieldset/VHBPCR: + description: DSI Host Video HBP Configuration Register. + fields: + - name: HBP + description: Horizontal Back-Porch duration. + bit_offset: 0 + bit_size: 12 +fieldset/VHSACCR: + description: DSI Host Video HSA Current Configuration Register. + fields: + - name: HSA + description: Horizontal Synchronism Active duration. + bit_offset: 0 + bit_size: 12 +fieldset/VHSACR: + description: DSI Host Video HSA Configuration Register. + fields: + - name: HSA + description: Horizontal Synchronism Active duration. + bit_offset: 0 + bit_size: 12 +fieldset/VLCCR: + description: DSI Host Video Line Current Configuration Register. + fields: + - name: HLINE + description: Horizontal Line duration. + bit_offset: 0 + bit_size: 15 +fieldset/VLCR: + description: DSI Host Video Line Configuration Register. + fields: + - name: HLINE + description: Horizontal Line duration. + bit_offset: 0 + bit_size: 15 +fieldset/VMCCR: + description: DSI Host Video mode Current Configuration Register. + fields: + - name: VMT + description: Video mode Type. + bit_offset: 0 + bit_size: 2 + - name: LPVSAE + description: Low-Power Vertical Sync time Enable. + bit_offset: 2 + bit_size: 1 + - name: LPVBPE + description: Low-power Vertical Back-Porch Enable. + bit_offset: 3 + bit_size: 1 + - name: LPVFPE + description: Low-power Vertical Front-Porch Enable. + bit_offset: 4 + bit_size: 1 + - name: LPVAE + description: Low-Power Vertical Active Enable. + bit_offset: 5 + bit_size: 1 + - name: LPHBPE + description: Low-power Horizontal Back-Porch Enable. + bit_offset: 6 + bit_size: 1 + - name: LPHFE + description: Low-Power Horizontal Front-Porch Enable. + bit_offset: 7 + bit_size: 1 + - name: FBTAAE + description: Frame BTA Acknowledge Enable. + bit_offset: 8 + bit_size: 1 + - name: LPCE + description: Low-Power Command Enable. + bit_offset: 9 + bit_size: 1 +fieldset/VMCR: + description: DSI Host Video mode Configuration Register. + fields: + - name: VMT + description: Video mode Type. + bit_offset: 0 + bit_size: 2 + - name: LPVSAE + description: Low-Power Vertical Sync Active Enable. + bit_offset: 8 + bit_size: 1 + - name: LPVBPE + description: Low-power Vertical Back-Porch Enable. + bit_offset: 9 + bit_size: 1 + - name: LPVFPE + description: Low-power Vertical Front-porch Enable. + bit_offset: 10 + bit_size: 1 + - name: LPVAE + description: Low-Power Vertical Active Enable. + bit_offset: 11 + bit_size: 1 + - name: LPHBPE + description: Low-Power Horizontal Back-Porch Enable. + bit_offset: 12 + bit_size: 1 + - name: LPHFPE + description: Low-Power Horizontal Front-Porch Enable. + bit_offset: 13 + bit_size: 1 + - name: FBTAAE + description: Frame Bus-Turn-Around Acknowledge Enable. + bit_offset: 14 + bit_size: 1 + - name: LPCE + description: Low-Power Command Enable. + bit_offset: 15 + bit_size: 1 + - name: PGE + description: Pattern Generator Enable. + bit_offset: 16 + bit_size: 1 + - name: PGM + description: Pattern Generator mode. + bit_offset: 20 + bit_size: 1 + - name: PGO + description: Pattern Generator Orientation. + bit_offset: 24 + bit_size: 1 +fieldset/VNPCCR: + description: DSI Host Video Null Packet Current Configuration Register. + fields: + - name: NPSIZE + description: Null Packet Size. + bit_offset: 0 + bit_size: 13 +fieldset/VNPCR: + description: DSI Host Video Null Packet Configuration Register. + fields: + - name: NPSIZE + description: Null Packet Size. + bit_offset: 0 + bit_size: 13 +fieldset/VPCCR: + description: DSI Host Video Packet Current Configuration Register. + fields: + - name: VPSIZE + description: Video Packet Size. + bit_offset: 0 + bit_size: 14 +fieldset/VPCR: + description: DSI Host Video Packet Configuration Register. + fields: + - name: VPSIZE + description: Video Packet Size. + bit_offset: 0 + bit_size: 14 +fieldset/VR: + description: DSI Host Version Register. + fields: + - name: VERSION + description: Version of the DSI Host. + bit_offset: 0 + bit_size: 32 +fieldset/VSCR: + description: DSI Host Video Shadow Control Register. + fields: + - name: EN + description: Enable. + bit_offset: 0 + bit_size: 1 + - name: UR + description: Update Register. + bit_offset: 8 + bit_size: 1 +fieldset/VVACCR: + description: DSI Host Video VA Current Configuration Register. + fields: + - name: VA + description: Vertical Active duration. + bit_offset: 0 + bit_size: 14 +fieldset/VVACR: + description: DSI Host Video VA Configuration Register. + fields: + - name: VA + description: Vertical Active duration. + bit_offset: 0 + bit_size: 14 +fieldset/VVBPCCR: + description: DSI Host Video VBP Current Configuration Register. + fields: + - name: VBP + description: Vertical Back-Porch duration. + bit_offset: 0 + bit_size: 10 +fieldset/VVBPCR: + description: DSI Host Video VBP Configuration Register. + fields: + - name: VBP + description: Vertical Back-Porch duration. + bit_offset: 0 + bit_size: 10 +fieldset/VVFPCCR: + description: DSI Host Video VFP Current Configuration Register. + fields: + - name: VFP + description: Vertical Front-Porch duration. + bit_offset: 0 + bit_size: 10 +fieldset/VVFPCR: + description: DSI Host Video VFP Configuration Register. + fields: + - name: VFP + description: Vertical Front-Porch duration. + bit_offset: 0 + bit_size: 10 +fieldset/VVSACCR: + description: DSI Host Video VSA Current Configuration Register. + fields: + - name: VSA + description: Vertical Synchronism Active duration. + bit_offset: 0 + bit_size: 10 +fieldset/VVSACR: + description: DSI Host Video VSA Configuration Register. + fields: + - name: VSA + description: Vertical Synchronism Active duration. + bit_offset: 0 + bit_size: 10 +fieldset/WCFGR: + description: DSI Wrapper Configuration Register. + fields: + - name: DSIM + description: DSI Mode. + bit_offset: 0 + bit_size: 1 + - name: COLMUX + description: Color Multiplexing. + bit_offset: 1 + bit_size: 3 + - name: TESRC + description: TE Source. + bit_offset: 4 + bit_size: 1 + - name: TEPOL + description: TE Polarity. + bit_offset: 5 + bit_size: 1 + - name: AR + description: Automatic Refresh. + bit_offset: 6 + bit_size: 1 + - name: VSPOL + description: VSync Polarity. + bit_offset: 7 + bit_size: 1 +fieldset/WCR: + description: DSI Wrapper Control Register. + fields: + - name: COLM + description: Color Mode. + bit_offset: 0 + bit_size: 1 + - name: SHTDN + description: Shutdown. + bit_offset: 1 + bit_size: 1 + - name: LTDCEN + description: LTDC Enable. + bit_offset: 2 + bit_size: 1 + - name: DSIEN + description: DSI Enable. + bit_offset: 3 + bit_size: 1 +fieldset/WIER: + description: DSI Wrapper Interrupt Enable Register. + fields: + - name: TEIE + description: Tearing Effect Interrupt Enable. + bit_offset: 0 + bit_size: 1 + - name: ERIE + description: End of Refresh Interrupt Enable. + bit_offset: 1 + bit_size: 1 + - name: PLLLIE + description: PLL Lock Interrupt Enable. + bit_offset: 9 + bit_size: 1 + - name: PLLUIE + description: PLL Unlock Interrupt Enable. + bit_offset: 10 + bit_size: 1 + - name: RRIE + description: Regulator Ready Interrupt Enable. + bit_offset: 13 + bit_size: 1 +fieldset/WIFCR: + description: DSI Wrapper Interrupt Flag Clear Register. + fields: + - name: CTEIF + description: Clear Tearing Effect Interrupt Flag. + bit_offset: 0 + bit_size: 1 + - name: CERIF + description: Clear End of Refresh Interrupt Flag. + bit_offset: 1 + bit_size: 1 + - name: CPLLLIF + description: Clear PLL Lock Interrupt Flag. + bit_offset: 9 + bit_size: 1 + - name: CPLLUIF + description: Clear PLL Unlock Interrupt Flag. + bit_offset: 10 + bit_size: 1 + - name: CRRIF + description: Clear Regulator Ready Interrupt Flag. + bit_offset: 13 + bit_size: 1 +fieldset/WISR: + description: DSI Wrapper Interrupt & Status Register. + fields: + - name: TEIF + description: Tearing Effect Interrupt Flag. + bit_offset: 0 + bit_size: 1 + - name: ERIF + description: End of Refresh Interrupt Flag. + bit_offset: 1 + bit_size: 1 + - name: BUSY + description: Busy Flag. + bit_offset: 2 + bit_size: 1 + - name: PLLLS + description: PLL Lock Status. + bit_offset: 8 + bit_size: 1 + - name: PLLLIF + description: PLL Lock Interrupt Flag. + bit_offset: 9 + bit_size: 1 + - name: PLLUIF + description: PLL Unlock Interrupt Flag. + bit_offset: 10 + bit_size: 1 + - name: RRS + description: Regulator Ready Status. + bit_offset: 12 + bit_size: 1 + - name: RRIF + description: Regulator Ready Interrupt Flag. + bit_offset: 13 + bit_size: 1 +fieldset/WPCR0: + description: DSI Wrapper PHY Configuration Register 0. + fields: + - name: UIX4 + description: Unit Interval multiplied by 4. + bit_offset: 0 + bit_size: 6 + - name: SWCL + description: Swap Clock Lane pins. + bit_offset: 6 + bit_size: 1 + - name: SWDL0 + description: Swap Data Lane 0 pins. + bit_offset: 7 + bit_size: 1 + - name: SWDL1 + description: Swap Data Lane 1 pins. + bit_offset: 8 + bit_size: 1 + - name: HSICL + description: Invert Hight-Speed data signal on Clock Lane. + bit_offset: 9 + bit_size: 1 + - name: HSIDL0 + description: Invert the Hight-Speed data signal on Data Lane 0. + bit_offset: 10 + bit_size: 1 + - name: HSIDL1 + description: Invert the High-Speed data signal on Data Lane 1. + bit_offset: 11 + bit_size: 1 + - name: FTXSMCL + description: Force in TX Stop Mode the Clock Lane. + bit_offset: 12 + bit_size: 1 + - name: FTXSMDL + description: Force in TX Stop Mode the Data Lanes. + bit_offset: 13 + bit_size: 1 + - name: CDOFFDL + description: Contention Detection OFF on Data Lanes. + bit_offset: 14 + bit_size: 1 + - name: TDDL + description: Turn Disable Data Lanes. + bit_offset: 16 + bit_size: 1 + - name: PDEN + description: Pull-Down Enable. + bit_offset: 18 + bit_size: 1 + - name: TCLKPREPEN + description: custom time for tCLK-PREPARE Enable. + bit_offset: 19 + bit_size: 1 + - name: TCLKZEROEN + description: custom time for tCLK-ZERO Enable. + bit_offset: 20 + bit_size: 1 + - name: THSPREPEN + description: custom time for tHS-PREPARE Enable. + bit_offset: 21 + bit_size: 1 + - name: THSTRAILEN + description: custom time for tHS-TRAIL Enable. + bit_offset: 22 + bit_size: 1 + - name: THSZEROEN + description: custom time for tHS-ZERO Enable. + bit_offset: 23 + bit_size: 1 + - name: TLPXDEN + description: custom time for tLPX for Data lanes Enable. + bit_offset: 24 + bit_size: 1 + - name: THSEXITEN + description: custom time for tHS-EXIT Enable. + bit_offset: 25 + bit_size: 1 + - name: TLPXCEN + description: custom time for tLPX for Clock lane Enable. + bit_offset: 26 + bit_size: 1 + - name: TCLKPOSTEN + description: custom time for tCLK-POST Enable. + bit_offset: 27 + bit_size: 1 +fieldset/WPCR1: + description: DSI Wrapper PHY Configuration Register 1. + fields: + - name: HSTXDCL + description: High-Speed Transmission Delay on Clock Lane. + bit_offset: 0 + bit_size: 2 + - name: HSTXDLL + description: High-Speed Transmission Delay on Data Lanes. + bit_offset: 2 + bit_size: 2 + - name: LPSRCL + description: Low-Power transmission Slew Rate Compensation on Clock Lane. + bit_offset: 6 + bit_size: 2 + - name: LPSRDL + description: Low-Power transmission Slew Rate Compensation on Data Lanes. + bit_offset: 8 + bit_size: 2 + - name: SDCC + description: SDD Control. + bit_offset: 12 + bit_size: 1 + - name: HSTXSRCCL + description: High-Speed Transmission Slew Rate Control on Clock Lane. + bit_offset: 16 + bit_size: 2 + - name: HSTXSRCDL + description: High-Speed Transmission Slew Rate Control on Data Lanes. + bit_offset: 18 + bit_size: 2 + - name: FLPRXLPM + description: Forces LP Receiver in Low-Power Mode. + bit_offset: 22 + bit_size: 1 + - name: LPRXFT + description: Low-Power RX low-pass Filtering Tuning. + bit_offset: 25 + bit_size: 2 +fieldset/WPCR2: + description: DSI Wrapper PHY Configuration Register 2. + fields: + - name: TCLKPREP + description: tCLK-PREPARE. + bit_offset: 0 + bit_size: 8 + - name: TCLKZEO + description: tCLK-ZERO. + bit_offset: 8 + bit_size: 8 + - name: THSPREP + description: tHS-PREPARE. + bit_offset: 16 + bit_size: 8 + - name: THSTRAIL + description: tHSTRAIL. + bit_offset: 24 + bit_size: 8 +fieldset/WPCR3: + description: DSI Wrapper PHY Configuration Register 3. + fields: + - name: THSZERO + description: tHS-ZERO. + bit_offset: 0 + bit_size: 8 + - name: TLPXD + description: tLPX for Data lanes. + bit_offset: 8 + bit_size: 8 + - name: THSEXIT + description: tHSEXIT. + bit_offset: 16 + bit_size: 8 + - name: TLPXC + description: tLPXC for Clock lane. + bit_offset: 24 + bit_size: 8 +fieldset/WPCR4: + description: DSI Wrapper PHY Configuration Register 4. + fields: + - name: TCLKPOST + description: tCLK-POST. + bit_offset: 0 + bit_size: 8 +fieldset/WRPCR: + description: DSI Wrapper Regulator and PLL Control Register. + fields: + - name: PLLEN + description: PLL Enable. + bit_offset: 0 + bit_size: 1 + - name: NDIV + description: PLL Loop Division Factor. + bit_offset: 2 + bit_size: 7 + - name: IDF + description: PLL Input Division Factor. + bit_offset: 11 + bit_size: 4 + - name: ODF + description: PLL Output Division Factor. + bit_offset: 16 + bit_size: 2 + - name: REGEN + description: Regulator Enable. + bit_offset: 24 + bit_size: 1 diff --git a/data/registers/dsihost_v2.yaml b/data/registers/dsihost_v2.yaml new file mode 100644 index 0000000..0b564ac --- /dev/null +++ b/data/registers/dsihost_v2.yaml @@ -0,0 +1,1716 @@ +block/DSIHOST: + description: DSIHOST1. + items: + - name: VR + description: DSI Host version register. + byte_offset: 0 + access: Read + fieldset: VR + - name: CR + description: DSI Host control register. + byte_offset: 4 + fieldset: CR + - name: CCR + description: DSI Host clock control register. + byte_offset: 8 + fieldset: CCR + - name: LVCIDR + description: DSI Host LTDC VCID register. + byte_offset: 12 + fieldset: LVCIDR + - name: LCOLCR + description: DSI Host LTDC color coding register. + byte_offset: 16 + fieldset: LCOLCR + - name: LPCR + description: DSI Host LTDC polarity configuration register. + byte_offset: 20 + fieldset: LPCR + - name: LPMCR + description: DSI Host low-power mode configuration register. + byte_offset: 24 + fieldset: LPMCR + - name: PCR + description: DSI Host protocol configuration register. + byte_offset: 44 + fieldset: PCR + - name: GVCIDR + description: DSI Host generic VCID register. + byte_offset: 48 + access: Read + fieldset: GVCIDR + - name: MCR + description: DSI Host mode configuration register. + byte_offset: 52 + fieldset: MCR + - name: VMCR + description: DSI Host video mode configuration register. + byte_offset: 56 + fieldset: VMCR + - name: VPCR + description: DSI Host video packet configuration register. + byte_offset: 60 + fieldset: VPCR + - name: VCCR + description: DSI Host video chunks configuration register. + byte_offset: 64 + fieldset: VCCR + - name: VNPCR + description: DSI Host video null packet configuration register. + byte_offset: 68 + fieldset: VNPCR + - name: VHSACR + description: DSI Host video HSA configuration register. + byte_offset: 72 + fieldset: VHSACR + - name: VHBPCR + description: DSI Host video HBP configuration register. + byte_offset: 76 + fieldset: VHBPCR + - name: VLCR + description: DSI Host video line configuration register. + byte_offset: 80 + fieldset: VLCR + - name: VVSACR + description: DSI Host video VSA configuration register. + byte_offset: 84 + fieldset: VVSACR + - name: VVBPCR + description: DSI Host video VBP configuration register. + byte_offset: 88 + fieldset: VVBPCR + - name: VVFPCR + description: DSI Host video VFP configuration register. + byte_offset: 92 + fieldset: VVFPCR + - name: VVACR + description: DSI Host video VA configuration register. + byte_offset: 96 + fieldset: VVACR + - name: LCCR + description: DSI Host LTDC command configuration register. + byte_offset: 100 + fieldset: LCCR + - name: CMCR + description: DSI Host command mode configuration register. + byte_offset: 104 + fieldset: CMCR + - name: GHCR + description: DSI Host generic header configuration register. + byte_offset: 108 + fieldset: GHCR + - name: GPDR + description: DSI Host generic payload data register. + byte_offset: 112 + fieldset: GPDR + - name: GPSR + description: DSI Host generic packet status register. + byte_offset: 116 + access: Read + fieldset: GPSR + - name: TCCR0 + description: DSI Host timeout counter configuration register 0. + byte_offset: 120 + fieldset: TCCR0 + - name: TCCR1 + description: DSI Host timeout counter configuration register 1. + byte_offset: 124 + fieldset: TCCR1 + - name: TCCR2 + description: DSI Host timeout counter configuration register 2. + byte_offset: 128 + fieldset: TCCR2 + - name: TCCR3 + description: DSI Host timeout counter configuration register 3. + byte_offset: 132 + fieldset: TCCR3 + - name: TCCR4 + description: DSI Host timeout counter configuration register 4. + byte_offset: 136 + fieldset: TCCR4 + - name: TCCR5 + description: DSI Host timeout counter configuration register 5. + byte_offset: 140 + fieldset: TCCR5 + - name: CLCR + description: DSI Host clock lane configuration register. + byte_offset: 148 + fieldset: CLCR + - name: CLTCR + description: DSI Host clock lane timer configuration register. + byte_offset: 152 + fieldset: CLTCR + - name: DLTCR + description: DSI Host data lane timer configuration register. + byte_offset: 156 + fieldset: DLTCR + - name: PCTLR + description: DSI Host PHY control register. + byte_offset: 160 + fieldset: PCTLR + - name: PCONFR + description: DSI Host PHY configuration register. + byte_offset: 164 + fieldset: PCONFR + - name: PUCR + description: DSI Host PHY ULPS control register. + byte_offset: 168 + fieldset: PUCR + - name: PTTCR + description: DSI Host PHY TX triggers configuration register. + byte_offset: 172 + fieldset: PTTCR + - name: PSR + description: DSI Host PHY status register. + byte_offset: 176 + access: Read + fieldset: PSR + - name: ISR0 + description: DSI Host interrupt and status register 0. + byte_offset: 188 + access: Read + fieldset: ISR0 + - name: ISR1 + description: DSI Host interrupt and status register 1. + byte_offset: 192 + access: Read + fieldset: ISR1 + - name: IER0 + description: DSI Host interrupt enable register 0. + byte_offset: 196 + fieldset: IER0 + - name: IER1 + description: DSI Host interrupt enable register 1. + byte_offset: 200 + fieldset: IER1 + - name: FIR0 + description: DSI Host force interrupt register 0. + byte_offset: 216 + access: Write + fieldset: FIR0 + - name: FIR1 + description: DSI Host force interrupt register 1. + byte_offset: 220 + access: Write + fieldset: FIR1 + - name: DLTRCR + description: DSI Host data lane timer read configuration register. + byte_offset: 244 + fieldset: DLTRCR + - name: VSCR + description: DSI Host video shadow control register. + byte_offset: 256 + fieldset: VSCR + - name: LCVCIDR + description: DSI Host LTDC current VCID register. + byte_offset: 268 + fieldset: LCVCIDR + - name: LCCCR + description: DSI Host LTDC current color coding register. + byte_offset: 272 + access: Read + fieldset: LCCCR + - name: LPMCCR + description: DSI Host low-power mode current configuration register. + byte_offset: 280 + access: Read + fieldset: LPMCCR + - name: VMCCR + description: DSI Host video mode current configuration register. + byte_offset: 312 + access: Read + fieldset: VMCCR + - name: VPCCR + description: DSI Host video packet current configuration register. + byte_offset: 316 + access: Read + fieldset: VPCCR + - name: VCCCR + description: DSI Host video chunks current configuration register. + byte_offset: 320 + access: Read + fieldset: VCCCR + - name: VNPCCR + description: DSI Host video null packet current configuration register. + byte_offset: 324 + access: Read + fieldset: VNPCCR + - name: VHSACCR + description: DSI Host video HSA current configuration register. + byte_offset: 328 + access: Read + fieldset: VHSACCR + - name: VHBPCCR + description: DSI Host video HBP current configuration register. + byte_offset: 332 + access: Read + fieldset: VHBPCCR + - name: VLCCR + description: DSI Host video line current configuration register. + byte_offset: 336 + access: Read + fieldset: VLCCR + - name: VVSACCR + description: DSI Host video VSA current configuration register. + byte_offset: 340 + access: Read + fieldset: VVSACCR + - name: VVBPCCR + description: DSI Host video VBP current configuration register. + byte_offset: 344 + access: Read + fieldset: VVBPCCR + - name: VVFPCCR + description: DSI Host video VFP current configuration register. + byte_offset: 348 + access: Read + fieldset: VVFPCCR + - name: VVACCR + description: DSI Host video VA current configuration register. + byte_offset: 352 + access: Read + fieldset: VVACCR + - name: WCFGR + description: DSI wrapper configuration register. + byte_offset: 1024 + fieldset: WCFGR + - name: WCR + description: DSI wrapper control register. + byte_offset: 1028 + fieldset: WCR + - name: WIER + description: DSI wrapper interrupt enable register. + byte_offset: 1032 + fieldset: WIER + - name: WISR + description: DSI wrapper interrupt and status register. + byte_offset: 1036 + access: Read + fieldset: WISR + - name: WIFCR + description: DSI wrapper interrupt flag clear register. + byte_offset: 1040 + access: Write + fieldset: WIFCR + - name: WPCR0 + description: DSI wrapper PHY configuration register 0. + byte_offset: 1048 + fieldset: WPCR0 + - name: WPCR1 + description: This register shall be programmed only when DSI is stopped (CR. DSIEN=0 and CR.EN = 0). + byte_offset: 1052 + fieldset: WPCR1 + - name: WRPCR + description: DSI wrapper regulator and PLL control register. + byte_offset: 1072 + fieldset: WRPCR + - name: HWCFGR + description: DSI Host hardware configuration register. + byte_offset: 2032 + access: Read + fieldset: HWCFGR + - name: VERR + description: DSI Host version register. + byte_offset: 2036 + access: Read + fieldset: VERR + - name: IPIDR + description: DSI Host identification register. + byte_offset: 2040 + access: Read + fieldset: IPIDR + - name: SIDR + description: DSI Host size identification register. + byte_offset: 2044 + access: Read + fieldset: SIDR +fieldset/CCR: + description: DSI Host clock control register. + fields: + - name: TXECKDIV + description: TXECKDIV. + bit_offset: 0 + bit_size: 8 + - name: TOCKDIV + description: TOCKDIV. + bit_offset: 8 + bit_size: 8 +fieldset/CLCR: + description: DSI Host clock lane configuration register. + fields: + - name: DPCC + description: DPCC. + bit_offset: 0 + bit_size: 1 + - name: ACR + description: ACR. + bit_offset: 1 + bit_size: 1 +fieldset/CLTCR: + description: DSI Host clock lane timer configuration register. + fields: + - name: LP2HS_TIME + description: LP2HS_TIME. + bit_offset: 0 + bit_size: 10 + - name: HS2LP_TIME + description: HS2LP_TIME. + bit_offset: 16 + bit_size: 10 +fieldset/CMCR: + description: DSI Host command mode configuration register. + fields: + - name: TEARE + description: TEARE. + bit_offset: 0 + bit_size: 1 + - name: ARE + description: ARE. + bit_offset: 1 + bit_size: 1 + - name: GSW0TX + description: GSW0TX. + bit_offset: 8 + bit_size: 1 + - name: GSW1TX + description: GSW1TX. + bit_offset: 9 + bit_size: 1 + - name: GSW2TX + description: GSW2TX. + bit_offset: 10 + bit_size: 1 + - name: GSR0TX + description: GSR0TX. + bit_offset: 11 + bit_size: 1 + - name: GSR1TX + description: GSR1TX. + bit_offset: 12 + bit_size: 1 + - name: GSR2TX + description: GSR2TX. + bit_offset: 13 + bit_size: 1 + - name: GLWTX + description: GLWTX. + bit_offset: 14 + bit_size: 1 + - name: DSW0TX + description: DSW0TX. + bit_offset: 16 + bit_size: 1 + - name: DSW1TX + description: DSW1TX. + bit_offset: 17 + bit_size: 1 + - name: DSR0TX + description: DSR0TX. + bit_offset: 18 + bit_size: 1 + - name: DLWTX + description: DLWTX. + bit_offset: 19 + bit_size: 1 + - name: MRDPS + description: MRDPS. + bit_offset: 24 + bit_size: 1 +fieldset/CR: + description: DSI Host control register. + fields: + - name: EN + description: EN. + bit_offset: 0 + bit_size: 1 +fieldset/DLTCR: + description: DSI Host data lane timer configuration register. + fields: + - name: LP2HS_TIME + description: LP2HS_TIME. + bit_offset: 0 + bit_size: 10 + - name: HS2LP_TIME + description: HS2LP_TIME. + bit_offset: 16 + bit_size: 10 +fieldset/DLTRCR: + description: DSI Host data lane timer read configuration register. + fields: + - name: MRD_TIME + description: MRD_TIME. + bit_offset: 0 + bit_size: 15 +fieldset/FIR0: + description: DSI Host force interrupt register 0. + fields: + - name: FAE0 + description: FAE0. + bit_offset: 0 + bit_size: 1 + - name: FAE1 + description: FAE1. + bit_offset: 1 + bit_size: 1 + - name: FAE2 + description: FAE2. + bit_offset: 2 + bit_size: 1 + - name: FAE3 + description: FAE3. + bit_offset: 3 + bit_size: 1 + - name: FAE4 + description: FAE4. + bit_offset: 4 + bit_size: 1 + - name: FAE5 + description: FAE5. + bit_offset: 5 + bit_size: 1 + - name: FAE6 + description: FAE6. + bit_offset: 6 + bit_size: 1 + - name: FAE7 + description: FAE7. + bit_offset: 7 + bit_size: 1 + - name: FAE8 + description: FAE8. + bit_offset: 8 + bit_size: 1 + - name: FAE9 + description: FAE9. + bit_offset: 9 + bit_size: 1 + - name: FAE10 + description: FAE10. + bit_offset: 10 + bit_size: 1 + - name: FAE11 + description: FAE11. + bit_offset: 11 + bit_size: 1 + - name: FAE12 + description: FAE12. + bit_offset: 12 + bit_size: 1 + - name: FAE13 + description: FAE13. + bit_offset: 13 + bit_size: 1 + - name: FAE14 + description: FAE14. + bit_offset: 14 + bit_size: 1 + - name: FAE15 + description: FAE15. + bit_offset: 15 + bit_size: 1 + - name: FPE0 + description: FPE0. + bit_offset: 16 + bit_size: 1 + - name: FPE1 + description: FPE1. + bit_offset: 17 + bit_size: 1 + - name: FPE2 + description: FPE2. + bit_offset: 18 + bit_size: 1 + - name: FPE3 + description: FPE3. + bit_offset: 19 + bit_size: 1 + - name: FPE4 + description: FPE4. + bit_offset: 20 + bit_size: 1 +fieldset/FIR1: + description: DSI Host force interrupt register 1. + fields: + - name: FTOHSTX + description: FTOHSTX. + bit_offset: 0 + bit_size: 1 + - name: FTOLPRX + description: FTOLPRX. + bit_offset: 1 + bit_size: 1 + - name: FECCSE + description: FECCSE. + bit_offset: 2 + bit_size: 1 + - name: FECCME + description: FECCME. + bit_offset: 3 + bit_size: 1 + - name: FCRCE + description: FCRCE. + bit_offset: 4 + bit_size: 1 + - name: FPSE + description: FPSE. + bit_offset: 5 + bit_size: 1 + - name: FEOTPE + description: FEOTPE. + bit_offset: 6 + bit_size: 1 + - name: FLPWRE + description: FLPWRE. + bit_offset: 7 + bit_size: 1 + - name: FGCWRE + description: FGCWRE. + bit_offset: 8 + bit_size: 1 + - name: FGPWRE + description: FGPWRE. + bit_offset: 9 + bit_size: 1 + - name: FGPTXE + description: FGPTXE. + bit_offset: 10 + bit_size: 1 + - name: FGPRDE + description: FGPRDE. + bit_offset: 11 + bit_size: 1 + - name: FGPRXE + description: FGPRXE. + bit_offset: 12 + bit_size: 1 +fieldset/GHCR: + description: DSI Host generic header configuration register. + fields: + - name: DT + description: DT. + bit_offset: 0 + bit_size: 6 + - name: VCID + description: VCID. + bit_offset: 6 + bit_size: 2 + - name: WCLSB + description: WCLSB. + bit_offset: 8 + bit_size: 8 + - name: WCMSB + description: WCMSB. + bit_offset: 16 + bit_size: 8 +fieldset/GPDR: + description: DSI Host generic payload data register. + fields: + - name: DATA1 + description: DATA1. + bit_offset: 0 + bit_size: 8 + - name: DATA2 + description: DATA2. + bit_offset: 8 + bit_size: 8 + - name: DATA3 + description: DATA3. + bit_offset: 16 + bit_size: 8 + - name: DATA4 + description: DATA4. + bit_offset: 24 + bit_size: 8 +fieldset/GPSR: + description: DSI Host generic packet status register. + fields: + - name: CMDFE + description: CMDFE. + bit_offset: 0 + bit_size: 1 + - name: CMDFF + description: CMDFF. + bit_offset: 1 + bit_size: 1 + - name: PWRFE + description: PWRFE. + bit_offset: 2 + bit_size: 1 + - name: PWRFF + description: PWRFF. + bit_offset: 3 + bit_size: 1 + - name: PRDFE + description: PRDFE. + bit_offset: 4 + bit_size: 1 + - name: PRDFF + description: PRDFF. + bit_offset: 5 + bit_size: 1 + - name: RCB + description: RCB. + bit_offset: 6 + bit_size: 1 +fieldset/GVCIDR: + description: DSI Host generic VCID register. + fields: + - name: VCID + description: VCID. + bit_offset: 0 + bit_size: 2 +fieldset/HWCFGR: + description: DSI Host hardware configuration register. + fields: + - name: TECHNO + description: TECHNO. + bit_offset: 0 + bit_size: 4 + - name: FIFOSIZE + description: FIFOSIZE. + bit_offset: 4 + bit_size: 12 +fieldset/IER0: + description: DSI Host interrupt enable register 0. + fields: + - name: AE0IE + description: AE0IE. + bit_offset: 0 + bit_size: 1 + - name: AE1IE + description: AE1IE. + bit_offset: 1 + bit_size: 1 + - name: AE2IE + description: AE2IE. + bit_offset: 2 + bit_size: 1 + - name: AE3IE + description: AE3IE. + bit_offset: 3 + bit_size: 1 + - name: AE4IE + description: AE4IE. + bit_offset: 4 + bit_size: 1 + - name: AE5IE + description: AE5IE. + bit_offset: 5 + bit_size: 1 + - name: AE6IE + description: AE6IE. + bit_offset: 6 + bit_size: 1 + - name: AE7IE + description: AE7IE. + bit_offset: 7 + bit_size: 1 + - name: AE8IE + description: AE8IE. + bit_offset: 8 + bit_size: 1 + - name: AE9IE + description: AE9IE. + bit_offset: 9 + bit_size: 1 + - name: AE10IE + description: AE10IE. + bit_offset: 10 + bit_size: 1 + - name: AE11IE + description: AE11IE. + bit_offset: 11 + bit_size: 1 + - name: AE12IE + description: AE12IE. + bit_offset: 12 + bit_size: 1 + - name: AE13IE + description: AE13IE. + bit_offset: 13 + bit_size: 1 + - name: AE14IE + description: AE14IE. + bit_offset: 14 + bit_size: 1 + - name: AE15IE + description: AE15IE. + bit_offset: 15 + bit_size: 1 + - name: PE0IE + description: PE0IE. + bit_offset: 16 + bit_size: 1 + - name: PE1IE + description: PE1IE. + bit_offset: 17 + bit_size: 1 + - name: PE2IE + description: PE2IE. + bit_offset: 18 + bit_size: 1 + - name: PE3IE + description: PE3IE. + bit_offset: 19 + bit_size: 1 + - name: PE4IE + description: PE4IE. + bit_offset: 20 + bit_size: 1 +fieldset/IER1: + description: DSI Host interrupt enable register 1. + fields: + - name: TOHSTXIE + description: TOHSTXIE. + bit_offset: 0 + bit_size: 1 + - name: TOLPRXIE + description: TOLPRXIE. + bit_offset: 1 + bit_size: 1 + - name: ECCSEIE + description: ECCSEIE. + bit_offset: 2 + bit_size: 1 + - name: ECCMEIE + description: ECCMEIE. + bit_offset: 3 + bit_size: 1 + - name: CRCEIE + description: CRCEIE. + bit_offset: 4 + bit_size: 1 + - name: PSEIE + description: PSEIE. + bit_offset: 5 + bit_size: 1 + - name: EOTPEIE + description: EOTPEIE. + bit_offset: 6 + bit_size: 1 + - name: LPWREIE + description: LPWREIE. + bit_offset: 7 + bit_size: 1 + - name: GCWREIE + description: GCWREIE. + bit_offset: 8 + bit_size: 1 + - name: GPWREIE + description: GPWREIE. + bit_offset: 9 + bit_size: 1 + - name: GPTXEIE + description: GPTXEIE. + bit_offset: 10 + bit_size: 1 + - name: GPRDEIE + description: GPRDEIE. + bit_offset: 11 + bit_size: 1 + - name: GPRXEIE + description: GPRXEIE. + bit_offset: 12 + bit_size: 1 +fieldset/IPIDR: + description: DSI Host identification register. + fields: + - name: ID + description: ID. + bit_offset: 0 + bit_size: 32 +fieldset/ISR0: + description: DSI Host interrupt and status register 0. + fields: + - name: AE0 + description: AE0. + bit_offset: 0 + bit_size: 1 + - name: AE1 + description: AE1. + bit_offset: 1 + bit_size: 1 + - name: AE2 + description: AE2. + bit_offset: 2 + bit_size: 1 + - name: AE3 + description: AE3. + bit_offset: 3 + bit_size: 1 + - name: AE4 + description: AE4. + bit_offset: 4 + bit_size: 1 + - name: AE5 + description: AE5. + bit_offset: 5 + bit_size: 1 + - name: AE6 + description: AE6. + bit_offset: 6 + bit_size: 1 + - name: AE7 + description: AE7. + bit_offset: 7 + bit_size: 1 + - name: AE8 + description: AE8. + bit_offset: 8 + bit_size: 1 + - name: AE9 + description: AE9. + bit_offset: 9 + bit_size: 1 + - name: AE10 + description: AE10. + bit_offset: 10 + bit_size: 1 + - name: AE11 + description: AE11. + bit_offset: 11 + bit_size: 1 + - name: AE12 + description: AE12. + bit_offset: 12 + bit_size: 1 + - name: AE13 + description: AE13. + bit_offset: 13 + bit_size: 1 + - name: AE14 + description: AE14. + bit_offset: 14 + bit_size: 1 + - name: AE15 + description: AE15. + bit_offset: 15 + bit_size: 1 + - name: PE0 + description: PE0. + bit_offset: 16 + bit_size: 1 + - name: PE1 + description: PE1. + bit_offset: 17 + bit_size: 1 + - name: PE2 + description: PE2. + bit_offset: 18 + bit_size: 1 + - name: PE3 + description: PE3. + bit_offset: 19 + bit_size: 1 + - name: PE4 + description: PE4. + bit_offset: 20 + bit_size: 1 +fieldset/ISR1: + description: DSI Host interrupt and status register 1. + fields: + - name: TOHSTX + description: TOHSTX. + bit_offset: 0 + bit_size: 1 + - name: TOLPRX + description: TOLPRX. + bit_offset: 1 + bit_size: 1 + - name: ECCSE + description: ECCSE. + bit_offset: 2 + bit_size: 1 + - name: ECCME + description: ECCME. + bit_offset: 3 + bit_size: 1 + - name: CRCE + description: CRCE. + bit_offset: 4 + bit_size: 1 + - name: PSE + description: PSE. + bit_offset: 5 + bit_size: 1 + - name: EOTPE + description: EOTPE. + bit_offset: 6 + bit_size: 1 + - name: LPWRE + description: LPWRE. + bit_offset: 7 + bit_size: 1 + - name: GCWRE + description: GCWRE. + bit_offset: 8 + bit_size: 1 + - name: GPWRE + description: GPWRE. + bit_offset: 9 + bit_size: 1 + - name: GPTXE + description: GPTXE. + bit_offset: 10 + bit_size: 1 + - name: GPRDE + description: GPRDE. + bit_offset: 11 + bit_size: 1 + - name: GPRXE + description: GPRXE. + bit_offset: 12 + bit_size: 1 +fieldset/LCCCR: + description: DSI Host LTDC current color coding register. + fields: + - name: COLC + description: COLC. + bit_offset: 0 + bit_size: 4 + - name: LPE + description: LPE. + bit_offset: 8 + bit_size: 1 +fieldset/LCCR: + description: DSI Host LTDC command configuration register. + fields: + - name: CMDSIZE + description: CMDSIZE. + bit_offset: 0 + bit_size: 16 +fieldset/LCOLCR: + description: DSI Host LTDC color coding register. + fields: + - name: COLC + description: COLC. + bit_offset: 0 + bit_size: 4 + - name: LPE + description: LPE. + bit_offset: 8 + bit_size: 1 +fieldset/LCVCIDR: + description: DSI Host LTDC current VCID register. + fields: + - name: VCID + description: VCID. + bit_offset: 0 + bit_size: 2 +fieldset/LPCR: + description: DSI Host LTDC polarity configuration register. + fields: + - name: DEP + description: DEP. + bit_offset: 0 + bit_size: 1 + - name: VSP + description: VSP. + bit_offset: 1 + bit_size: 1 + - name: HSP + description: HSP. + bit_offset: 2 + bit_size: 1 +fieldset/LPMCCR: + description: DSI Host low-power mode current configuration register. + fields: + - name: VLPSIZE + description: VLPSIZE. + bit_offset: 0 + bit_size: 8 + - name: LPSIZE + description: LPSIZE. + bit_offset: 16 + bit_size: 8 +fieldset/LPMCR: + description: DSI Host low-power mode configuration register. + fields: + - name: VLPSIZE + description: VLPSIZE. + bit_offset: 0 + bit_size: 8 + - name: LPSIZE + description: LPSIZE. + bit_offset: 16 + bit_size: 8 +fieldset/LVCIDR: + description: DSI Host LTDC VCID register. + fields: + - name: VCID + description: VCID. + bit_offset: 0 + bit_size: 2 +fieldset/MCR: + description: DSI Host mode configuration register. + fields: + - name: CMDM + description: CMDM. + bit_offset: 0 + bit_size: 1 +fieldset/PCONFR: + description: DSI Host PHY configuration register. + fields: + - name: NL + description: NL. + bit_offset: 0 + bit_size: 2 + - name: SW_TIME + description: SW_TIME. + bit_offset: 8 + bit_size: 8 +fieldset/PCR: + description: DSI Host protocol configuration register. + fields: + - name: ETTXE + description: ETTXE. + bit_offset: 0 + bit_size: 1 + - name: ETRXE + description: ETRXE. + bit_offset: 1 + bit_size: 1 + - name: BTAE + description: BTAE. + bit_offset: 2 + bit_size: 1 + - name: ECCRXE + description: ECCRXE. + bit_offset: 3 + bit_size: 1 + - name: CRCRXE + description: CRCRXE. + bit_offset: 4 + bit_size: 1 +fieldset/PCTLR: + description: DSI Host PHY control register. + fields: + - name: DEN + description: DEN. + bit_offset: 1 + bit_size: 1 + - name: CKE + description: CKE. + bit_offset: 2 + bit_size: 1 +fieldset/PSR: + description: DSI Host PHY status register. + fields: + - name: PD + description: PD. + bit_offset: 1 + bit_size: 1 + - name: PSSC + description: PSSC. + bit_offset: 2 + bit_size: 1 + - name: UANC + description: UANC. + bit_offset: 3 + bit_size: 1 + - name: PSS0 + description: PSS0. + bit_offset: 4 + bit_size: 1 + - name: UAN0 + description: UAN0. + bit_offset: 5 + bit_size: 1 + - name: RUE0 + description: RUE0. + bit_offset: 6 + bit_size: 1 + - name: PSS1 + description: PSS1. + bit_offset: 7 + bit_size: 1 + - name: UAN1 + description: UAN1. + bit_offset: 8 + bit_size: 1 +fieldset/PTTCR: + description: DSI Host PHY TX triggers configuration register. + fields: + - name: TX_TRIG + description: TX_TRIG. + bit_offset: 0 + bit_size: 4 +fieldset/PUCR: + description: DSI Host PHY ULPS control register. + fields: + - name: URCL + description: URCL. + bit_offset: 0 + bit_size: 1 + - name: UECL + description: UECL. + bit_offset: 1 + bit_size: 1 + - name: URDL + description: URDL. + bit_offset: 2 + bit_size: 1 + - name: UEDL + description: UEDL. + bit_offset: 3 + bit_size: 1 +fieldset/SIDR: + description: DSI Host size identification register. + fields: + - name: SID + description: SID. + bit_offset: 0 + bit_size: 32 +fieldset/TCCR0: + description: DSI Host timeout counter configuration register 0. + fields: + - name: LPRX_TOCNT + description: LPRX_TOCNT. + bit_offset: 0 + bit_size: 16 + - name: HSTX_TOCNT + description: HSTX_TOCNT. + bit_offset: 16 + bit_size: 16 +fieldset/TCCR1: + description: DSI Host timeout counter configuration register 1. + fields: + - name: HSRD_TOCNT + description: HSRD_TOCNT. + bit_offset: 0 + bit_size: 16 +fieldset/TCCR2: + description: DSI Host timeout counter configuration register 2. + fields: + - name: LPRD_TOCNT + description: LPRD_TOCNT. + bit_offset: 0 + bit_size: 16 +fieldset/TCCR3: + description: DSI Host timeout counter configuration register 3. + fields: + - name: HSWR_TOCNT + description: HSWR_TOCNT. + bit_offset: 0 + bit_size: 16 + - name: PM + description: PM. + bit_offset: 24 + bit_size: 1 +fieldset/TCCR4: + description: DSI Host timeout counter configuration register 4. + fields: + - name: LPWR_TOCNT + description: LPWR_TOCNT. + bit_offset: 0 + bit_size: 16 +fieldset/TCCR5: + description: DSI Host timeout counter configuration register 5. + fields: + - name: BTA_TOCNT + description: BTA_TOCNT. + bit_offset: 0 + bit_size: 16 +fieldset/VCCCR: + description: DSI Host video chunks current configuration register. + fields: + - name: NUMC + description: NUMC. + bit_offset: 0 + bit_size: 13 +fieldset/VCCR: + description: DSI Host video chunks configuration register. + fields: + - name: NUMC + description: NUMC. + bit_offset: 0 + bit_size: 13 +fieldset/VERR: + description: DSI Host version register. + fields: + - name: MINREV + description: MINREV. + bit_offset: 0 + bit_size: 4 + - name: MAJREV + description: MAJREV. + bit_offset: 4 + bit_size: 4 +fieldset/VHBPCCR: + description: DSI Host video HBP current configuration register. + fields: + - name: HBP + description: HBP. + bit_offset: 0 + bit_size: 12 +fieldset/VHBPCR: + description: DSI Host video HBP configuration register. + fields: + - name: HBP + description: HBP. + bit_offset: 0 + bit_size: 12 +fieldset/VHSACCR: + description: DSI Host video HSA current configuration register. + fields: + - name: HSA + description: HSA. + bit_offset: 0 + bit_size: 12 +fieldset/VHSACR: + description: DSI Host video HSA configuration register. + fields: + - name: HSA + description: HSA. + bit_offset: 0 + bit_size: 12 +fieldset/VLCCR: + description: DSI Host video line current configuration register. + fields: + - name: HLINE + description: HLINE. + bit_offset: 0 + bit_size: 15 +fieldset/VLCR: + description: DSI Host video line configuration register. + fields: + - name: HLINE + description: HLINE. + bit_offset: 0 + bit_size: 15 +fieldset/VMCCR: + description: DSI Host video mode current configuration register. + fields: + - name: VMT + description: VMT. + bit_offset: 0 + bit_size: 2 + - name: LPVSAE + description: LPVSAE. + bit_offset: 2 + bit_size: 1 + - name: LPVBPE + description: LPVBPE. + bit_offset: 3 + bit_size: 1 + - name: LPVFPE + description: LPVFPE. + bit_offset: 4 + bit_size: 1 + - name: LPVAE + description: LPVAE. + bit_offset: 5 + bit_size: 1 + - name: LPHBPE + description: LPHBPE. + bit_offset: 6 + bit_size: 1 + - name: LPHFE + description: LPHFE. + bit_offset: 7 + bit_size: 1 + - name: FBTAAE + description: FBTAAE. + bit_offset: 8 + bit_size: 1 + - name: LPCE + description: LPCE. + bit_offset: 9 + bit_size: 1 +fieldset/VMCR: + description: DSI Host video mode configuration register. + fields: + - name: VMT + description: VMT. + bit_offset: 0 + bit_size: 2 + - name: LPVSAE + description: LPVSAE. + bit_offset: 8 + bit_size: 1 + - name: LPVBPE + description: LPVBPE. + bit_offset: 9 + bit_size: 1 + - name: LPVFPE + description: LPVFPE. + bit_offset: 10 + bit_size: 1 + - name: LPVAE + description: LPVAE. + bit_offset: 11 + bit_size: 1 + - name: LPHBPE + description: LPHBPE. + bit_offset: 12 + bit_size: 1 + - name: LPHFPE + description: LPHFPE. + bit_offset: 13 + bit_size: 1 + - name: FBTAAE + description: FBTAAE. + bit_offset: 14 + bit_size: 1 + - name: LPCE + description: LPCE. + bit_offset: 15 + bit_size: 1 + - name: PGE + description: PGE. + bit_offset: 16 + bit_size: 1 + - name: PGM + description: PGM. + bit_offset: 20 + bit_size: 1 + - name: PGO + description: PGO. + bit_offset: 24 + bit_size: 1 +fieldset/VNPCCR: + description: DSI Host video null packet current configuration register. + fields: + - name: NPSIZE + description: NPSIZE. + bit_offset: 0 + bit_size: 13 +fieldset/VNPCR: + description: DSI Host video null packet configuration register. + fields: + - name: NPSIZE + description: NPSIZE. + bit_offset: 0 + bit_size: 13 +fieldset/VPCCR: + description: DSI Host video packet current configuration register. + fields: + - name: VPSIZE + description: VPSIZE. + bit_offset: 0 + bit_size: 14 +fieldset/VPCR: + description: DSI Host video packet configuration register. + fields: + - name: VPSIZE + description: VPSIZE. + bit_offset: 0 + bit_size: 14 +fieldset/VR: + description: DSI Host version register. + fields: + - name: VERSION + description: VERSION. + bit_offset: 0 + bit_size: 32 +fieldset/VSCR: + description: DSI Host video shadow control register. + fields: + - name: EN + description: EN. + bit_offset: 0 + bit_size: 1 + - name: UR + description: UR. + bit_offset: 8 + bit_size: 1 +fieldset/VVACCR: + description: DSI Host video VA current configuration register. + fields: + - name: VA + description: VA. + bit_offset: 0 + bit_size: 14 +fieldset/VVACR: + description: DSI Host video VA configuration register. + fields: + - name: VA + description: VA. + bit_offset: 0 + bit_size: 14 +fieldset/VVBPCCR: + description: DSI Host video VBP current configuration register. + fields: + - name: VBP + description: VBP. + bit_offset: 0 + bit_size: 10 +fieldset/VVBPCR: + description: DSI Host video VBP configuration register. + fields: + - name: VBP + description: VBP. + bit_offset: 0 + bit_size: 10 +fieldset/VVFPCCR: + description: DSI Host video VFP current configuration register. + fields: + - name: VFP + description: VFP. + bit_offset: 0 + bit_size: 10 +fieldset/VVFPCR: + description: DSI Host video VFP configuration register. + fields: + - name: VFP + description: VFP. + bit_offset: 0 + bit_size: 10 +fieldset/VVSACCR: + description: DSI Host video VSA current configuration register. + fields: + - name: VSA + description: VSA. + bit_offset: 0 + bit_size: 10 +fieldset/VVSACR: + description: DSI Host video VSA configuration register. + fields: + - name: VSA + description: VSA. + bit_offset: 0 + bit_size: 10 +fieldset/WCFGR: + description: DSI wrapper configuration register. + fields: + - name: DSIM + description: DSIM. + bit_offset: 0 + bit_size: 1 + - name: COLMUX + description: COLMUX. + bit_offset: 1 + bit_size: 3 + - name: TESRC + description: TESRC. + bit_offset: 4 + bit_size: 1 + - name: TEPOL + description: TEPOL. + bit_offset: 5 + bit_size: 1 + - name: AR + description: AR. + bit_offset: 6 + bit_size: 1 + - name: VSPOL + description: VSPOL. + bit_offset: 7 + bit_size: 1 +fieldset/WCR: + description: DSI wrapper control register. + fields: + - name: COLM + description: COLM. + bit_offset: 0 + bit_size: 1 + - name: SHTDN + description: SHTDN. + bit_offset: 1 + bit_size: 1 + - name: LTDCEN + description: LTDCEN. + bit_offset: 2 + bit_size: 1 + - name: DSIEN + description: DSIEN. + bit_offset: 3 + bit_size: 1 +fieldset/WIER: + description: DSI wrapper interrupt enable register. + fields: + - name: TEIE + description: TEIE. + bit_offset: 0 + bit_size: 1 + - name: ERIE + description: ERIE. + bit_offset: 1 + bit_size: 1 + - name: PLLLIE + description: PLLLIE. + bit_offset: 9 + bit_size: 1 + - name: PLLUIE + description: PLLUIE. + bit_offset: 10 + bit_size: 1 + - name: RRIE + description: RRIE. + bit_offset: 13 + bit_size: 1 +fieldset/WIFCR: + description: DSI wrapper interrupt flag clear register. + fields: + - name: CTEIF + description: CTEIF. + bit_offset: 0 + bit_size: 1 + - name: CERIF + description: CERIF. + bit_offset: 1 + bit_size: 1 + - name: CPLLLIF + description: CPLLLIF. + bit_offset: 9 + bit_size: 1 + - name: CPLLUIF + description: CPLLUIF. + bit_offset: 10 + bit_size: 1 + - name: CRRIF + description: CRRIF. + bit_offset: 13 + bit_size: 1 +fieldset/WISR: + description: DSI wrapper interrupt and status register. + fields: + - name: TEIF + description: TEIF. + bit_offset: 0 + bit_size: 1 + - name: ERIF + description: ERIF. + bit_offset: 1 + bit_size: 1 + - name: BUSY + description: BUSY. + bit_offset: 2 + bit_size: 1 + - name: PLLLS + description: PLLLS. + bit_offset: 8 + bit_size: 1 + - name: PLLLIF + description: PLLLIF. + bit_offset: 9 + bit_size: 1 + - name: PLLUIF + description: PLLUIF. + bit_offset: 10 + bit_size: 1 + - name: RRS + description: RRS. + bit_offset: 12 + bit_size: 1 + - name: RRIF + description: RRIF. + bit_offset: 13 + bit_size: 1 +fieldset/WPCR0: + description: DSI wrapper PHY configuration register 0. + fields: + - name: UIX4 + description: UIX4. + bit_offset: 0 + bit_size: 6 + - name: SWCL + description: SWCL. + bit_offset: 6 + bit_size: 1 + - name: SWDL0 + description: SWDL0. + bit_offset: 7 + bit_size: 1 + - name: SWDL1 + description: SWDL1. + bit_offset: 8 + bit_size: 1 + - name: HSICL + description: HSICL. + bit_offset: 9 + bit_size: 1 + - name: HSIDL0 + description: HSIDL0. + bit_offset: 10 + bit_size: 1 + - name: HSIDL1 + description: HSIDL1. + bit_offset: 11 + bit_size: 1 + - name: FTXSMCL + description: FTXSMCL. + bit_offset: 12 + bit_size: 1 + - name: FTXSMDL + description: FTXSMDL. + bit_offset: 13 + bit_size: 1 + - name: CDOFFDL + description: CDOFFDL. + bit_offset: 14 + bit_size: 1 + - name: TDDL + description: TDDL. + bit_offset: 16 + bit_size: 1 +fieldset/WPCR1: + description: This register shall be programmed only when DSI is stopped (CR. DSIEN=0 and CR.EN = 0). + fields: + - name: SKEWCL + description: SKEWCL. + bit_offset: 0 + bit_size: 2 + - name: SKEWDL + description: SKEWDL. + bit_offset: 2 + bit_size: 2 + - name: LPTXSRCL + description: LPTXSRCL. + bit_offset: 6 + bit_size: 2 + - name: LPTXSRDL + description: LPTXSRDL. + bit_offset: 8 + bit_size: 2 + - name: SDDCCL + description: SDDCCL. + bit_offset: 12 + bit_size: 1 + - name: SDDCDL + description: SDDCDL. + bit_offset: 13 + bit_size: 1 + - name: HSTXSRUCL + description: HSTXSRUCL. + bit_offset: 16 + bit_size: 1 + - name: HSTXSRDCL + description: HSTXSRDCL. + bit_offset: 17 + bit_size: 1 + - name: HSTXSRUDL + description: HSTXSRUDL. + bit_offset: 18 + bit_size: 1 + - name: HSTXSRDDL + description: HSTXSRDDL. + bit_offset: 19 + bit_size: 1 +fieldset/WRPCR: + description: DSI wrapper regulator and PLL control register. + fields: + - name: PLLEN + description: PLLEN. + bit_offset: 0 + bit_size: 1 + - name: NDIV + description: NDIV. + bit_offset: 2 + bit_size: 7 + - name: IDF + description: IDF. + bit_offset: 11 + bit_size: 4 + - name: ODF + description: ODF. + bit_offset: 16 + bit_size: 2 + - name: REGEN + description: REGEN. + bit_offset: 24 + bit_size: 1 + - name: BGREN + description: BGREN. + bit_offset: 28 + bit_size: 1 diff --git a/stm32-data-gen/src/chips.rs b/stm32-data-gen/src/chips.rs index c58363c..e348e9e 100644 --- a/stm32-data-gen/src/chips.rs +++ b/stm32-data-gen/src/chips.rs @@ -263,6 +263,9 @@ impl PeriMatcher { (".*:WWDG:wwdg1_v2_0", ("wwdg", "v2", "WWDG")), (".*:JPEG:jpeg1_v1_0", ("jpeg", "v1", "JPEG")), (".*:LTDC:lcdtft1_v1_1", ("ltdc", "v1", "LTDC")), + (".*:DSIHOST:dsihost1_v1_0", ("dsihost", "v1", "DSIHOST")), + (".*:DSIHOST:dsihost1_v1_0_SHARK", ("dsihost", "v1", "DSIHOST")), + (".*:DSIHOST:dsihost1_v2_0", ("dsihost", "v2", "DSIHOST")), (".*:MDIOS:mdios1_v1_0", ("mdios", "v1", "MDIOS")), (".*:QUADSPI:.*", ("quadspi", "v1", "QUADSPI")), ("STM32F1.*:BKP.*", ("bkp", "v1", "BKP")), diff --git a/stm32-data-gen/src/header.rs b/stm32-data-gen/src/header.rs index b6dfb44..82fc349 100644 --- a/stm32-data-gen/src/header.rs +++ b/stm32-data-gen/src/header.rs @@ -190,6 +190,7 @@ impl Defines { ), ("FDCANRAM", &["SRAMCAN_BASE", "SRAMCAN_BASE_NS"]), ("VREFINTCAL", &["VREFINT_CAL_ADDR_CMSIS"]), + ("DSIHOST", &["DSI_BASE"]), ]; let alt_peri_defines: HashMap<_, _> = ALT_PERI_DEFINES.iter().copied().collect();