rcc: add MCO enums for WB

data/registers/rcc_wb.yaml

@@ -1192,10 +1192,12 @@ fieldset/CFGR:
     description: Microcontroller clock output
     bit_offset: 24
     bit_size: 4
+    enum: MCOSEL
   - name: MCOPRE
     description: Microcontroller clock output prescaler
     bit_offset: 28
     bit_size: 3
+    enum: MCOPRE
 fieldset/CICR:
   description: Clock interrupt clear register
   fields:
@@ -1700,6 +1702,60 @@ enum/LSEDRV:
   - name: High
     description: High driving capability
     value: 3
+enum/MCOPRE:
+  bit_size: 3
+  variants:
+  - name: Div1
+    description: No division
+    value: 0
+  - name: Div2
+    description: Division by 2
+    value: 1
+  - name: Div4
+    description: Division by 4
+    value: 2
+  - name: Div8
+    description: Division by 8
+    value: 3
+  - name: Div16
+    description: Division by 16
+    value: 4
+enum/MCOSEL:
+  bit_size: 4
+  variants:
+  - name: NoClock
+    description: No clock
+    value: 0
+  - name: SYSCLK
+    description: SYSCLK clock selected
+    value: 1
+  - name: MSI
+    description: MSI oscillator clock selected
+    value: 2
+  - name: HSI16
+    description: HSI oscillator clock selected
+    value: 3
+  - name: HSE
+    description: HSE clock selected (after stabilization, after HSERDY = 1)
+    value: 4
+  - name: PLL_R
+    description: PLL clock selected
+    value: 5
+  - name: LSI1
+    description: LSI1 oscillator clock selected
+    value: 6
+  - name: LSI2
+    description: LSI2 oscillator clock selected
+    value: 7
+  - name: LSE
+    description: LSE oscillator clock selected
+    value: 8
+  - name: HSI48
+    description: HSI48 oscillator clock selected
+    value: 9
+  - name: HSE_UNSTABLE
+    description: HSE clock selected (before stabilization, after HSEON = 1)
+    value: 12
 enum/PPRE:
   bit_size: 3
   variants: