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tailoring form timadv to tim2chcmp

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This commit is contained in:
eZio Pan 2024-01-20 19:34:37 +08:00
parent 4bdc25368f
commit 8c0ab318ca
1 changed files with 56 additions and 441 deletions
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497
data/registers/tim2chcmp_v2.yaml
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@ -27,16 +27,16 @@ block/TIM:
access: Write
fieldset: EGR
- name: CCMR_Input
description: capture/compare mode register 1-2 (input mode)
description: capture/compare mode register 1 (input mode)
array:
len: 2
len: 1
stride: 4
byte_offset: 24
fieldset: CCMR_Input
- name: CCMR_Output
description: capture/compare mode register 1-2 (output mode)
description: capture/compare mode register 1 (output mode)
array:
len: 2
len: 1
stride: 4
byte_offset: 24
fieldset: CCMR_Output
@ -65,16 +65,16 @@ block/TIM:
byte_offset: 48
fieldset: RCR
- name: CCR
description: capture/compare register x (x=1-4) (Dither mode disabled)
description: capture/compare register x (x=1-2) (Dither mode disabled)
array:
len: 4
len: 2
stride: 4
byte_offset: 52
fieldset: CCR
- name: CCR_DITHER
description: capture/compare register x (x=1-4) (Dither mode enabled)
description: capture/compare register x (x=1-2) (Dither mode enabled)
array:
len: 4
len: 2
stride: 4
byte_offset: 52
fieldset: CCR_DITHER
@ -82,34 +82,10 @@ block/TIM:
description: break and dead-time register
byte_offset: 68
fieldset: BDTR
- name: CCR5
description: capture/compare register 5 (Dither mode disabled)
byte_offset: 72
fieldset: CCR5
- name: CCR5_DITHER
description: capture/compare register 5 (Dither mode enabled)
byte_offset: 72
fieldset: CCR5_DITHER
- name: CCR6
description: capture/compare register 6 (Dither mode disabled)
byte_offset: 76
fieldset: CCR
- name: CCR6_DITHER
description: capture/compare register 6 (Dither mode enabled)
byte_offset: 76
fieldset: CCR_DITHER
- name: CCMR3
description: capture/compare mode register 3
byte_offset: 80
fieldset: CCMR3
- name: DTR2
description: break and dead-time register
byte_offset: 84
fieldset: DTR2
- name: ECR
description: encoder control register
byte_offset: 88
fieldset: ECR
- name: TISEL
description: input selection register
byte_offset: 92
@ -157,37 +133,9 @@ fieldset/AF1:
len: 4
stride: 1
enum: BKINP
- name: ETRSEL
description: etr_in source selection
bit_offset: 14
bit_size: 4
fieldset/AF2:
description: alternate function register 2
fields:
- name: BK2INE
description: TIMx_BKIN2 input enable
bit_offset: 0
bit_size: 1
- name: BK2CMPE
description: TIM_BRK2_CMPx (x=1-8) enable
bit_offset: 1
bit_size: 1
array:
len: 1
stride: 8
- name: BK2INP
description: TIMx_BK2IN input polarity
bit_offset: 9
bit_size: 1
enum: BKINP
- name: BK2CMPP
description: TIM_BRK2_CMPx (x=1-4) input polarity
bit_offset: 10
bit_size: 1
array:
len: 1
stride: 4
enum: BKINP
- name: OCRSEL
description: ocref_clr source selection
bit_offset: 16
@ -233,18 +181,18 @@ fieldset/BDTR:
bit_size: 1
enum: OSSR
- name: BKE
description: Break x (x=1,2) enable
description: Break x (x=1) enable
bit_offset: 12
bit_size: 1
array:
len: 2
len: 1
stride: 12
- name: BKP
description: Break x (x=1,2) polarity
description: Break x (x=1) polarity
bit_offset: 13
bit_size: 1
array:
len: 2
len: 1
stride: 12
enum: BKP
- name: AOE
@ -256,94 +204,62 @@ fieldset/BDTR:
bit_offset: 15
bit_size: 1
- name: BKF
description: Break x (x=1,2) filter
description: Break x (x=1) filter
bit_offset: 16
bit_size: 4
array:
len: 2
len: 1
stride: 4
enum: FilterValue
- name: BKDSRM
description: Break x (x=1,2) Disarm
description: Break x (x=1) Disarm
bit_offset: 26
bit_size: 1
array:
len: 2
len: 1
stride: 1
enum: BKDSRM
- name: BKBID
description: Break x (x=1,2) bidirectional
description: Break x (x=1) bidirectional
bit_offset: 28
bit_size: 1
array:
len: 2
len: 1
stride: 1
enum: BKBID
fieldset/CCER:
description: capture/compare enable register
fields:
- name: CCE
description: Capture/Compare x (x=1-6) output enable
description: Capture/Compare x (x=1-2) output enable
bit_offset: 0
bit_size: 1
array:
len: 6
len: 2
stride: 4
- name: CCP
description: Capture/Compare x (x=1-6) output Polarity
description: Capture/Compare x (x=1-2) output Polarity
bit_offset: 1
bit_size: 1
array:
len: 6
len: 2
stride: 4
- name: CCNE
description: Capture/Compare x (x=1-4) complementary output enable
description: Capture/Compare x (x=1) complementary output enable
bit_offset: 2
bit_size: 1
array:
len: 4
len: 1
stride: 4
- name: CCNP
description: Capture/Compare x (x=1-4) output Polarity
description: Capture/Compare x (x=1-2) output Polarity
bit_offset: 3
bit_size: 1
array:
len: 4
len: 2
stride: 4
fieldset/CCMR3:
description: capture/compare mode register 3
fields:
- name: OCFE
description: Output compare x (x=5,6) fast enable
bit_offset: 2
bit_size: 1
array:
len: 2
stride: 8
- name: OCPE
description: Output compare x (x=5,6) preload enable
bit_offset: 3
bit_size: 1
array:
len: 2
stride: 8
- name: OCM
description: Output compare x (x=5,6) mode
bit_offset: 4
bit_size: 3
array:
len: 2
stride: 8
enum: OCM
- name: OCCE
description: Output compare x (x=5,6) clear enable
bit_offset: 7
bit_size: 1
array:
len: 2
stride: 8
fieldset/CCMR_Input:
description: capture/compare mode register x (x=1-2) (input mode)
description: capture/compare mode register x (x=1) (input mode)
fields:
- name: CCS
description: Capture/Compare y selection
@ -369,7 +285,7 @@ fieldset/CCMR_Input:
stride: 8
enum: FilterValue
fieldset/CCMR_Output:
description: capture/compare mode register x (x=1-3) (output mode)
description: capture/compare mode register x (x=1) (output mode)
fields:
- name: CCS
description: Capture/Compare y selection
@ -409,38 +325,14 @@ fieldset/CCMR_Output:
len: 2
stride: 8
fieldset/CCR:
description: capture/compare register x (x=1-4,6) (Dither mode disabled)
description: capture/compare register x (x=1,2) (Dither mode disabled)
fields:
- name: CCR
description: capture/compare x (x=1-4,6) value
description: capture/compare x (x=1,2) value
bit_offset: 0
bit_size: 16
fieldset/CCR5:
extends: CCR
description: capture/compare register 5 (Dither mode disabled)
fields:
- name: GC5C
description: Group channel 5 and channel x (x=1-3)
bit_offset: 29
bit_size: 1
array:
len: 3
stride: 1
enum: GC5C
fieldset/CCR5_DITHER:
extends: CCR_DITHER
description: capture/compare register 5 (Dither mode enabled)
fields:
- name: GC5C
description: Group channel 5 and channel x (x=1-3)
bit_offset: 29
bit_size: 1
array:
len: 3
stride: 1
enum: GC5C
fieldset/CCR_DITHER:
description: capture/compare register x (x=1-4,6) (Dither mode enabled)
description: capture/compare register x (x=1,2) (Dither mode enabled)
fields:
- name: DITHER
description: Dither value
@ -481,16 +373,6 @@ fieldset/CR1:
description: One-pulse mode enbaled
bit_offset: 3
bit_size: 1
- name: DIR
description: Direction
bit_offset: 4
bit_size: 1
enum: DIR
- name: CMS
description: Center-aligned mode selection
bit_offset: 5
bit_size: 2
enum: CMS
- name: ARPE
description: Auto-reload preload enable
bit_offset: 7
@ -535,24 +417,19 @@ fieldset/CR2:
bit_size: 1
enum: TI1S
- name: OIS
description: Output Idle state x (x=1-6)
description: Output Idle state x (x=1,2)
bit_offset: 8
bit_size: 1
array:
len: 6
len: 2
stride: 2
- name: OISN
description: Output Idle state x N x (x=1-4)
description: Output Idle state x (x=1)
bit_offset: 9
bit_size: 1
array:
len: 4
len: 1
stride: 2
- name: MMS2
description: Master mode selection 2
bit_offset: 20
bit_size: 4
enum: MMS2
fieldset/DCR:
description: DMA control register
fields:
@ -577,11 +454,11 @@ fieldset/DIER:
bit_offset: 0
bit_size: 1
- name: CCIE
description: Capture/Compare x (x=1-4) interrupt enable
description: Capture/Compare x (x=1-2) interrupt enable
bit_offset: 1
bit_size: 1
array:
len: 4
len: 2
stride: 1
- name: COMIE
description: COM interrupt enable
@ -600,11 +477,11 @@ fieldset/DIER:
bit_offset: 8
bit_size: 1
- name: CCDE
description: Capture/Compare x (x=1-4) DMA request enable
description: Capture/Compare x (x=1) DMA request enable
bit_offset: 9
bit_size: 1
array:
len: 4
len: 1
stride: 1
- name: COMDE
description: COM DMA request enable
@ -614,22 +491,6 @@ fieldset/DIER:
description: Trigger DMA request enable
bit_offset: 14
bit_size: 1
- name: IDXIE
description: Index interrupt enable
bit_offset: 20
bit_size: 1
- name: DIRIE
description: Direction change interrupt enable
bit_offset: 21
bit_size: 1
- name: IERRIE
description: Index error interrupt enable
bit_offset: 22
bit_size: 1
- name: TERRIE
description: Transition error interrupt enable
bit_offset: 23
bit_size: 1
fieldset/DMAR:
description: DMA address for full transfer
fields:
@ -653,40 +514,6 @@ fieldset/DTR2:
description: Deadtime preload enable
bit_offset: 17
bit_size: 1
fieldset/ECR:
description: encoder control register
fields:
- name: IE
description: Index enable
bit_offset: 0
bit_size: 1
- name: IDIR
description: Index direction
bit_offset: 1
bit_size: 2
enum: IDIR
- name: IBLK
description: Index blanking
bit_offset: 3
bit_size: 2
enum: IBLK
- name: FIDX
description: First index
bit_offset: 5
bit_size: 1
enum: FIDX
- name: IPOS
description: Index positioning
bit_offset: 6
bit_size: 2
- name: PW
description: Pulse width
bit_offset: 16
bit_size: 8
- name: PWPRSC
description: Pulse width prescaler
bit_offset: 24
bit_size: 2
fieldset/EGR:
description: event generation register
fields:
@ -695,11 +522,11 @@ fieldset/EGR:
bit_offset: 0
bit_size: 1
- name: CCG
description: Capture/compare x (x=1-4) generation
description: Capture/compare x (x=1-2) generation
bit_offset: 1
bit_size: 1
array:
len: 4
len: 2
stride: 1
- name: COMG
description: Capture/Compare control update generation
@ -710,11 +537,11 @@ fieldset/EGR:
bit_offset: 6
bit_size: 1
- name: BG
description: Break x (x=1-2) generation
description: Break x (x=1) generation
bit_offset: 7
bit_size: 1
array:
len: 2
len: 1
stride: 1
fieldset/PSC:
description: prescaler
@ -729,7 +556,7 @@ fieldset/RCR:
- name: REP
description: Repetition counter value
bit_offset: 0
bit_size: 16
bit_size: 8
fieldset/SMCR:
description: slave mode control register
fields:
@ -738,11 +565,6 @@ fieldset/SMCR:
bit_offset: 0
bit_size: 3
enum: SMS
- name: OCCS
description: OCREF clear selection
bit_offset: 3
bit_size: 1
enum: OCCS
- name: TS
description: Trigger selection
bit_offset: 4
@ -753,34 +575,10 @@ fieldset/SMCR:
bit_offset: 7
bit_size: 1
enum: MSM
- name: ETF
description: External trigger filter
bit_offset: 8
bit_size: 4
enum: FilterValue
- name: ETPS
description: External trigger prescaler
bit_offset: 12
bit_size: 2
enum: ETPS
- name: ECE
description: External clock mode 2 enable
bit_offset: 14
bit_size: 1
- name: ETP
description: External trigger polarity
bit_offset: 15
bit_size: 1
enum: ETP
- name: SMSPE
description: SMS preload enable
bit_offset: 24
bit_size: 1
- name: SMSPS
description: SMS preload source
bit_offset: 25
bit_size: 1
enum: SMSPS
fieldset/SR:
description: status register
fields:
@ -789,11 +587,11 @@ fieldset/SR:
bit_offset: 0
bit_size: 1
- name: CCIF
description: Capture/compare x (x=1-4) interrupt flag
description: Capture/compare x (x=1-2) interrupt flag
bit_offset: 1
bit_size: 1
array:
len: 4
len: 2
stride: 1
- name: COMIF
description: COM interrupt flag
@ -804,52 +602,28 @@ fieldset/SR:
bit_offset: 6
bit_size: 1
- name: BIF
description: Break x (x=1,2) interrupt flag
description: Break x (x=1) interrupt flag
bit_offset: 7
bit_size: 1
array:
len: 1
stride: 1
- name: CCOF
description: Capture/Compare x (x=1-2) overcapture flag
bit_offset: 9
bit_size: 1
array:
len: 2
stride: 1
- name: CCOF
description: Capture/Compare x (x=1-4) overcapture flag
bit_offset: 9
bit_size: 1
array:
len: 4
stride: 1
- name: CCIF5
description: Capture/compare 5 interrupt flag
bit_offset: 16
bit_size: 1
- name: CCIF6
description: Capture/compare 6 interrupt flag
bit_offset: 17
bit_size: 1
- name: IDXIF
description: Index interrupt flag
bit_offset: 20
bit_size: 1
- name: DIRIF
description: Direction change interrupt flag
bit_offset: 21
bit_size: 1
- name: IERRIF
description: Index error interrupt flag
bit_offset: 22
bit_size: 1
- name: TERRIF
description: Transition error interrupt flag
bit_offset: 23
bit_size: 1
fieldset/TISEL:
description: input selection register
fields:
- name: TISEL
description: Selects TIM_TIx (x=1-4) input
description: Selects TIM_TIx (x=1-2) input
bit_offset: 0
bit_size: 4
array:
len: 4
len: 2
stride: 8
enum/BKBID:
bit_size: 1
@ -926,21 +700,6 @@ enum/CKD:
- name: Div4
description: t_DTS = 4 × t_CK_INT
value: 2
enum/CMS:
bit_size: 2
variants:
- name: EdgeAligned
description: The counter counts up or down depending on the direction bit
value: 0
- name: CenterAligned1
description: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down.
value: 1
- name: CenterAligned2
description: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up.
value: 2
- name: CenterAligned3
description: The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down.
value: 3
enum/DBSS:
bit_size: 4
variants:
@ -965,15 +724,6 @@ enum/DBSS:
- name: Trigger
description: Trigger
value: 7
enum/DIR:
bit_size: 1
variants:
- name: Up
description: Counter used as upcounter
value: 0
- name: Down
description: Counter used as downcounter
value: 1
enum/DTAE:
bit_size: 1
variants:
@ -983,39 +733,6 @@ enum/DTAE:
- name: Distinct
description: Deadtime on rising edge is defined with DTG[7:0] register and deadtime on falling edge is defined with DTGF[7:0] bits.
value: 1
enum/ETP:
bit_size: 1
variants:
- name: NotInverted
description: ETR is noninverted, active at high level or rising edge
value: 0
- name: Inverted
description: ETR is inverted, active at low level or falling edge
value: 1
enum/ETPS:
bit_size: 2
variants:
- name: Div1
description: Prescaler OFF
value: 0
- name: Div2
description: ETRP frequency divided by 2
value: 1
- name: Div4
description: ETRP frequency divided by 4
value: 2
- name: Div8
description: ETRP frequency divided by 8
value: 3
enum/FIDX:
bit_size: 1
variants:
- name: AlwaysActive
description: Index is always active
value: 0
- name: FirstOnly
description: the first Index only resets the counter
value: 1
enum/FilterValue:
bit_size: 4
variants:
@ -1067,39 +784,6 @@ enum/FilterValue:
- name: FDTS_Div32_N8
description: fSAMPLING=fDTS/32, N=8
value: 15
enum/GC5C:
bit_size: 1
variants:
- name: NoEffect
description: No effect of TIM_OC5REF on TIM_OCxREFC (x=1-3)
value: 0
- name: LogicalAND
description: TIM_OCxREFC is the logical AND of TIM_OCxREF and TIM_OC5REF
value: 1
enum/IBLK:
bit_size: 2
variants:
- name: AlwaysActive
description: Index always active
value: 0
- name: CC3P
description: Index disabled when tim_ti3 input is active, as per CC3P bitfield
value: 1
- name: CC4P
description: Index disabled when tim_ti4 input is active, as per CC4P bitfield
value: 2
enum/IDIR:
bit_size: 2
variants:
- name: Both
description: Index resets the counter whatever the direction
value: 0
- name: Up
description: Index resets the counter when up-counting only
value: 1
- name: Down
description: Index resets the counter when down-counting only
value: 2
enum/LOCK:
bit_size: 2
variants:
@ -1142,57 +826,6 @@ enum/MMS:
- name: CompareOC4
description: OC4REF signal is used as trigger output
value: 7
enum/MMS2:
bit_size: 4
variants:
- name: Reset
description: The UG bit from the TIMx_EGR register is used as TRGO2
value: 0
- name: Enable
description: The counter enable signal, CNT_EN, is used as TRGO2
value: 1
- name: Update
description: The update event is selected as TRGO2
value: 2
- name: ComparePulse
description: TRGO2 send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred
value: 3
- name: CompareOC1
description: OC1REF signal is used as TRGO2
value: 4
- name: CompareOC2
description: OC2REF signal is used as TRGO2
value: 5
- name: CompareOC3
description: OC3REF signal is used as TRGO2
value: 6
- name: CompareOC4
description: OC4REF signal is used as TRGO2
value: 7
- name: CompareOC5
description: OC5REF signal is used as TRGO2
value: 8
- name: CompareOC6
description: OC6REF signal is used as TRGO2
value: 9
- name: ComparePulse_OC4
description: OC4REF rising or falling edges generate pulses on TRGO2
value: 10
- name: ComparePulse_OC6
description: OC6REF rising or falling edges generate pulses on TRGO2
value: 11
- name: ComparePulse_OC4_Or_OC6_Rising
description: OC4REF or OC6REF rising edges generate pulses on TRGO2
value: 12
- name: ComparePulse_OC4_Rising_Or_OC6_Falling
description: OC4REF rising or OC6REF falling edges generate pulses on TRGO2
value: 13
- name: ComparePulse_OC5_Or_OC6_Rising
description: OC5REF or OC6REF rising edges generate pulses on TRGO2
value: 14
- name: ComparePulse_OC5_Rising_Or_OC6_Falling
description: OC5REF rising or OC6REF falling edges generate pulses on TRGO2
value: 15
enum/MSM:
bit_size: 1
variants:
@ -1202,15 +835,6 @@ enum/MSM:
- name: Sync
description: The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event.
value: 1
enum/OCCS:
bit_size: 1
variants:
- name: Input
description: tim_ocref_clr_int is connected to the tim_ocref_clr input
value: 0
- name: ETRF
description: tim_ocref_clr_int is connected to tim_etrf
value: 1
enum/OCM:
bit_size: 3
variants:
@ -1283,15 +907,6 @@ enum/SMS:
- name: Ext_Clock_Mode
description: External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter.
value: 7
enum/SMSPS:
bit_size: 1
variants:
- name: Update
description: The transfer is triggered by the Timer’s Update event
value: 0
- name: Index
description: The transfer is triggered by the Index event
value: 1
enum/TI1S:
bit_size: 1
variants: