tailoring form timadv to tim2chcmp
This commit is contained in:
parent
4bdc25368f
commit
8c0ab318ca
@ -27,16 +27,16 @@ block/TIM:
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access: Write
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access: Write
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fieldset: EGR
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fieldset: EGR
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1-2 (input mode)
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description: capture/compare mode register 1 (input mode)
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array:
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array:
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len: 2
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len: 1
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stride: 4
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stride: 4
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byte_offset: 24
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byte_offset: 24
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fieldset: CCMR_Input
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fieldset: CCMR_Input
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- name: CCMR_Output
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- name: CCMR_Output
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description: capture/compare mode register 1-2 (output mode)
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description: capture/compare mode register 1 (output mode)
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array:
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array:
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len: 2
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len: 1
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stride: 4
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stride: 4
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byte_offset: 24
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byte_offset: 24
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fieldset: CCMR_Output
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fieldset: CCMR_Output
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@ -65,16 +65,16 @@ block/TIM:
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byte_offset: 48
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byte_offset: 48
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fieldset: RCR
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fieldset: RCR
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- name: CCR
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- name: CCR
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description: capture/compare register x (x=1-4) (Dither mode disabled)
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description: capture/compare register x (x=1-2) (Dither mode disabled)
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array:
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array:
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len: 4
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len: 2
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stride: 4
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stride: 4
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byte_offset: 52
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byte_offset: 52
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fieldset: CCR
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fieldset: CCR
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- name: CCR_DITHER
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- name: CCR_DITHER
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description: capture/compare register x (x=1-4) (Dither mode enabled)
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description: capture/compare register x (x=1-2) (Dither mode enabled)
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array:
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array:
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len: 4
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len: 2
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stride: 4
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stride: 4
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byte_offset: 52
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byte_offset: 52
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fieldset: CCR_DITHER
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fieldset: CCR_DITHER
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@ -82,34 +82,10 @@ block/TIM:
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description: break and dead-time register
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description: break and dead-time register
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byte_offset: 68
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byte_offset: 68
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fieldset: BDTR
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fieldset: BDTR
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- name: CCR5
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description: capture/compare register 5 (Dither mode disabled)
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byte_offset: 72
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fieldset: CCR5
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- name: CCR5_DITHER
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description: capture/compare register 5 (Dither mode enabled)
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byte_offset: 72
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fieldset: CCR5_DITHER
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- name: CCR6
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description: capture/compare register 6 (Dither mode disabled)
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byte_offset: 76
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fieldset: CCR
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- name: CCR6_DITHER
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description: capture/compare register 6 (Dither mode enabled)
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byte_offset: 76
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fieldset: CCR_DITHER
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- name: CCMR3
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description: capture/compare mode register 3
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byte_offset: 80
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fieldset: CCMR3
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- name: DTR2
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- name: DTR2
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description: break and dead-time register
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description: break and dead-time register
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byte_offset: 84
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byte_offset: 84
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fieldset: DTR2
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fieldset: DTR2
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- name: ECR
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description: encoder control register
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byte_offset: 88
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fieldset: ECR
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- name: TISEL
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- name: TISEL
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description: input selection register
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description: input selection register
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byte_offset: 92
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byte_offset: 92
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@ -157,37 +133,9 @@ fieldset/AF1:
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len: 4
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len: 4
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stride: 1
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stride: 1
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enum: BKINP
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enum: BKINP
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- name: ETRSEL
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description: etr_in source selection
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bit_offset: 14
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bit_size: 4
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fieldset/AF2:
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fieldset/AF2:
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description: alternate function register 2
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description: alternate function register 2
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fields:
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fields:
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- name: BK2INE
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description: TIMx_BKIN2 input enable
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bit_offset: 0
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bit_size: 1
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- name: BK2CMPE
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description: TIM_BRK2_CMPx (x=1-8) enable
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bit_offset: 1
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bit_size: 1
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array:
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len: 1
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stride: 8
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- name: BK2INP
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description: TIMx_BK2IN input polarity
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bit_offset: 9
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bit_size: 1
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enum: BKINP
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- name: BK2CMPP
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description: TIM_BRK2_CMPx (x=1-4) input polarity
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bit_offset: 10
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bit_size: 1
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array:
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len: 1
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stride: 4
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enum: BKINP
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- name: OCRSEL
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- name: OCRSEL
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description: ocref_clr source selection
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description: ocref_clr source selection
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bit_offset: 16
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bit_offset: 16
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@ -233,18 +181,18 @@ fieldset/BDTR:
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bit_size: 1
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bit_size: 1
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enum: OSSR
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enum: OSSR
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- name: BKE
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- name: BKE
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description: Break x (x=1,2) enable
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description: Break x (x=1) enable
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bit_offset: 12
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bit_offset: 12
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 2
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len: 1
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stride: 12
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stride: 12
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- name: BKP
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- name: BKP
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description: Break x (x=1,2) polarity
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description: Break x (x=1) polarity
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bit_offset: 13
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bit_offset: 13
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 2
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len: 1
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stride: 12
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stride: 12
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enum: BKP
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enum: BKP
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- name: AOE
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- name: AOE
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@ -256,94 +204,62 @@ fieldset/BDTR:
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bit_offset: 15
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bit_offset: 15
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bit_size: 1
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bit_size: 1
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- name: BKF
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- name: BKF
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description: Break x (x=1,2) filter
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description: Break x (x=1) filter
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bit_offset: 16
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bit_offset: 16
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bit_size: 4
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bit_size: 4
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array:
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array:
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len: 2
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len: 1
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stride: 4
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stride: 4
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enum: FilterValue
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enum: FilterValue
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- name: BKDSRM
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- name: BKDSRM
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description: Break x (x=1,2) Disarm
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description: Break x (x=1) Disarm
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bit_offset: 26
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bit_offset: 26
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 2
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len: 1
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stride: 1
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stride: 1
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enum: BKDSRM
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enum: BKDSRM
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- name: BKBID
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- name: BKBID
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description: Break x (x=1,2) bidirectional
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description: Break x (x=1) bidirectional
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bit_offset: 28
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bit_offset: 28
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 2
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len: 1
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stride: 1
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stride: 1
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enum: BKBID
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enum: BKBID
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fieldset/CCER:
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fieldset/CCER:
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description: capture/compare enable register
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description: capture/compare enable register
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fields:
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fields:
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- name: CCE
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- name: CCE
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description: Capture/Compare x (x=1-6) output enable
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description: Capture/Compare x (x=1-2) output enable
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 6
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len: 2
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stride: 4
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stride: 4
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- name: CCP
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- name: CCP
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description: Capture/Compare x (x=1-6) output Polarity
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description: Capture/Compare x (x=1-2) output Polarity
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bit_offset: 1
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bit_offset: 1
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 6
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len: 2
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stride: 4
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stride: 4
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- name: CCNE
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- name: CCNE
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description: Capture/Compare x (x=1-4) complementary output enable
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description: Capture/Compare x (x=1) complementary output enable
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bit_offset: 2
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bit_offset: 2
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 4
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len: 1
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stride: 4
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stride: 4
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- name: CCNP
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- name: CCNP
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description: Capture/Compare x (x=1-4) output Polarity
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description: Capture/Compare x (x=1-2) output Polarity
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bit_offset: 3
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bit_offset: 3
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 4
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len: 2
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stride: 4
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stride: 4
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fieldset/CCMR3:
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description: capture/compare mode register 3
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fields:
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- name: OCFE
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description: Output compare x (x=5,6) fast enable
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bit_offset: 2
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bit_size: 1
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array:
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len: 2
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stride: 8
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- name: OCPE
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description: Output compare x (x=5,6) preload enable
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bit_offset: 3
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bit_size: 1
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array:
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len: 2
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stride: 8
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- name: OCM
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description: Output compare x (x=5,6) mode
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bit_offset: 4
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bit_size: 3
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array:
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len: 2
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stride: 8
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enum: OCM
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- name: OCCE
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description: Output compare x (x=5,6) clear enable
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bit_offset: 7
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bit_size: 1
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array:
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len: 2
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stride: 8
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fieldset/CCMR_Input:
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fieldset/CCMR_Input:
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description: capture/compare mode register x (x=1-2) (input mode)
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description: capture/compare mode register x (x=1) (input mode)
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fields:
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fields:
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- name: CCS
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- name: CCS
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description: Capture/Compare y selection
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description: Capture/Compare y selection
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@ -369,7 +285,7 @@ fieldset/CCMR_Input:
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stride: 8
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stride: 8
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enum: FilterValue
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enum: FilterValue
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fieldset/CCMR_Output:
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fieldset/CCMR_Output:
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description: capture/compare mode register x (x=1-3) (output mode)
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description: capture/compare mode register x (x=1) (output mode)
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fields:
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fields:
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- name: CCS
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- name: CCS
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description: Capture/Compare y selection
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description: Capture/Compare y selection
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@ -409,38 +325,14 @@ fieldset/CCMR_Output:
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len: 2
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len: 2
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stride: 8
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stride: 8
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fieldset/CCR:
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fieldset/CCR:
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description: capture/compare register x (x=1-4,6) (Dither mode disabled)
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description: capture/compare register x (x=1,2) (Dither mode disabled)
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fields:
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fields:
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- name: CCR
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- name: CCR
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description: capture/compare x (x=1-4,6) value
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description: capture/compare x (x=1,2) value
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bit_offset: 0
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bit_offset: 0
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bit_size: 16
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bit_size: 16
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fieldset/CCR5:
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extends: CCR
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description: capture/compare register 5 (Dither mode disabled)
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fields:
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- name: GC5C
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description: Group channel 5 and channel x (x=1-3)
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bit_offset: 29
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bit_size: 1
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array:
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len: 3
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stride: 1
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enum: GC5C
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fieldset/CCR5_DITHER:
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extends: CCR_DITHER
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description: capture/compare register 5 (Dither mode enabled)
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fields:
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- name: GC5C
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description: Group channel 5 and channel x (x=1-3)
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bit_offset: 29
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bit_size: 1
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array:
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len: 3
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stride: 1
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enum: GC5C
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fieldset/CCR_DITHER:
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fieldset/CCR_DITHER:
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description: capture/compare register x (x=1-4,6) (Dither mode enabled)
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description: capture/compare register x (x=1,2) (Dither mode enabled)
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fields:
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fields:
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- name: DITHER
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- name: DITHER
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description: Dither value
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description: Dither value
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@ -481,16 +373,6 @@ fieldset/CR1:
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description: One-pulse mode enbaled
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description: One-pulse mode enbaled
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bit_offset: 3
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bit_offset: 3
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bit_size: 1
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bit_size: 1
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- name: DIR
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description: Direction
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bit_offset: 4
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bit_size: 1
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enum: DIR
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- name: CMS
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description: Center-aligned mode selection
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bit_offset: 5
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bit_size: 2
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enum: CMS
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- name: ARPE
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- name: ARPE
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description: Auto-reload preload enable
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description: Auto-reload preload enable
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bit_offset: 7
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bit_offset: 7
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@ -535,24 +417,19 @@ fieldset/CR2:
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bit_size: 1
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bit_size: 1
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enum: TI1S
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enum: TI1S
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- name: OIS
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- name: OIS
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description: Output Idle state x (x=1-6)
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description: Output Idle state x (x=1,2)
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bit_offset: 8
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bit_offset: 8
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 6
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len: 2
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stride: 2
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stride: 2
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- name: OISN
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- name: OISN
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description: Output Idle state x N x (x=1-4)
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description: Output Idle state x (x=1)
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bit_offset: 9
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bit_offset: 9
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 4
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len: 1
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stride: 2
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stride: 2
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- name: MMS2
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description: Master mode selection 2
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bit_offset: 20
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bit_size: 4
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enum: MMS2
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fieldset/DCR:
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fieldset/DCR:
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description: DMA control register
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description: DMA control register
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fields:
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fields:
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@ -577,11 +454,11 @@ fieldset/DIER:
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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- name: CCIE
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- name: CCIE
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description: Capture/Compare x (x=1-4) interrupt enable
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description: Capture/Compare x (x=1-2) interrupt enable
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bit_offset: 1
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bit_offset: 1
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 4
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len: 2
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stride: 1
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stride: 1
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- name: COMIE
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- name: COMIE
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description: COM interrupt enable
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description: COM interrupt enable
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@ -600,11 +477,11 @@ fieldset/DIER:
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bit_offset: 8
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bit_offset: 8
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bit_size: 1
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bit_size: 1
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- name: CCDE
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- name: CCDE
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description: Capture/Compare x (x=1-4) DMA request enable
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description: Capture/Compare x (x=1) DMA request enable
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bit_offset: 9
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bit_offset: 9
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bit_size: 1
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bit_size: 1
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array:
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array:
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len: 4
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len: 1
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stride: 1
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stride: 1
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- name: COMDE
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- name: COMDE
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description: COM DMA request enable
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description: COM DMA request enable
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@ -614,22 +491,6 @@ fieldset/DIER:
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description: Trigger DMA request enable
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description: Trigger DMA request enable
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bit_offset: 14
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bit_offset: 14
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bit_size: 1
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bit_size: 1
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- name: IDXIE
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description: Index interrupt enable
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bit_offset: 20
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bit_size: 1
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- name: DIRIE
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||||||
description: Direction change interrupt enable
|
|
||||||
bit_offset: 21
|
|
||||||
bit_size: 1
|
|
||||||
- name: IERRIE
|
|
||||||
description: Index error interrupt enable
|
|
||||||
bit_offset: 22
|
|
||||||
bit_size: 1
|
|
||||||
- name: TERRIE
|
|
||||||
description: Transition error interrupt enable
|
|
||||||
bit_offset: 23
|
|
||||||
bit_size: 1
|
|
||||||
fieldset/DMAR:
|
fieldset/DMAR:
|
||||||
description: DMA address for full transfer
|
description: DMA address for full transfer
|
||||||
fields:
|
fields:
|
||||||
@ -653,40 +514,6 @@ fieldset/DTR2:
|
|||||||
description: Deadtime preload enable
|
description: Deadtime preload enable
|
||||||
bit_offset: 17
|
bit_offset: 17
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/ECR:
|
|
||||||
description: encoder control register
|
|
||||||
fields:
|
|
||||||
- name: IE
|
|
||||||
description: Index enable
|
|
||||||
bit_offset: 0
|
|
||||||
bit_size: 1
|
|
||||||
- name: IDIR
|
|
||||||
description: Index direction
|
|
||||||
bit_offset: 1
|
|
||||||
bit_size: 2
|
|
||||||
enum: IDIR
|
|
||||||
- name: IBLK
|
|
||||||
description: Index blanking
|
|
||||||
bit_offset: 3
|
|
||||||
bit_size: 2
|
|
||||||
enum: IBLK
|
|
||||||
- name: FIDX
|
|
||||||
description: First index
|
|
||||||
bit_offset: 5
|
|
||||||
bit_size: 1
|
|
||||||
enum: FIDX
|
|
||||||
- name: IPOS
|
|
||||||
description: Index positioning
|
|
||||||
bit_offset: 6
|
|
||||||
bit_size: 2
|
|
||||||
- name: PW
|
|
||||||
description: Pulse width
|
|
||||||
bit_offset: 16
|
|
||||||
bit_size: 8
|
|
||||||
- name: PWPRSC
|
|
||||||
description: Pulse width prescaler
|
|
||||||
bit_offset: 24
|
|
||||||
bit_size: 2
|
|
||||||
fieldset/EGR:
|
fieldset/EGR:
|
||||||
description: event generation register
|
description: event generation register
|
||||||
fields:
|
fields:
|
||||||
@ -695,11 +522,11 @@ fieldset/EGR:
|
|||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
- name: CCG
|
- name: CCG
|
||||||
description: Capture/compare x (x=1-4) generation
|
description: Capture/compare x (x=1-2) generation
|
||||||
bit_offset: 1
|
bit_offset: 1
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
array:
|
array:
|
||||||
len: 4
|
len: 2
|
||||||
stride: 1
|
stride: 1
|
||||||
- name: COMG
|
- name: COMG
|
||||||
description: Capture/Compare control update generation
|
description: Capture/Compare control update generation
|
||||||
@ -710,11 +537,11 @@ fieldset/EGR:
|
|||||||
bit_offset: 6
|
bit_offset: 6
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
- name: BG
|
- name: BG
|
||||||
description: Break x (x=1-2) generation
|
description: Break x (x=1) generation
|
||||||
bit_offset: 7
|
bit_offset: 7
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 1
|
||||||
stride: 1
|
stride: 1
|
||||||
fieldset/PSC:
|
fieldset/PSC:
|
||||||
description: prescaler
|
description: prescaler
|
||||||
@ -729,7 +556,7 @@ fieldset/RCR:
|
|||||||
- name: REP
|
- name: REP
|
||||||
description: Repetition counter value
|
description: Repetition counter value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 8
|
||||||
fieldset/SMCR:
|
fieldset/SMCR:
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
fields:
|
fields:
|
||||||
@ -738,11 +565,6 @@ fieldset/SMCR:
|
|||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
enum: SMS
|
enum: SMS
|
||||||
- name: OCCS
|
|
||||||
description: OCREF clear selection
|
|
||||||
bit_offset: 3
|
|
||||||
bit_size: 1
|
|
||||||
enum: OCCS
|
|
||||||
- name: TS
|
- name: TS
|
||||||
description: Trigger selection
|
description: Trigger selection
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
@ -753,34 +575,10 @@ fieldset/SMCR:
|
|||||||
bit_offset: 7
|
bit_offset: 7
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
enum: MSM
|
enum: MSM
|
||||||
- name: ETF
|
|
||||||
description: External trigger filter
|
|
||||||
bit_offset: 8
|
|
||||||
bit_size: 4
|
|
||||||
enum: FilterValue
|
|
||||||
- name: ETPS
|
|
||||||
description: External trigger prescaler
|
|
||||||
bit_offset: 12
|
|
||||||
bit_size: 2
|
|
||||||
enum: ETPS
|
|
||||||
- name: ECE
|
|
||||||
description: External clock mode 2 enable
|
|
||||||
bit_offset: 14
|
|
||||||
bit_size: 1
|
|
||||||
- name: ETP
|
|
||||||
description: External trigger polarity
|
|
||||||
bit_offset: 15
|
|
||||||
bit_size: 1
|
|
||||||
enum: ETP
|
|
||||||
- name: SMSPE
|
- name: SMSPE
|
||||||
description: SMS preload enable
|
description: SMS preload enable
|
||||||
bit_offset: 24
|
bit_offset: 24
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
- name: SMSPS
|
|
||||||
description: SMS preload source
|
|
||||||
bit_offset: 25
|
|
||||||
bit_size: 1
|
|
||||||
enum: SMSPS
|
|
||||||
fieldset/SR:
|
fieldset/SR:
|
||||||
description: status register
|
description: status register
|
||||||
fields:
|
fields:
|
||||||
@ -789,11 +587,11 @@ fieldset/SR:
|
|||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
- name: CCIF
|
- name: CCIF
|
||||||
description: Capture/compare x (x=1-4) interrupt flag
|
description: Capture/compare x (x=1-2) interrupt flag
|
||||||
bit_offset: 1
|
bit_offset: 1
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
array:
|
array:
|
||||||
len: 4
|
len: 2
|
||||||
stride: 1
|
stride: 1
|
||||||
- name: COMIF
|
- name: COMIF
|
||||||
description: COM interrupt flag
|
description: COM interrupt flag
|
||||||
@ -804,52 +602,28 @@ fieldset/SR:
|
|||||||
bit_offset: 6
|
bit_offset: 6
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
- name: BIF
|
- name: BIF
|
||||||
description: Break x (x=1,2) interrupt flag
|
description: Break x (x=1) interrupt flag
|
||||||
bit_offset: 7
|
bit_offset: 7
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 1
|
||||||
|
- name: CCOF
|
||||||
|
description: Capture/Compare x (x=1-2) overcapture flag
|
||||||
|
bit_offset: 9
|
||||||
|
bit_size: 1
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 1
|
stride: 1
|
||||||
- name: CCOF
|
|
||||||
description: Capture/Compare x (x=1-4) overcapture flag
|
|
||||||
bit_offset: 9
|
|
||||||
bit_size: 1
|
|
||||||
array:
|
|
||||||
len: 4
|
|
||||||
stride: 1
|
|
||||||
- name: CCIF5
|
|
||||||
description: Capture/compare 5 interrupt flag
|
|
||||||
bit_offset: 16
|
|
||||||
bit_size: 1
|
|
||||||
- name: CCIF6
|
|
||||||
description: Capture/compare 6 interrupt flag
|
|
||||||
bit_offset: 17
|
|
||||||
bit_size: 1
|
|
||||||
- name: IDXIF
|
|
||||||
description: Index interrupt flag
|
|
||||||
bit_offset: 20
|
|
||||||
bit_size: 1
|
|
||||||
- name: DIRIF
|
|
||||||
description: Direction change interrupt flag
|
|
||||||
bit_offset: 21
|
|
||||||
bit_size: 1
|
|
||||||
- name: IERRIF
|
|
||||||
description: Index error interrupt flag
|
|
||||||
bit_offset: 22
|
|
||||||
bit_size: 1
|
|
||||||
- name: TERRIF
|
|
||||||
description: Transition error interrupt flag
|
|
||||||
bit_offset: 23
|
|
||||||
bit_size: 1
|
|
||||||
fieldset/TISEL:
|
fieldset/TISEL:
|
||||||
description: input selection register
|
description: input selection register
|
||||||
fields:
|
fields:
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
description: Selects TIM_TIx (x=1-4) input
|
description: Selects TIM_TIx (x=1-2) input
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
array:
|
array:
|
||||||
len: 4
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
enum/BKBID:
|
enum/BKBID:
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
@ -926,21 +700,6 @@ enum/CKD:
|
|||||||
- name: Div4
|
- name: Div4
|
||||||
description: t_DTS = 4 × t_CK_INT
|
description: t_DTS = 4 × t_CK_INT
|
||||||
value: 2
|
value: 2
|
||||||
enum/CMS:
|
|
||||||
bit_size: 2
|
|
||||||
variants:
|
|
||||||
- name: EdgeAligned
|
|
||||||
description: The counter counts up or down depending on the direction bit
|
|
||||||
value: 0
|
|
||||||
- name: CenterAligned1
|
|
||||||
description: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down.
|
|
||||||
value: 1
|
|
||||||
- name: CenterAligned2
|
|
||||||
description: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up.
|
|
||||||
value: 2
|
|
||||||
- name: CenterAligned3
|
|
||||||
description: The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down.
|
|
||||||
value: 3
|
|
||||||
enum/DBSS:
|
enum/DBSS:
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
variants:
|
variants:
|
||||||
@ -965,15 +724,6 @@ enum/DBSS:
|
|||||||
- name: Trigger
|
- name: Trigger
|
||||||
description: Trigger
|
description: Trigger
|
||||||
value: 7
|
value: 7
|
||||||
enum/DIR:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: Up
|
|
||||||
description: Counter used as upcounter
|
|
||||||
value: 0
|
|
||||||
- name: Down
|
|
||||||
description: Counter used as downcounter
|
|
||||||
value: 1
|
|
||||||
enum/DTAE:
|
enum/DTAE:
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
variants:
|
variants:
|
||||||
@ -983,39 +733,6 @@ enum/DTAE:
|
|||||||
- name: Distinct
|
- name: Distinct
|
||||||
description: Deadtime on rising edge is defined with DTG[7:0] register and deadtime on falling edge is defined with DTGF[7:0] bits.
|
description: Deadtime on rising edge is defined with DTG[7:0] register and deadtime on falling edge is defined with DTGF[7:0] bits.
|
||||||
value: 1
|
value: 1
|
||||||
enum/ETP:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: NotInverted
|
|
||||||
description: ETR is noninverted, active at high level or rising edge
|
|
||||||
value: 0
|
|
||||||
- name: Inverted
|
|
||||||
description: ETR is inverted, active at low level or falling edge
|
|
||||||
value: 1
|
|
||||||
enum/ETPS:
|
|
||||||
bit_size: 2
|
|
||||||
variants:
|
|
||||||
- name: Div1
|
|
||||||
description: Prescaler OFF
|
|
||||||
value: 0
|
|
||||||
- name: Div2
|
|
||||||
description: ETRP frequency divided by 2
|
|
||||||
value: 1
|
|
||||||
- name: Div4
|
|
||||||
description: ETRP frequency divided by 4
|
|
||||||
value: 2
|
|
||||||
- name: Div8
|
|
||||||
description: ETRP frequency divided by 8
|
|
||||||
value: 3
|
|
||||||
enum/FIDX:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: AlwaysActive
|
|
||||||
description: Index is always active
|
|
||||||
value: 0
|
|
||||||
- name: FirstOnly
|
|
||||||
description: the first Index only resets the counter
|
|
||||||
value: 1
|
|
||||||
enum/FilterValue:
|
enum/FilterValue:
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
variants:
|
variants:
|
||||||
@ -1067,39 +784,6 @@ enum/FilterValue:
|
|||||||
- name: FDTS_Div32_N8
|
- name: FDTS_Div32_N8
|
||||||
description: fSAMPLING=fDTS/32, N=8
|
description: fSAMPLING=fDTS/32, N=8
|
||||||
value: 15
|
value: 15
|
||||||
enum/GC5C:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: NoEffect
|
|
||||||
description: No effect of TIM_OC5REF on TIM_OCxREFC (x=1-3)
|
|
||||||
value: 0
|
|
||||||
- name: LogicalAND
|
|
||||||
description: TIM_OCxREFC is the logical AND of TIM_OCxREF and TIM_OC5REF
|
|
||||||
value: 1
|
|
||||||
enum/IBLK:
|
|
||||||
bit_size: 2
|
|
||||||
variants:
|
|
||||||
- name: AlwaysActive
|
|
||||||
description: Index always active
|
|
||||||
value: 0
|
|
||||||
- name: CC3P
|
|
||||||
description: Index disabled when tim_ti3 input is active, as per CC3P bitfield
|
|
||||||
value: 1
|
|
||||||
- name: CC4P
|
|
||||||
description: Index disabled when tim_ti4 input is active, as per CC4P bitfield
|
|
||||||
value: 2
|
|
||||||
enum/IDIR:
|
|
||||||
bit_size: 2
|
|
||||||
variants:
|
|
||||||
- name: Both
|
|
||||||
description: Index resets the counter whatever the direction
|
|
||||||
value: 0
|
|
||||||
- name: Up
|
|
||||||
description: Index resets the counter when up-counting only
|
|
||||||
value: 1
|
|
||||||
- name: Down
|
|
||||||
description: Index resets the counter when down-counting only
|
|
||||||
value: 2
|
|
||||||
enum/LOCK:
|
enum/LOCK:
|
||||||
bit_size: 2
|
bit_size: 2
|
||||||
variants:
|
variants:
|
||||||
@ -1142,57 +826,6 @@ enum/MMS:
|
|||||||
- name: CompareOC4
|
- name: CompareOC4
|
||||||
description: OC4REF signal is used as trigger output
|
description: OC4REF signal is used as trigger output
|
||||||
value: 7
|
value: 7
|
||||||
enum/MMS2:
|
|
||||||
bit_size: 4
|
|
||||||
variants:
|
|
||||||
- name: Reset
|
|
||||||
description: The UG bit from the TIMx_EGR register is used as TRGO2
|
|
||||||
value: 0
|
|
||||||
- name: Enable
|
|
||||||
description: The counter enable signal, CNT_EN, is used as TRGO2
|
|
||||||
value: 1
|
|
||||||
- name: Update
|
|
||||||
description: The update event is selected as TRGO2
|
|
||||||
value: 2
|
|
||||||
- name: ComparePulse
|
|
||||||
description: TRGO2 send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred
|
|
||||||
value: 3
|
|
||||||
- name: CompareOC1
|
|
||||||
description: OC1REF signal is used as TRGO2
|
|
||||||
value: 4
|
|
||||||
- name: CompareOC2
|
|
||||||
description: OC2REF signal is used as TRGO2
|
|
||||||
value: 5
|
|
||||||
- name: CompareOC3
|
|
||||||
description: OC3REF signal is used as TRGO2
|
|
||||||
value: 6
|
|
||||||
- name: CompareOC4
|
|
||||||
description: OC4REF signal is used as TRGO2
|
|
||||||
value: 7
|
|
||||||
- name: CompareOC5
|
|
||||||
description: OC5REF signal is used as TRGO2
|
|
||||||
value: 8
|
|
||||||
- name: CompareOC6
|
|
||||||
description: OC6REF signal is used as TRGO2
|
|
||||||
value: 9
|
|
||||||
- name: ComparePulse_OC4
|
|
||||||
description: OC4REF rising or falling edges generate pulses on TRGO2
|
|
||||||
value: 10
|
|
||||||
- name: ComparePulse_OC6
|
|
||||||
description: OC6REF rising or falling edges generate pulses on TRGO2
|
|
||||||
value: 11
|
|
||||||
- name: ComparePulse_OC4_Or_OC6_Rising
|
|
||||||
description: OC4REF or OC6REF rising edges generate pulses on TRGO2
|
|
||||||
value: 12
|
|
||||||
- name: ComparePulse_OC4_Rising_Or_OC6_Falling
|
|
||||||
description: OC4REF rising or OC6REF falling edges generate pulses on TRGO2
|
|
||||||
value: 13
|
|
||||||
- name: ComparePulse_OC5_Or_OC6_Rising
|
|
||||||
description: OC5REF or OC6REF rising edges generate pulses on TRGO2
|
|
||||||
value: 14
|
|
||||||
- name: ComparePulse_OC5_Rising_Or_OC6_Falling
|
|
||||||
description: OC5REF rising or OC6REF falling edges generate pulses on TRGO2
|
|
||||||
value: 15
|
|
||||||
enum/MSM:
|
enum/MSM:
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
variants:
|
variants:
|
||||||
@ -1202,15 +835,6 @@ enum/MSM:
|
|||||||
- name: Sync
|
- name: Sync
|
||||||
description: The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event.
|
description: The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event.
|
||||||
value: 1
|
value: 1
|
||||||
enum/OCCS:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: Input
|
|
||||||
description: tim_ocref_clr_int is connected to the tim_ocref_clr input
|
|
||||||
value: 0
|
|
||||||
- name: ETRF
|
|
||||||
description: tim_ocref_clr_int is connected to tim_etrf
|
|
||||||
value: 1
|
|
||||||
enum/OCM:
|
enum/OCM:
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
variants:
|
variants:
|
||||||
@ -1283,15 +907,6 @@ enum/SMS:
|
|||||||
- name: Ext_Clock_Mode
|
- name: Ext_Clock_Mode
|
||||||
description: External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter.
|
description: External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter.
|
||||||
value: 7
|
value: 7
|
||||||
enum/SMSPS:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: Update
|
|
||||||
description: The transfer is triggered by the Timer’s Update event
|
|
||||||
value: 0
|
|
||||||
- name: Index
|
|
||||||
description: The transfer is triggered by the Index event
|
|
||||||
value: 1
|
|
||||||
enum/TI1S:
|
enum/TI1S:
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
variants:
|
variants:
|
||||||
|
Loading…
x
Reference in New Issue
Block a user