From 8534ae884deffab97773a0271153cf25c4cbf030 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 19 Aug 2021 23:50:42 +0200 Subject: [PATCH] rcc: make GPIO EN/RST regs naming consistent. --- data/registers/rcc_f0.yaml | 24 ++++++++++++------------ data/registers/rcc_f0x0.yaml | 20 ++++++++++---------- data/registers/rcc_f1.yaml | 28 ++++++++++++++-------------- data/registers/rcc_f3.yaml | 20 ++++++++++---------- data/registers/rcc_g0.yaml | 20 ++++++++++---------- data/registers/rcc_l0.yaml | 24 ++++++++++++------------ data/registers/rcc_l1.yaml | 16 ++++++++-------- 7 files changed, 76 insertions(+), 76 deletions(-) diff --git a/data/registers/rcc_f0.yaml b/data/registers/rcc_f0.yaml index 8a6fe68..6a18816 100644 --- a/data/registers/rcc_f0.yaml +++ b/data/registers/rcc_f0.yaml @@ -81,27 +81,27 @@ fieldset/AHBENR: description: CRC clock enable bit_offset: 6 bit_size: 1 - - name: IOPAEN + - name: GPIOAEN description: I/O port A clock enable bit_offset: 17 bit_size: 1 - - name: IOPBEN + - name: GPIOBEN description: I/O port B clock enable bit_offset: 18 bit_size: 1 - - name: IOPCEN + - name: GPIOCEN description: I/O port C clock enable bit_offset: 19 bit_size: 1 - - name: IOPDEN + - name: GPIODEN description: I/O port D clock enable bit_offset: 20 bit_size: 1 - - name: IOPEEN + - name: GPIOEEN description: I/O port E clock enable bit_offset: 21 bit_size: 1 - - name: IOPFEN + - name: GPIOFEN description: I/O port F clock enable bit_offset: 22 bit_size: 1 @@ -112,27 +112,27 @@ fieldset/AHBENR: fieldset/AHBRSTR: description: AHB peripheral reset register fields: - - name: IOPARST + - name: GPIOARST description: I/O port A reset bit_offset: 17 bit_size: 1 - - name: IOPBRST + - name: GPIOBRST description: I/O port B reset bit_offset: 18 bit_size: 1 - - name: IOPCRST + - name: GPIOCRST description: I/O port C reset bit_offset: 19 bit_size: 1 - - name: IOPDRST + - name: GPIODRST description: I/O port D reset bit_offset: 20 bit_size: 1 - - name: IOPERST + - name: GPIOERST description: I/O port E reset bit_offset: 21 bit_size: 1 - - name: IOPFRST + - name: GPIOFRST description: I/O port F reset bit_offset: 22 bit_size: 1 diff --git a/data/registers/rcc_f0x0.yaml b/data/registers/rcc_f0x0.yaml index e68b7b4..20158a3 100644 --- a/data/registers/rcc_f0x0.yaml +++ b/data/registers/rcc_f0x0.yaml @@ -77,46 +77,46 @@ fieldset/AHBENR: description: CRC clock enable bit_offset: 6 bit_size: 1 - - name: IOPAEN + - name: GPIOAEN description: I/O port A clock enable bit_offset: 17 bit_size: 1 - - name: IOPBEN + - name: GPIOBEN description: I/O port B clock enable bit_offset: 18 bit_size: 1 - - name: IOPCEN + - name: GPIOCEN description: I/O port C clock enable bit_offset: 19 bit_size: 1 - - name: IOPDEN + - name: GPIODEN description: I/O port D clock enable bit_offset: 20 bit_size: 1 - - name: IOPFEN + - name: GPIOFEN description: I/O port F clock enable bit_offset: 22 bit_size: 1 fieldset/AHBRSTR: description: AHB peripheral reset register fields: - - name: IOPARST + - name: GPIOARST description: I/O port A reset bit_offset: 17 bit_size: 1 - - name: IOPBRST + - name: GPIOBRST description: I/O port B reset bit_offset: 18 bit_size: 1 - - name: IOPCRST + - name: GPIOCRST description: I/O port C reset bit_offset: 19 bit_size: 1 - - name: IOPDRST + - name: GPIODRST description: I/O port D reset bit_offset: 20 bit_size: 1 - - name: IOPFRST + - name: GPIOFRST description: I/O port F reset bit_offset: 22 bit_size: 1 diff --git a/data/registers/rcc_f1.yaml b/data/registers/rcc_f1.yaml index 3551c30..dd27e52 100644 --- a/data/registers/rcc_f1.yaml +++ b/data/registers/rcc_f1.yaml @@ -637,31 +637,31 @@ fieldset/APB2ENR: - bit_offset: 2 bit_size: 1 description: I/O port A clock enable - name: IOPAEN + name: GPIOAEN - bit_offset: 3 bit_size: 1 description: I/O port B clock enable - name: IOPBEN + name: GPIOBEN - bit_offset: 4 bit_size: 1 description: I/O port C clock enable - name: IOPCEN + name: GPIOCEN - bit_offset: 5 bit_size: 1 description: I/O port D clock enable - name: IOPDEN + name: GPIODEN - bit_offset: 6 bit_size: 1 description: I/O port E clock enable - name: IOPEEN + name: GPIOEEN - bit_offset: 7 bit_size: 1 description: I/O port F clock enable - name: IOPFEN + name: GPIOFEN - bit_offset: 8 bit_size: 1 description: I/O port G clock enable - name: IOPGEN + name: GPIOGEN - bit_offset: 9 bit_size: 1 description: ADC 1 interface clock enable @@ -724,31 +724,31 @@ fieldset/APB2RSTR: - bit_offset: 2 bit_size: 1 description: IO port A reset - name: IOPARST + name: GPIOARST - bit_offset: 3 bit_size: 1 description: IO port B reset - name: IOPBRST + name: GPIOBRST - bit_offset: 4 bit_size: 1 description: IO port C reset - name: IOPCRST + name: GPIOCRST - bit_offset: 5 bit_size: 1 description: IO port D reset - name: IOPDRST + name: GPIODRST - bit_offset: 6 bit_size: 1 description: IO port E reset - name: IOPERST + name: GPIOERST - bit_offset: 7 bit_size: 1 description: IO port F reset - name: IOPFRST + name: GPIOFRST - bit_offset: 8 bit_size: 1 description: IO port G reset - name: IOPGRST + name: GPIOGRST - bit_offset: 9 bit_size: 1 description: ADC 1 interface reset diff --git a/data/registers/rcc_f3.yaml b/data/registers/rcc_f3.yaml index 55db1f4..1bb0f7e 100644 --- a/data/registers/rcc_f3.yaml +++ b/data/registers/rcc_f3.yaml @@ -73,23 +73,23 @@ fieldset/AHBENR: description: CRC clock enable bit_offset: 6 bit_size: 1 - - name: IOPAEN + - name: GPIOAEN description: I/O port A clock enable bit_offset: 17 bit_size: 1 - - name: IOPBEN + - name: GPIOBEN description: I/O port B clock enable bit_offset: 18 bit_size: 1 - - name: IOPCEN + - name: GPIOCEN description: I/O port C clock enable bit_offset: 19 bit_size: 1 - - name: IOPDEN + - name: GPIODEN description: I/O port D clock enable bit_offset: 20 bit_size: 1 - - name: IOPFEN + - name: GPIOFEN description: I/O port F clock enable bit_offset: 22 bit_size: 1 @@ -108,23 +108,23 @@ fieldset/AHBENR: fieldset/AHBRSTR: description: AHB peripheral reset register fields: - - name: IOPARST + - name: GPIOARST description: I/O port A reset bit_offset: 17 bit_size: 1 - - name: IOPBRST + - name: GPIOBRST description: I/O port B reset bit_offset: 18 bit_size: 1 - - name: IOPCRST + - name: GPIOCRST description: I/O port C reset bit_offset: 19 bit_size: 1 - - name: IOPDRST + - name: GPIODRST description: I/O port D reset bit_offset: 20 bit_size: 1 - - name: IOPFRST + - name: GPIOFRST description: I/O port F reset bit_offset: 22 bit_size: 1 diff --git a/data/registers/rcc_g0.yaml b/data/registers/rcc_g0.yaml index b8dc8e0..f6a50fa 100644 --- a/data/registers/rcc_g0.yaml +++ b/data/registers/rcc_g0.yaml @@ -851,46 +851,46 @@ fieldset/IOPENR: - bit_offset: 0 bit_size: 1 description: I/O port A clock enable - name: IOPAEN + name: GPIOAEN - bit_offset: 1 bit_size: 1 description: I/O port B clock enable - name: IOPBEN + name: GPIOBEN - bit_offset: 2 bit_size: 1 description: I/O port C clock enable - name: IOPCEN + name: GPIOCEN - bit_offset: 3 bit_size: 1 description: I/O port D clock enable - name: IOPDEN + name: GPIODEN - bit_offset: 5 bit_size: 1 description: I/O port F clock enable - name: IOPFEN + name: GPIOFEN fieldset/IOPRSTR: description: GPIO reset register fields: - bit_offset: 0 bit_size: 1 description: I/O port A reset - name: IOPARST + name: GPIOARST - bit_offset: 1 bit_size: 1 description: I/O port B reset - name: IOPBRST + name: GPIOBRST - bit_offset: 2 bit_size: 1 description: I/O port C reset - name: IOPCRST + name: GPIOCRST - bit_offset: 3 bit_size: 1 description: I/O port D reset - name: IOPDRST + name: GPIODRST - bit_offset: 5 bit_size: 1 description: I/O port F reset - name: IOPFRST + name: GPIOFRST fieldset/IOPSMENR: description: GPIO in Sleep mode clock enable register fields: diff --git a/data/registers/rcc_l0.yaml b/data/registers/rcc_l0.yaml index a692aac..2ddf8cc 100644 --- a/data/registers/rcc_l0.yaml +++ b/data/registers/rcc_l0.yaml @@ -1486,54 +1486,54 @@ fieldset/IOPENR: - bit_offset: 0 bit_size: 1 description: IO port A clock enable bit - name: IOPAEN + name: GPIOAEN - bit_offset: 1 bit_size: 1 description: IO port B clock enable bit - name: IOPBEN + name: GPIOBEN - bit_offset: 2 bit_size: 1 description: IO port A clock enable bit - name: IOPCEN + name: GPIOCEN - bit_offset: 3 bit_size: 1 description: I/O port D clock enable bit - name: IOPDEN + name: GPIODEN - bit_offset: 4 bit_size: 1 description: IO port E clock enable bit - name: IOPEEN + name: GPIOEEN - bit_offset: 7 bit_size: 1 description: I/O port H clock enable bit - name: IOPHEN + name: GPIOHEN fieldset/IOPRSTR: description: GPIO reset register fields: - bit_offset: 0 bit_size: 1 description: I/O port A reset - name: IOPARST + name: GPIOARST - bit_offset: 1 bit_size: 1 description: I/O port B reset - name: IOPBRST + name: GPIOBRST - bit_offset: 2 bit_size: 1 description: I/O port A reset - name: IOPCRST + name: GPIOCRST - bit_offset: 3 bit_size: 1 description: I/O port D reset - name: IOPDRST + name: GPIODRST - bit_offset: 4 bit_size: 1 description: I/O port E reset - name: IOPERST + name: GPIOERST - bit_offset: 7 bit_size: 1 description: I/O port H reset - name: IOPHRST + name: GPIOHRST fieldset/IOPSMEN: description: GPIO clock enable in sleep mode register fields: diff --git a/data/registers/rcc_l1.yaml b/data/registers/rcc_l1.yaml index 31fe080..a86009f 100644 --- a/data/registers/rcc_l1.yaml +++ b/data/registers/rcc_l1.yaml @@ -61,35 +61,35 @@ block/RCC: fieldset/AHBENR: description: AHB peripheral clock enable register fields: - - name: GPIOPAEN + - name: GPIOAEN description: IO port A clock enable bit_offset: 0 bit_size: 1 - - name: GPIOPBEN + - name: GPIOBEN description: IO port B clock enable bit_offset: 1 bit_size: 1 - - name: GPIOPCEN + - name: GPIOCEN description: IO port C clock enable bit_offset: 2 bit_size: 1 - - name: GPIOPDEN + - name: GPIODEN description: IO port D clock enable bit_offset: 3 bit_size: 1 - - name: GPIOPEEN + - name: GPIOEEN description: IO port E clock enable bit_offset: 4 bit_size: 1 - - name: GPIOPHEN + - name: GPIOHEN description: IO port H clock enable bit_offset: 5 bit_size: 1 - - name: GPIOPFEN + - name: GPIOFEN description: IO port F clock enable bit_offset: 6 bit_size: 1 - - name: GPIOPGEN + - name: GPIOGEN description: IO port G clock enable bit_offset: 7 bit_size: 1