DAC v1-4: Remove TSEL enum from TSEL fields, arrayify TSEL fields
This commit is contained in:
parent
7ce7dc901f
commit
82101c985c
@ -79,11 +79,13 @@ fieldset/CR:
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: TSEL1
|
||||
- name: TSEL
|
||||
description: DAC channel 1 trigger selection
|
||||
bit_offset: 3
|
||||
bit_size: 3
|
||||
enum: TSEL1
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: WAVE
|
||||
description: DAC channel noise/triangle wave generation enable
|
||||
bit_offset: 6
|
||||
@ -113,11 +115,6 @@ fieldset/CR:
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: TSEL2
|
||||
description: DAC channel 2 trigger selection
|
||||
bit_offset: 19
|
||||
bit_size: 3
|
||||
enum: TSEL2
|
||||
fieldset/DHR12L:
|
||||
description: channel 12-bit left-aligned data holding register
|
||||
fields:
|
||||
@ -196,57 +193,6 @@ fieldset/SWTRIGR:
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
enum/TSEL1:
|
||||
bit_size: 3
|
||||
variants:
|
||||
- name: TIM6_TRGO
|
||||
description: Timer 6 TRGO event
|
||||
value: 0
|
||||
- name: TIM3_TRGO
|
||||
description: Timer 3 TRGO event
|
||||
value: 1
|
||||
- name: TIM7_TRGO
|
||||
description: Timer 7 TRGO event
|
||||
value: 2
|
||||
- name: TIM15_TRGO
|
||||
description: Timer 15 TRGO event
|
||||
value: 3
|
||||
- name: TIM2_TRGO
|
||||
description: Timer 2 TRGO event
|
||||
value: 4
|
||||
- name: EXTI9
|
||||
description: EXTI line9
|
||||
value: 6
|
||||
- name: SOFTWARE
|
||||
description: Software trigger
|
||||
value: 7
|
||||
enum/TSEL2:
|
||||
bit_size: 3
|
||||
variants:
|
||||
- name: TIM6_TRGO
|
||||
description: Timer 6 TRGO event
|
||||
value: 0
|
||||
- name: TIM8_TRGO
|
||||
description: Timer 8 TRGO event
|
||||
value: 1
|
||||
- name: TIM7_TRGO
|
||||
description: Timer 7 TRGO event
|
||||
value: 2
|
||||
- name: TIM5_TRGO
|
||||
description: Timer 5 TRGO event
|
||||
value: 3
|
||||
- name: TIM2_TRGO
|
||||
description: Timer 2 TRGO event
|
||||
value: 4
|
||||
- name: TIM4_TRGO
|
||||
description: Timer 4 TRGO event
|
||||
value: 5
|
||||
- name: EXTI9
|
||||
description: EXTI line9
|
||||
value: 6
|
||||
- name: SOFTWARE
|
||||
description: Software trigger
|
||||
value: 7
|
||||
enum/WAVE:
|
||||
bit_size: 2
|
||||
variants:
|
||||
|
@ -106,11 +106,13 @@ fieldset/CR:
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: TSEL1
|
||||
- name: TSEL
|
||||
description: DAC channel 1 trigger selection
|
||||
bit_offset: 3
|
||||
bit_size: 3
|
||||
enum: TSEL1
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: WAVE
|
||||
description: DAC channel noise/triangle wave generation enable
|
||||
bit_offset: 6
|
||||
@ -147,11 +149,6 @@ fieldset/CR:
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: TSEL2
|
||||
description: DAC channel 2 trigger selection
|
||||
bit_offset: 19
|
||||
bit_size: 3
|
||||
enum: TSEL2
|
||||
fieldset/DHR12L:
|
||||
description: channel 12-bit left-aligned data holding register
|
||||
fields:
|
||||
@ -217,6 +214,7 @@ fieldset/MCR:
|
||||
description: DAC channel mode
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
enum: MODE
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
@ -281,56 +279,32 @@ fieldset/SWTRIGR:
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
enum/TSEL1:
|
||||
enum/MODE:
|
||||
bit_size: 3
|
||||
variants:
|
||||
- name: TIM6_TRGO
|
||||
description: Timer 6 TRGO event
|
||||
- name: NORMAL_EXT_BUFEN
|
||||
description: Normal mode, external pin only, buffer enabled
|
||||
value: 0
|
||||
- name: TIM3_TRGO
|
||||
description: Timer 3 TRGO event
|
||||
- name: NORMAL_EXT_INT_BUFEN
|
||||
description: Normal mode, external pin and internal peripherals, buffer enabled
|
||||
value: 1
|
||||
- name: TIM7_TRGO
|
||||
description: Timer 7 TRGO event
|
||||
- name: NORMAL_EXT_BUFDIS
|
||||
description: Normal mode, external pin only, buffer disabled
|
||||
value: 2
|
||||
- name: TIM15_TRGO
|
||||
description: Timer 15 TRGO event
|
||||
- name: NORMAL_INT_BUFDIS
|
||||
description: Normal mode, internal peripherals only, buffer disabled
|
||||
value: 3
|
||||
- name: TIM2_TRGO
|
||||
description: Timer 2 TRGO event
|
||||
- name: SAMPHOLD_EXT_BUFEN
|
||||
description: Sample and hold mode, external pin only, buffer enabled
|
||||
value: 4
|
||||
- name: EXTI9
|
||||
description: EXTI line9
|
||||
value: 6
|
||||
- name: SOFTWARE
|
||||
description: Software trigger
|
||||
value: 7
|
||||
enum/TSEL2:
|
||||
bit_size: 3
|
||||
variants:
|
||||
- name: TIM6_TRGO
|
||||
description: Timer 6 TRGO event
|
||||
value: 0
|
||||
- name: TIM8_TRGO
|
||||
description: Timer 8 TRGO event
|
||||
value: 1
|
||||
- name: TIM7_TRGO
|
||||
description: Timer 7 TRGO event
|
||||
value: 2
|
||||
- name: TIM5_TRGO
|
||||
description: Timer 5 TRGO event
|
||||
value: 3
|
||||
- name: TIM2_TRGO
|
||||
description: Timer 2 TRGO event
|
||||
value: 4
|
||||
- name: TIM4_TRGO
|
||||
description: Timer 4 TRGO event
|
||||
- name: SAMPHOLD_EXT_INT_BUFEN
|
||||
description: Sample and hold mode, external pin and internal peripherals, buffer enabled
|
||||
value: 5
|
||||
- name: EXTI9
|
||||
description: EXTI line9
|
||||
- name: SAMPHOLD_EXT_INT_BUFDIS
|
||||
description: Sample and hold mode, external pin and internal peripherals, buffer disabled
|
||||
value: 6
|
||||
- name: SOFTWARE
|
||||
description: Software trigger
|
||||
- name: SAMPHOLD_INT_BUFDIS
|
||||
description: Sample and hold mode, internal peripherals only, buffer disabled
|
||||
value: 7
|
||||
enum/WAVE:
|
||||
bit_size: 2
|
||||
|
@ -106,11 +106,13 @@ fieldset/CR:
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: TSEL1
|
||||
- name: TSEL
|
||||
description: DAC channel 1 trigger selection
|
||||
bit_offset: 2
|
||||
bit_size: 4
|
||||
enum: TSEL1
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: WAVE
|
||||
description: DAC channel noise/triangle wave generation enable
|
||||
bit_offset: 6
|
||||
@ -147,11 +149,6 @@ fieldset/CR:
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: TSEL2
|
||||
description: DAC channel 2 trigger selection
|
||||
bit_offset: 18
|
||||
bit_size: 4
|
||||
enum: TSEL2
|
||||
fieldset/DHR12L:
|
||||
description: channel 12-bit left-aligned data holding register
|
||||
fields:
|
||||
@ -217,6 +214,7 @@ fieldset/MCR:
|
||||
description: DAC channel mode
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
enum: MODE
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
@ -281,102 +279,33 @@ fieldset/SWTRIGR:
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
enum/TSEL1:
|
||||
bit_size: 4
|
||||
enum/MODE:
|
||||
bit_size: 3
|
||||
variants:
|
||||
- name: SOFTWARE
|
||||
description: Software trigger
|
||||
- name: NORMAL_EXT_BUFEN
|
||||
description: Normal mode, external pin only, buffer enabled
|
||||
value: 0
|
||||
- name: TIM1_TRGO
|
||||
description: Timer 1 TRGO event
|
||||
- name: NORMAL_EXT_INT_BUFEN
|
||||
description: Normal mode, external pin and internal peripherals, buffer enabled
|
||||
value: 1
|
||||
- name: TIM2_TRGO
|
||||
description: Timer 2 TRGO event
|
||||
- name: NORMAL_EXT_BUFDIS
|
||||
description: Normal mode, external pin only, buffer disabled
|
||||
value: 2
|
||||
- name: TIM4_TRGO
|
||||
description: Timer 4 TRGO event
|
||||
- name: NORMAL_INT_BUFDIS
|
||||
description: Normal mode, internal peripherals only, buffer disabled
|
||||
value: 3
|
||||
- name: TIM5_TRGO
|
||||
description: Timer 5 TRGO event
|
||||
- name: SAMPHOLD_EXT_BUFEN
|
||||
description: Sample and hold mode, external pin only, buffer enabled
|
||||
value: 4
|
||||
- name: TIM6_TRGO
|
||||
description: Timer 6 TRGO event
|
||||
- name: SAMPHOLD_EXT_INT_BUFEN
|
||||
description: Sample and hold mode, external pin and internal peripherals, buffer enabled
|
||||
value: 5
|
||||
- name: TIM7_TRGO
|
||||
description: Timer 7 TRGO event
|
||||
- name: SAMPHOLD_EXT_INT_BUFDIS
|
||||
description: Sample and hold mode, external pin and internal peripherals, buffer disabled
|
||||
value: 6
|
||||
- name: TIM8_TRGO
|
||||
description: Timer 8 TRGO event
|
||||
- name: SAMPHOLD_INT_BUFDIS
|
||||
description: Sample and hold mode, internal peripherals only, buffer disabled
|
||||
value: 7
|
||||
- name: TIM15_TRGO
|
||||
description: Timer 15 TRGO event
|
||||
value: 8
|
||||
- name: HRTIM1_DACTRG1
|
||||
description: High resolution timer 1 DACTRG1 event
|
||||
value: 9
|
||||
- name: HRTIM1_DACTRG2
|
||||
description: High resolution timer 1 DACTRG2 event
|
||||
value: 10
|
||||
- name: LPTIM1_OUT
|
||||
description: Low-power timer 1 OUT event
|
||||
value: 11
|
||||
- name: LPTIM2_OUT
|
||||
description: Low-power timer 2 OUT event
|
||||
value: 12
|
||||
- name: EXTI9
|
||||
description: EXTI line9
|
||||
value: 13
|
||||
- name: LPTIM3_OUT
|
||||
description: Low-power timer 3 OUT event
|
||||
value: 14
|
||||
enum/TSEL2:
|
||||
bit_size: 4
|
||||
variants:
|
||||
- name: SOFTWARE
|
||||
description: Software trigger
|
||||
value: 0
|
||||
- name: TIM1_TRGO
|
||||
description: Timer 1 TRGO event
|
||||
value: 1
|
||||
- name: TIM2_TRGO
|
||||
description: Timer 2 TRGO event
|
||||
value: 2
|
||||
- name: TIM4_TRGO
|
||||
description: Timer 4 TRGO event
|
||||
value: 3
|
||||
- name: TIM5_TRGO
|
||||
description: Timer 5 TRGO event
|
||||
value: 4
|
||||
- name: TIM6_TRGO
|
||||
description: Timer 6 TRGO event
|
||||
value: 5
|
||||
- name: TIM7_TRGO
|
||||
description: Timer 7 TRGO event
|
||||
value: 6
|
||||
- name: TIM8_TRGO
|
||||
description: Timer 8 TRGO event
|
||||
value: 7
|
||||
- name: TIM15_TRGO
|
||||
description: Timer 15 TRGO event
|
||||
value: 8
|
||||
- name: HRTIM1_DACTRG1
|
||||
description: High resolution timer 1 DACTRG1 event
|
||||
value: 9
|
||||
- name: HRTIM1_DACTRG2
|
||||
description: High resolution timer 1 DACTRG2 event
|
||||
value: 10
|
||||
- name: LPTIM1_OUT
|
||||
description: Low-power timer 1 OUT event
|
||||
value: 11
|
||||
- name: LPTIM2_OUT
|
||||
description: Low-power timer 2 OUT event
|
||||
value: 12
|
||||
- name: EXTI9
|
||||
description: EXTI line9
|
||||
value: 13
|
||||
- name: LPTIM3_OUT
|
||||
description: Low-power timer 3 OUT event
|
||||
value: 14
|
||||
enum/WAVE:
|
||||
bit_size: 2
|
||||
variants:
|
||||
|
@ -121,7 +121,6 @@ fieldset/CR:
|
||||
description: DAC channel 1 trigger selection
|
||||
bit_offset: 2
|
||||
bit_size: 4
|
||||
enum: TSEL
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
@ -364,10 +363,10 @@ fieldset/STR:
|
||||
bit_offset: 16
|
||||
bit_size: 16
|
||||
fieldset/SWTRIGR:
|
||||
description: DAC software trigger register.
|
||||
description: software trigger register
|
||||
fields:
|
||||
- name: SWTRIG
|
||||
description: 'DAC channel software trigger This bit is set by software to trigger the DAC in software trigger mode. Note: This bit is cleared by hardware (one APB1 clock cycle later) once the DHR1 register value has been loaded into the DOR1 register.'
|
||||
description: DAC channel software trigger
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
@ -407,57 +406,6 @@ enum/MODE:
|
||||
- name: SAMPHOLD_INT_BUFDIS
|
||||
description: Sample and hold mode, internal peripherals only, buffer disabled
|
||||
value: 7
|
||||
enum/TSEL:
|
||||
bit_size: 4
|
||||
variants:
|
||||
- name: SOFTWARE
|
||||
description: Software trigger
|
||||
value: 0
|
||||
- name: TIM8_TIM1_TRGO
|
||||
description: TIM8 (DAC1/2/4) or TIM1 (DAC3) trigger output
|
||||
value: 1
|
||||
- name: TIM7_TRGO
|
||||
description: TIM7 trigger output
|
||||
value: 2
|
||||
- name: TIM15_TRGO
|
||||
description: TIM15 trigger output
|
||||
value: 3
|
||||
- name: TIM2_TRGO
|
||||
description: TIM2 trigger otuput
|
||||
value: 4
|
||||
- name: TIM4_TRGO
|
||||
description: TIM4 trigger output
|
||||
value: 5
|
||||
- name: EXTI9
|
||||
description: external pin
|
||||
value: 6
|
||||
- name: TIM6_TRGO
|
||||
description: TIM6 trigger output
|
||||
value: 7
|
||||
- name: TIM3_TRGO
|
||||
description: TIM3 trigger output
|
||||
value: 8
|
||||
- name: HRTIM_DAC_RESET_TRG1
|
||||
description: HRTIM dual channel DAC trigger 1
|
||||
value: 9
|
||||
- name: HRTIM_DAC_RESET_TRG2
|
||||
description: HRTIM dual channel DAC trigger 2
|
||||
value: 10
|
||||
- name: HRTIM_DAC_RESET_TRG3
|
||||
description: HRTIM dual channel DAC trigger 3
|
||||
value: 11
|
||||
- name: HRTIM_DAC_RESET_TRG4
|
||||
description: HRTIM dual channel DAC trigger 4
|
||||
value: 12
|
||||
- name: HRTIM_DAC_RESET_TRG5
|
||||
description: HRTIM dual channel DAC trigger 5
|
||||
value: 13
|
||||
- name: HRTIM_DAC_RESET_TRG6
|
||||
description: HRTIM dual channel DAC trigger 6
|
||||
value: 14
|
||||
- name: HRTIM_DAC_TRG1_2_3
|
||||
description: HRTIM DAC trigger 1 (DAC1/DAC4), 2 (DAC2), 3 (DAC3)
|
||||
value: 15
|
||||
enum/WAVE:
|
||||
bit_size: 2
|
||||
variants:
|
||||
|
Loading…
x
Reference in New Issue
Block a user