diff --git a/stm32-data-gen/src/rcc.rs b/stm32-data-gen/src/rcc.rs index a6052f9..34da8c0 100644 --- a/stm32-data-gen/src/rcc.rs +++ b/stm32-data-gen/src/rcc.rs @@ -79,7 +79,7 @@ impl PeripheralToClock { const PERI_OVERRIDE: &[(&str, &[&str])] = &[("DCMI", &["DCMI_PSSI"]), ("PSSI", &["DCMI_PSSI"])]; let clocks = self.0.get(rcc_block)?; - if peri_name.starts_with("ADC") { + if peri_name.starts_with("ADC") && !peri_name.contains("COMMON") { return self.match_adc_peri_clock(clocks, peri_name); } if let Some(res) = clocks.get(peri_name) { @@ -123,6 +123,11 @@ impl PeripheralToClock { } } + // Look for bare ADC clock register + if clocks.contains_key("ADC") { + return clocks.get("ADC"); + } + None } }