From 79e839f9b5b048cf9e1adcd5de163a50502c0144 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 2 Feb 2024 22:44:37 +0100 Subject: [PATCH] h5: fix some bad rcc muxes. --- data/registers/rcc_h5.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/data/registers/rcc_h5.yaml b/data/registers/rcc_h5.yaml index 1bea357..3cb0c93 100644 --- a/data/registers/rcc_h5.yaml +++ b/data/registers/rcc_h5.yaml @@ -2420,8 +2420,8 @@ enum/NSPRIV: enum/OCTOSPISEL: bit_size: 2 variants: - - name: HCLK4 - description: rcc_hclk4 selected as kernel clock (default after reset) + - name: HCLK1 + description: rcc_hclk selected as kernel clock (default after reset) value: 0 - name: PLL1_Q description: pll1_q_ck selected as kernel clock @@ -4052,8 +4052,8 @@ enum/SPI5SEL: enum/SPI6SEL: bit_size: 3 variants: - - name: PCLK4 - description: rcc_pclk4 selected as peripheral clock + - name: PCLK2 + description: rcc_pclk2 selected as peripheral clock value: 0 - name: PLL2_Q description: pll2_q selected as peripheral clock