Merge pull request #331 from eZioPan/rtc-cleanup2

Rtc cleanup2
This commit is contained in:
Dario Nieuwenhuis 2024-01-02 14:11:27 +00:00 committed by GitHub
commit 760125dee1
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2 changed files with 809 additions and 810 deletions

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@ -1,4 +1,3 @@
---
block/RTC: block/RTC:
description: Real-time clock description: Real-time clock
items: items:
@ -36,7 +35,6 @@ block/RTC:
byte_offset: 28 byte_offset: 28
fieldset: PRIVCR fieldset: PRIVCR
- name: SMCR - name: SMCR
description:
byte_offset: 32 byte_offset: 32
fieldset: SMCR fieldset: SMCR
- name: WPR - name: WPR
@ -452,36 +450,6 @@ fieldset/PRIVCR:
description: PRIV description: PRIV
bit_offset: 15 bit_offset: 15
bit_size: 1 bit_size: 1
fieldset/SMCR:
description: RTC secure mode control register
fields:
- name: ALRDPROT
description: Alarm x protection
bit_offset: 0
bit_size: 1
array:
len: 2
stride: 1
- name: WUTDPROT
description: Wakeup timer protection
bit_offset: 2
bit_size: 1
- name: TSDPROT
description: Timestamp protection
bit_offset: 3
bit_size: 1
- name: CALDPROT
description: Shift register, daylight saving, calibration and reference clock protection
bit_offset: 13
bit_size: 1
- name: INITDPROT
description: Initialization protection
bit_offset: 14
bit_size: 1
- name: DECPROT
description: RTC global protection
bit_offset: 15
bit_size: 1
fieldset/SCR: fieldset/SCR:
description: Status clear register description: Status clear register
fields: fields:
@ -524,6 +492,36 @@ fieldset/SHIFTR:
description: Add one second description: Add one second
bit_offset: 31 bit_offset: 31
bit_size: 1 bit_size: 1
fieldset/SMCR:
description: RTC secure mode control register
fields:
- name: ALRDPROT
description: Alarm x protection
bit_offset: 0
bit_size: 1
array:
len: 2
stride: 1
- name: WUTDPROT
description: Wakeup timer protection
bit_offset: 2
bit_size: 1
- name: TSDPROT
description: Timestamp protection
bit_offset: 3
bit_size: 1
- name: CALDPROT
description: Shift register, daylight saving, calibration and reference clock protection
bit_offset: 13
bit_size: 1
- name: INITDPROT
description: Initialization protection
bit_offset: 14
bit_size: 1
- name: DECPROT
description: RTC global protection
bit_offset: 15
bit_size: 1
fieldset/SMISR: fieldset/SMISR:
description: Secure masked interrupt status register description: Secure masked interrupt status register
fields: fields:
@ -715,10 +713,10 @@ enum/ALRMF:
enum/ALRMR_MSK: enum/ALRMR_MSK:
bit_size: 1 bit_size: 1
variants: variants:
- name: Mask - name: ToMatch
description: Alarm set if the date/day match description: Alarm set if the date/day match
value: 0 value: 0
- name: NotMask - name: NotMatch
description: Date/day dont care in Alarm comparison description: Date/day dont care in Alarm comparison
value: 1 value: 1
enum/ALRMR_PM: enum/ALRMR_PM:
@ -734,10 +732,10 @@ enum/ALRMR_WDSEL:
bit_size: 1 bit_size: 1
variants: variants:
- name: DateUnits - name: DateUnits
description: "DU[3:0] represents the date units" description: DU[3:0] represents the date units
value: 0 value: 0
- name: WeekDay - name: WeekDay
description: "DU[3:0] represents the week day. DT[1:0] is dont care." description: DU[3:0] represents the week day. DT[1:0] is dont care.
value: 1 value: 1
enum/AMPM: enum/AMPM:
bit_size: 1 bit_size: 1
@ -767,13 +765,13 @@ enum/CALW16:
bit_size: 1 bit_size: 1
variants: variants:
- name: SixteenSeconds - name: SixteenSeconds
description: "When CALW16 is set to 1, the 16-second calibration cycle period is selected.This bit must not be set to 1 if CALW8=1" description: When CALW16 is set to 1, the 16-second calibration cycle period is selected.This bit must not be set to 1 if CALW8=1
value: 1 value: 1
enum/CALW8: enum/CALW8:
bit_size: 1 bit_size: 1
variants: variants:
- name: EightSeconds - name: EightSeconds
description: "When CALW8 is set to 1, the 8-second calibration cycle period is selected" description: When CALW8 is set to 1, the 8-second calibration cycle period is selected
value: 1 value: 1
enum/COSEL: enum/COSEL:
bit_size: 1 bit_size: 1
@ -821,10 +819,10 @@ enum/LPCAL:
bit_size: 1 bit_size: 1
variants: variants:
- name: RTCCLK - name: RTCCLK
description: "Calibration window is 220 RTCCLK, which is a high-consumption mode. This mode should be set only when less than 32s calibration window is required" description: Calibration window is 220 RTCCLK, which is a high-consumption mode. This mode should be set only when less than 32s calibration window is required
value: 0 value: 0
- name: CkApre - name: CkApre
description: "Calibration window is 220 ck_apre, which is the required configuration for ultra-low consumption mode" description: Calibration window is 220 ck_apre, which is the required configuration for ultra-low consumption mode
value: 1 value: 1
enum/OSEL: enum/OSEL:
bit_size: 2 bit_size: 2
@ -845,25 +843,16 @@ enum/POL:
bit_size: 1 bit_size: 1
variants: variants:
- name: High - name: High
description: "The pin is high when ALRAF/ALRBF/WUTF is asserted (depending on OSEL[1:0])" description: The pin is high when ALRAF/ALRBF/WUTF is asserted (depending on OSEL[1:0])
value: 0 value: 0
- name: Low - name: Low
description: "The pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL[1:0])" description: The pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL[1:0])
value: 1 value: 1
enum/RECALPF: enum/RECALPF:
bit_size: 1 bit_size: 1
variants: variants:
- name: Pending - name: Pending
description: "The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0" description: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1 value: 1
enum/SSRUF: enum/SSRUF:
bit_size: 1 bit_size: 1
@ -877,15 +866,6 @@ enum/SSRUMF:
- name: Underflow - name: Underflow
description: This flag is set by hardware when the SSR rolls under 0. SSRUF is not set when SSCLR=1 description: This flag is set by hardware when the SSR rolls under 0. SSRUF is not set when SSCLR=1
value: 1 value: 1
enum/TAMPALRM_PU:
bit_size: 1
variants:
- name: NoPullUp
description: No pull-up is applied on TAMPALRM output
value: 0
- name: PullUp
description: A pull-up is applied on TAMPALRM output
value: 1
enum/TAMPALRM_TYPE: enum/TAMPALRM_TYPE:
bit_size: 1 bit_size: 1
variants: variants:

19
transforms/RTC.yaml Normal file
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@ -0,0 +1,19 @@
transforms:
- !DeleteEnums
from: ^(CNF|REFCKON|ALRWF|INIT|TAMPALRM_PU)$
- !RenameEnumVariants
enum: ^RTOFF$
from: Enabled
to: Ongoing
- !RenameEnumVariants
enum: ^RTOFF$
from: Disabled
to: Terminated
- !RenameEnumVariants
enum: ^ALRMR_MSK$
from: Mask
to: ToMatch
- !RenameEnumVariants
enum: ^ALRMR_MSK$
from: NotMask
to: NotMatch