merge all TIMs into timer_v2
This commit is contained in:
eZio Pan
parent
1b83acf50b
commit
7518e37532
File diff suppressed because it is too large
Load Diff
@ -1,3 +1,250 @@
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block/TIM_1CH:
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description: 1-channel timers
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items:
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- name: CR1
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description: control register 1
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byte_offset: 0
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fieldset: CR1_1CH
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- name: DIER
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description: DMA/Interrupt enable register
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byte_offset: 12
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fieldset: DIER_1CH
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- name: SR
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description: status register
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byte_offset: 16
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fieldset: SR_1CH
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- name: EGR
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description: event generation register
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byte_offset: 20
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access: Write
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fieldset: EGR_1CH
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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array:
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len: 1
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stride: 4
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byte_offset: 24
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fieldset: CCMR_Input_1CH
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- name: CCMR_Output
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description: capture/compare mode register 1 (output mode)
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array:
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len: 1
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stride: 4
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byte_offset: 24
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fieldset: CCMR_Output_1CH
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- name: CCER
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description: capture/compare enable register
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byte_offset: 32
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fieldset: CCER_1CH
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- name: CNT
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description: counter
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byte_offset: 36
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fieldset: CNT_BASIC
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- name: PSC
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description: prescaler
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byte_offset: 40
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fieldset: PSC_BASIC
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- name: ARR
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description: auto-reload register (Dither mode disabled)
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byte_offset: 44
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fieldset: ARR_BASIC
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- name: ARR_DITHER
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description: auto-reload register (Dither mode enabled)
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byte_offset: 44
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fieldset: ARR_DITHER_BASIC
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- name: CCR
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description: capture/compare register x (x=1) (Dither mode disabled)
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array:
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len: 1
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stride: 4
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byte_offset: 52
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fieldset: CCR_1CH
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- name: CCR_DITHER
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description: capture/compare register x (x=1) (Dither mode enabled)
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array:
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len: 1
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stride: 4
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byte_offset: 52
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fieldset: CCR_DITHER_1CH
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- name: TISEL
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description: input selection register
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byte_offset: 92
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fieldset: TISEL_1CH
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block/TIM_1CH_CMP:
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extends: TIM_1CH
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description: 1-channel with one complementary output timers
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items:
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- name: CR2
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description: control register 2
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byte_offset: 4
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fieldset: CR2_1CH_CMP
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- name: DIER
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description: DMA/Interrupt enable register
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byte_offset: 12
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fieldset: DIER_1CH_CMP
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- name: SR
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description: status register
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byte_offset: 16
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fieldset: SR_1CH_CMP
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- name: EGR
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description: event generation register
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byte_offset: 20
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access: Write
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fieldset: EGR_1CH_CMP
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- name: CCER
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description: capture/compare enable register
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byte_offset: 32
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fieldset: CCER_1CH_CMP
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- name: RCR
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description: repetition counter register
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byte_offset: 48
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fieldset: RCR_1CH_CMP
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- name: BDTR
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description: break and dead-time register
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byte_offset: 68
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fieldset: BDTR_1CH_CMP
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- name: DTR2
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description: break and dead-time register
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byte_offset: 84
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fieldset: DTR2_ADV
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- name: AF1
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description: alternate function register 1
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byte_offset: 96
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fieldset: AF1_1CH_CMP
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- name: AF2
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description: alternate function register 2
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byte_offset: 100
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fieldset: AF2_GP16
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- name: DCR
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description: DMA control register
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byte_offset: 988
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fieldset: DCR_GP16
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- name: DMAR
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description: DMA address for full transfer
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byte_offset: 992
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fieldset: DMAR_GP16
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block/TIM_2CH:
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extends: TIM_1CH
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description: 2-channel timers
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items:
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- name: CR2
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description: control register 2
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byte_offset: 4
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fieldset: CR2_2CH
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- name: SMCR
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description: slave mode control register
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byte_offset: 8
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fieldset: SMCR_2CH
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- name: DIER
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description: DMA/Interrupt enable register
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byte_offset: 12
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fieldset: DIER_2CH
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- name: SR
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description: status register
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byte_offset: 16
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fieldset: SR_2CH
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- name: EGR
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description: event generation register
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byte_offset: 20
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access: Write
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fieldset: EGR_2CH
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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array:
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len: 1
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stride: 4
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byte_offset: 24
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fieldset: CCMR_Input_2CH
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- name: CCMR_Output
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description: capture/compare mode register 1 (output mode)
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array:
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len: 1
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stride: 4
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byte_offset: 24
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fieldset: CCMR_Output_2CH
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- name: CCER
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description: capture/compare enable register
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byte_offset: 32
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fieldset: CCER_2CH
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- name: CCR
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description: capture/compare register x (x=1-2) (Dither mode disabled)
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array:
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len: 2
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stride: 4
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byte_offset: 52
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fieldset: CCR_2CH
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- name: CCR_DITHER
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description: capture/compare register x (x=1-2) (Dither mode enabled)
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array:
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len: 2
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stride: 4
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byte_offset: 52
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fieldset: CCR_DITHER_2CH
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- name: TISEL
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description: input selection register
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byte_offset: 92
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fieldset: TISEL_2CH
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block/TIM_2CH_CMP:
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extends: TIM_2CH
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description: 2-channel with one complementary output timers
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items:
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- name: CR2
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description: control register 2
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byte_offset: 4
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fieldset: CR2_2CH_CMP
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- name: SMCR
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description: slave mode control register
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byte_offset: 8
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fieldset: SMCR_2CH_CMP
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- name: DIER
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description: DMA/Interrupt enable register
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byte_offset: 12
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fieldset: DIER_2CH_CMP
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- name: SR
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description: status register
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byte_offset: 16
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fieldset: SR_1CH_CMP
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- name: EGR
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description: event generation register
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byte_offset: 20
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access: Write
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fieldset: EGR_1CH_CMP
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- name: CCER
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description: capture/compare enable register
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byte_offset: 32
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fieldset: CCER_2CH_CMP
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- name: RCR
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description: repetition counter register
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byte_offset: 48
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fieldset: RCR_1CH_CMP
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- name: BDTR
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description: break and dead-time register
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byte_offset: 68
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fieldset: BDTR_1CH_CMP
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- name: DTR2
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description: break and dead-time register
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byte_offset: 84
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fieldset: DTR2_ADV
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- name: TISEL
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description: input selection register
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byte_offset: 92
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fieldset: TISEL_2CH
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- name: AF1
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description: alternate function register 1
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byte_offset: 96
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fieldset: AF1_1CH_CMP
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- name: AF2
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description: alternate function register 2
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byte_offset: 100
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fieldset: AF2_GP16
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- name: DCR
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description: DMA control register
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byte_offset: 988
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fieldset: DCR_GP16
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- name: DMAR
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description: DMA address for full transfer
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byte_offset: 992
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fieldset: DMAR_GP16
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block/TIM_ADV:
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block/TIM_ADV:
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extends: TIM_GP16
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extends: TIM_GP16
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description: Advanced Control timers
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description: Advanced Control timers
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@ -226,6 +473,33 @@ block/TIM_GP32:
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stride: 4
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stride: 4
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byte_offset: 52
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byte_offset: 52
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fieldset: CCR_DITHER_GP32
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fieldset: CCR_DITHER_GP32
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fieldset/AF1_1CH_CMP:
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description: alternate function register 1
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fields:
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- name: BKINE
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description: TIMx_BKIN input enable
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bit_offset: 0
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bit_size: 1
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- name: BKCMPE
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description: TIM_BRK_CMPx (x=1-8) enable
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bit_offset: 1
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bit_size: 1
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array:
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len: 8
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stride: 1
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- name: BKINP
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description: TIMx_BKIN input polarity
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bit_offset: 9
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bit_size: 1
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enum: BKINP
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- name: BKCMPP
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description: TIM_BRK_CMPx (x=1-4) input polarity
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bit_offset: 10
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bit_size: 1
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array:
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len: 4
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stride: 1
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enum: BKINP
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fieldset/AF1_ADV:
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fieldset/AF1_ADV:
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extends: AF1_GP16
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extends: AF1_GP16
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description: alternate function register 1
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description: alternate function register 1
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@ -332,6 +606,75 @@ fieldset/ARR_GP32:
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description: Auto-reload value
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description: Auto-reload value
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bit_offset: 0
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bit_offset: 0
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bit_size: 32
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bit_size: 32
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fieldset/BDTR_1CH_CMP:
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description: break and dead-time register
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fields:
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- name: DTG
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description: Dead-time generator setup
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bit_offset: 0
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bit_size: 8
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- name: LOCK
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description: Lock configuration
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bit_offset: 8
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bit_size: 2
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enum: LOCK
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- name: OSSI
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description: Off-state selection for Idle mode
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bit_offset: 10
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bit_size: 1
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enum: OSSI
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- name: OSSR
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description: Off-state selection for Run mode
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bit_offset: 11
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bit_size: 1
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enum: OSSR
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- name: BKE
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description: Break x (x=1) enable
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bit_offset: 12
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bit_size: 1
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array:
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len: 1
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stride: 12
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- name: BKP
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description: Break x (x=1) polarity
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bit_offset: 13
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bit_size: 1
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array:
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len: 1
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stride: 12
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enum: BKP
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- name: AOE
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description: Automatic output enable
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bit_offset: 14
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bit_size: 1
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- name: MOE
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description: Main output enable
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bit_offset: 15
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bit_size: 1
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- name: BKF
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description: Break x (x=1) filter
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bit_offset: 16
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bit_size: 4
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array:
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len: 1
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stride: 4
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enum: FilterValue
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- name: BKDSRM
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description: Break x (x=1) Disarm
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bit_offset: 26
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bit_size: 1
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array:
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len: 1
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stride: 1
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enum: BKDSRM
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- name: BKBID
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description: Break x (x=1) bidirectional
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bit_offset: 28
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bit_size: 1
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array:
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len: 1
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stride: 1
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enum: BKBID
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fieldset/BDTR_ADV:
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fieldset/BDTR_ADV:
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description: break and dead-time register
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description: break and dead-time register
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fields:
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fields:
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@ -401,6 +744,77 @@ fieldset/BDTR_ADV:
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len: 2
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len: 2
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stride: 1
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stride: 1
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enum: BKBID
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enum: BKBID
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fieldset/CCER_1CH:
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description: capture/compare enable register
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fields:
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- name: CCE
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description: Capture/Compare x (x=1) output enable
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bit_offset: 0
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bit_size: 1
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array:
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len: 1
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stride: 4
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- name: CCP
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description: Capture/Compare x (x=1) output Polarity
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bit_offset: 1
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bit_size: 1
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array:
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len: 1
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stride: 4
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- name: CCNP
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description: Capture/Compare x (x=1) output Polarity
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bit_offset: 3
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bit_size: 1
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array:
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len: 1
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stride: 4
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fieldset/CCER_1CH_CMP:
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extends: CCER_1CH
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description: capture/compare enable register
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fields:
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- name: CCNE
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description: Capture/Compare x (x=1) complementary output enable
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bit_offset: 2
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bit_size: 1
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array:
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len: 1
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stride: 4
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fieldset/CCER_2CH:
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extends: CCER_1CH
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||||||
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description: capture/compare enable register
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fields:
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- name: CCE
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description: Capture/Compare x (x=1-2) output enable
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bit_offset: 0
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bit_size: 1
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array:
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len: 2
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stride: 4
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- name: CCP
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description: Capture/Compare x (x=1-2) output Polarity
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bit_offset: 1
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bit_size: 1
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array:
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len: 2
|
||||||
|
stride: 4
|
||||||
|
- name: CCNP
|
||||||
|
description: Capture/Compare x (x=1-2) output Polarity
|
||||||
|
bit_offset: 3
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 4
|
||||||
|
fieldset/CCER_2CH_CMP:
|
||||||
|
extends: CCER_2CH
|
||||||
|
description: capture/compare enable register
|
||||||
|
fields:
|
||||||
|
- name: CCNE
|
||||||
|
description: Capture/Compare x (x=1) complementary output enable
|
||||||
|
bit_offset: 2
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 4
|
||||||
fieldset/CCER_ADV:
|
fieldset/CCER_ADV:
|
||||||
extends: CCER_GP16
|
extends: CCER_GP16
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
@ -482,6 +896,59 @@ fieldset/CCMR3_ADV:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
|
fieldset/CCMR_Input_1CH:
|
||||||
|
description: capture/compare mode register x (x=1) (input mode)
|
||||||
|
fields:
|
||||||
|
- name: CCS
|
||||||
|
description: Capture/Compare y selection
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 2
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 8
|
||||||
|
enum: CCMR_Input_CCS
|
||||||
|
- name: ICPSC
|
||||||
|
description: Input capture y prescaler
|
||||||
|
bit_offset: 2
|
||||||
|
bit_size: 2
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 8
|
||||||
|
- name: ICF
|
||||||
|
description: Input capture y filter
|
||||||
|
bit_offset: 4
|
||||||
|
bit_size: 4
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 8
|
||||||
|
enum: FilterValue
|
||||||
|
fieldset/CCMR_Input_2CH:
|
||||||
|
extends: CCMR_Input_1CH
|
||||||
|
description: capture/compare mode register x (x=1) (input mode)
|
||||||
|
fields:
|
||||||
|
- name: CCS
|
||||||
|
description: Capture/Compare y selection
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 2
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 8
|
||||||
|
enum: CCMR_Input_CCS
|
||||||
|
- name: ICPSC
|
||||||
|
description: Input capture y prescaler
|
||||||
|
bit_offset: 2
|
||||||
|
bit_size: 2
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 8
|
||||||
|
- name: ICF
|
||||||
|
description: Input capture y filter
|
||||||
|
bit_offset: 4
|
||||||
|
bit_size: 4
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 8
|
||||||
|
enum: FilterValue
|
||||||
fieldset/CCMR_Input_GP16:
|
fieldset/CCMR_Input_GP16:
|
||||||
description: capture/compare mode register x (x=1-2) (input mode)
|
description: capture/compare mode register x (x=1-2) (input mode)
|
||||||
fields:
|
fields:
|
||||||
@ -508,6 +975,73 @@ fieldset/CCMR_Input_GP16:
|
|||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
enum: FilterValue
|
enum: FilterValue
|
||||||
|
fieldset/CCMR_Output_1CH:
|
||||||
|
description: capture/compare mode register x (x=1) (output mode)
|
||||||
|
fields:
|
||||||
|
- name: CCS
|
||||||
|
description: Capture/Compare y selection
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 2
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 8
|
||||||
|
enum: CCMR_Output_CCS
|
||||||
|
- name: OCFE
|
||||||
|
description: Output compare y fast enable
|
||||||
|
bit_offset: 2
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 8
|
||||||
|
- name: OCPE
|
||||||
|
description: Output compare y preload enable
|
||||||
|
bit_offset: 3
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 8
|
||||||
|
- name: OCM
|
||||||
|
description: Output compare y mode
|
||||||
|
bit_offset: 4
|
||||||
|
bit_size: 3
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 8
|
||||||
|
enum: OCM
|
||||||
|
fieldset/CCMR_Output_2CH:
|
||||||
|
extends: CCMR_Output_1CH
|
||||||
|
description: capture/compare mode register x (x=1) (output mode)
|
||||||
|
fields:
|
||||||
|
- name: CCS
|
||||||
|
description: Capture/Compare y selection
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 2
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 8
|
||||||
|
enum: CCMR_Output_CCS
|
||||||
|
- name: OCFE
|
||||||
|
description: Output compare y fast enable
|
||||||
|
bit_offset: 2
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 8
|
||||||
|
- name: OCPE
|
||||||
|
description: Output compare y preload enable
|
||||||
|
bit_offset: 3
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 8
|
||||||
|
- name: OCM
|
||||||
|
description: Output compare y mode
|
||||||
|
bit_offset: 4
|
||||||
|
bit_size: 3
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 8
|
||||||
|
enum: OCM
|
||||||
fieldset/CCMR_Output_GP16:
|
fieldset/CCMR_Output_GP16:
|
||||||
description: capture/compare mode register x (x=1-3) (output mode)
|
description: capture/compare mode register x (x=1-3) (output mode)
|
||||||
fields:
|
fields:
|
||||||
@ -572,6 +1106,42 @@ fieldset/CCR5_DITHER_ADV:
|
|||||||
len: 3
|
len: 3
|
||||||
stride: 1
|
stride: 1
|
||||||
enum: GC5C
|
enum: GC5C
|
||||||
|
fieldset/CCR_1CH:
|
||||||
|
description: capture/compare register x (x=1) (Dither mode disabled)
|
||||||
|
fields:
|
||||||
|
- name: CCR
|
||||||
|
description: capture/compare x (x=1) value
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 16
|
||||||
|
fieldset/CCR_2CH:
|
||||||
|
description: capture/compare register x (x=1,2) (Dither mode disabled)
|
||||||
|
fields:
|
||||||
|
- name: CCR
|
||||||
|
description: capture/compare x (x=1,2) value
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 16
|
||||||
|
fieldset/CCR_DITHER_1CH:
|
||||||
|
description: capture/compare register x (x=1) (Dither mode enabled)
|
||||||
|
fields:
|
||||||
|
- name: DITHER
|
||||||
|
description: Dither value
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 4
|
||||||
|
- name: CCR
|
||||||
|
description: capture/compare x (x=1) value
|
||||||
|
bit_offset: 4
|
||||||
|
bit_size: 16
|
||||||
|
fieldset/CCR_DITHER_2CH:
|
||||||
|
description: capture/compare register x (x=1,2) (Dither mode enabled)
|
||||||
|
fields:
|
||||||
|
- name: DITHER
|
||||||
|
description: Dither value
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 4
|
||||||
|
- name: CCR
|
||||||
|
description: capture/compare x (x=1-2) value
|
||||||
|
bit_offset: 4
|
||||||
|
bit_size: 16
|
||||||
fieldset/CCR_DITHER_GP16:
|
fieldset/CCR_DITHER_GP16:
|
||||||
description: capture/compare register x (x=1-4,6) (Dither mode enabled)
|
description: capture/compare register x (x=1-4,6) (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
@ -637,6 +1207,43 @@ fieldset/CNT_GP32:
|
|||||||
description: counter value
|
description: counter value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 32
|
bit_size: 32
|
||||||
|
fieldset/CR1_1CH:
|
||||||
|
description: control register 1
|
||||||
|
fields:
|
||||||
|
- name: CEN
|
||||||
|
description: Counter enable
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 1
|
||||||
|
- name: UDIS
|
||||||
|
description: Update disable
|
||||||
|
bit_offset: 1
|
||||||
|
bit_size: 1
|
||||||
|
- name: URS
|
||||||
|
description: Update request source
|
||||||
|
bit_offset: 2
|
||||||
|
bit_size: 1
|
||||||
|
enum: URS
|
||||||
|
- name: OPM
|
||||||
|
description: One-pulse mode enbaled
|
||||||
|
bit_offset: 3
|
||||||
|
bit_size: 1
|
||||||
|
- name: ARPE
|
||||||
|
description: Auto-reload preload enable
|
||||||
|
bit_offset: 7
|
||||||
|
bit_size: 1
|
||||||
|
- name: CKD
|
||||||
|
description: Clock division
|
||||||
|
bit_offset: 8
|
||||||
|
bit_size: 2
|
||||||
|
enum: CKD
|
||||||
|
- name: UIFREMAP
|
||||||
|
description: UIF status bit remapping enable
|
||||||
|
bit_offset: 11
|
||||||
|
bit_size: 1
|
||||||
|
- name: DITHEN
|
||||||
|
description: Dithering enable
|
||||||
|
bit_offset: 12
|
||||||
|
bit_size: 1
|
||||||
fieldset/CR1_BASIC:
|
fieldset/CR1_BASIC:
|
||||||
description: control register 1
|
description: control register 1
|
||||||
fields:
|
fields:
|
||||||
@ -688,6 +1295,80 @@ fieldset/CR1_GP16:
|
|||||||
bit_offset: 8
|
bit_offset: 8
|
||||||
bit_size: 2
|
bit_size: 2
|
||||||
enum: CKD
|
enum: CKD
|
||||||
|
fieldset/CR2_1CH_CMP:
|
||||||
|
description: control register 2
|
||||||
|
fields:
|
||||||
|
- name: CCPC
|
||||||
|
description: Capture/compare preloaded control
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 1
|
||||||
|
- name: CCUS
|
||||||
|
description: Capture/compare control update selection
|
||||||
|
bit_offset: 2
|
||||||
|
bit_size: 1
|
||||||
|
- name: CCDS
|
||||||
|
description: Capture/compare DMA selection
|
||||||
|
bit_offset: 3
|
||||||
|
bit_size: 1
|
||||||
|
enum: CCDS
|
||||||
|
- name: OIS
|
||||||
|
description: Output Idle state x (x=1)
|
||||||
|
bit_offset: 8
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 2
|
||||||
|
- name: OISN
|
||||||
|
description: Output Idle state x (x=1)
|
||||||
|
bit_offset: 9
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 2
|
||||||
|
fieldset/CR2_2CH:
|
||||||
|
description: control register 2
|
||||||
|
fields:
|
||||||
|
- name: MMS
|
||||||
|
description: Master mode selection
|
||||||
|
bit_offset: 4
|
||||||
|
bit_size: 3
|
||||||
|
enum: MMS
|
||||||
|
- name: TI1S
|
||||||
|
description: TI1 selection
|
||||||
|
bit_offset: 7
|
||||||
|
bit_size: 1
|
||||||
|
enum: TI1S
|
||||||
|
fieldset/CR2_2CH_CMP:
|
||||||
|
extends: CR2_2CH
|
||||||
|
description: control register 2
|
||||||
|
fields:
|
||||||
|
- name: CCPC
|
||||||
|
description: Capture/compare preloaded control
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 1
|
||||||
|
- name: CCUS
|
||||||
|
description: Capture/compare control update selection
|
||||||
|
bit_offset: 2
|
||||||
|
bit_size: 1
|
||||||
|
- name: CCDS
|
||||||
|
description: Capture/compare DMA selection
|
||||||
|
bit_offset: 3
|
||||||
|
bit_size: 1
|
||||||
|
enum: CCDS
|
||||||
|
- name: OIS
|
||||||
|
description: Output Idle state x (x=1,2)
|
||||||
|
bit_offset: 8
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 2
|
||||||
|
- name: OISN
|
||||||
|
description: Output Idle state x (x=1)
|
||||||
|
bit_offset: 9
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 2
|
||||||
fieldset/CR2_ADV:
|
fieldset/CR2_ADV:
|
||||||
extends: CR2_GP16
|
extends: CR2_GP16
|
||||||
description: control register 2
|
description: control register 2
|
||||||
@ -757,6 +1438,70 @@ fieldset/DCR_GP16:
|
|||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
enum: DBSS
|
enum: DBSS
|
||||||
|
fieldset/DIER_1CH:
|
||||||
|
description: DMA/Interrupt enable register
|
||||||
|
fields:
|
||||||
|
- name: UIE
|
||||||
|
description: Update interrupt enable
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 1
|
||||||
|
- name: CCIE
|
||||||
|
description: Capture/Compare x (x=1) interrupt enable
|
||||||
|
bit_offset: 1
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 1
|
||||||
|
fieldset/DIER_1CH_CMP:
|
||||||
|
extends: DIER_1CH
|
||||||
|
description: DMA/Interrupt enable register
|
||||||
|
fields:
|
||||||
|
- name: COMIE
|
||||||
|
description: COM interrupt enable
|
||||||
|
bit_offset: 5
|
||||||
|
bit_size: 1
|
||||||
|
- name: BIE
|
||||||
|
description: Break interrupt enable
|
||||||
|
bit_offset: 7
|
||||||
|
bit_size: 1
|
||||||
|
- name: UDE
|
||||||
|
description: Update DMA request enable
|
||||||
|
bit_offset: 8
|
||||||
|
bit_size: 1
|
||||||
|
- name: CCDE
|
||||||
|
description: Capture/Compare x (x=1) DMA request enable
|
||||||
|
bit_offset: 9
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 1
|
||||||
|
fieldset/DIER_2CH:
|
||||||
|
extends: DIER_1CH
|
||||||
|
description: DMA/Interrupt enable register
|
||||||
|
fields:
|
||||||
|
- name: CCIE
|
||||||
|
description: Capture/Compare x (x=1-2) interrupt enable
|
||||||
|
bit_offset: 1
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 1
|
||||||
|
- name: TIE
|
||||||
|
description: Trigger interrupt enable
|
||||||
|
bit_offset: 6
|
||||||
|
bit_size: 1
|
||||||
|
fieldset/DIER_2CH_CMP:
|
||||||
|
extends: DIER_1CH_CMP
|
||||||
|
description: DMA/Interrupt enable register
|
||||||
|
fields:
|
||||||
|
- name: COMDE
|
||||||
|
description: COM DMA request enable
|
||||||
|
bit_offset: 13
|
||||||
|
bit_size: 1
|
||||||
|
- name: TDE
|
||||||
|
description: Trigger DMA request enable
|
||||||
|
bit_offset: 14
|
||||||
|
bit_size: 1
|
||||||
fieldset/DIER_ADV:
|
fieldset/DIER_ADV:
|
||||||
extends: DIER_GP16
|
extends: DIER_GP16
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
@ -887,6 +1632,50 @@ fieldset/ECR_GP16:
|
|||||||
description: Pulse width prescaler
|
description: Pulse width prescaler
|
||||||
bit_offset: 24
|
bit_offset: 24
|
||||||
bit_size: 2
|
bit_size: 2
|
||||||
|
fieldset/EGR_1CH:
|
||||||
|
description: event generation register
|
||||||
|
fields:
|
||||||
|
- name: UG
|
||||||
|
description: Update generation
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 1
|
||||||
|
- name: CCG
|
||||||
|
description: Capture/compare x (x=1) generation
|
||||||
|
bit_offset: 1
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 1
|
||||||
|
fieldset/EGR_1CH_CMP:
|
||||||
|
extends: EGR_1CH
|
||||||
|
description: event generation register
|
||||||
|
fields:
|
||||||
|
- name: COMG
|
||||||
|
description: Capture/Compare control update generation
|
||||||
|
bit_offset: 5
|
||||||
|
bit_size: 1
|
||||||
|
- name: BG
|
||||||
|
description: Break x (x=1) generation
|
||||||
|
bit_offset: 7
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 1
|
||||||
|
fieldset/EGR_2CH:
|
||||||
|
extends: EGR_1CH
|
||||||
|
description: event generation register
|
||||||
|
fields:
|
||||||
|
- name: CCG
|
||||||
|
description: Capture/compare x (x=1-2) generation
|
||||||
|
bit_offset: 1
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 1
|
||||||
|
- name: TG
|
||||||
|
description: Trigger generation
|
||||||
|
bit_offset: 6
|
||||||
|
bit_size: 1
|
||||||
fieldset/EGR_ADV:
|
fieldset/EGR_ADV:
|
||||||
extends: EGR_GP16
|
extends: EGR_GP16
|
||||||
description: event generation register
|
description: event generation register
|
||||||
@ -931,6 +1720,13 @@ fieldset/PSC_BASIC:
|
|||||||
description: Prescaler value
|
description: Prescaler value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
|
fieldset/RCR_1CH_CMP:
|
||||||
|
description: repetition counter register
|
||||||
|
fields:
|
||||||
|
- name: REP
|
||||||
|
description: Repetition counter value
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 8
|
||||||
fieldset/RCR_ADV:
|
fieldset/RCR_ADV:
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
fields:
|
fields:
|
||||||
@ -938,6 +1734,32 @@ fieldset/RCR_ADV:
|
|||||||
description: Repetition counter value
|
description: Repetition counter value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
|
fieldset/SMCR_2CH:
|
||||||
|
description: slave mode control register
|
||||||
|
fields:
|
||||||
|
- name: SMS
|
||||||
|
description: Slave mode selection
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 3
|
||||||
|
enum: SMS
|
||||||
|
- name: TS
|
||||||
|
description: Trigger selection
|
||||||
|
bit_offset: 4
|
||||||
|
bit_size: 3
|
||||||
|
enum: TS
|
||||||
|
- name: MSM
|
||||||
|
description: Master/Slave mode
|
||||||
|
bit_offset: 7
|
||||||
|
bit_size: 1
|
||||||
|
enum: MSM
|
||||||
|
fieldset/SMCR_2CH_CMP:
|
||||||
|
extends: SMCR_2CH
|
||||||
|
description: slave mode control register
|
||||||
|
fields:
|
||||||
|
- name: SMSPE
|
||||||
|
description: SMS preload enable
|
||||||
|
bit_offset: 24
|
||||||
|
bit_size: 1
|
||||||
fieldset/SMCR_ADV:
|
fieldset/SMCR_ADV:
|
||||||
extends: SMCR_GP16
|
extends: SMCR_GP16
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
@ -993,6 +1815,64 @@ fieldset/SMCR_GP16:
|
|||||||
bit_offset: 25
|
bit_offset: 25
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
enum: SMSPS
|
enum: SMSPS
|
||||||
|
fieldset/SR_1CH:
|
||||||
|
description: status register
|
||||||
|
fields:
|
||||||
|
- name: UIF
|
||||||
|
description: Update interrupt flag
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 1
|
||||||
|
- name: CCIF
|
||||||
|
description: Capture/compare x (x=1) interrupt flag
|
||||||
|
bit_offset: 1
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 1
|
||||||
|
- name: CCOF
|
||||||
|
description: Capture/Compare x (x=1) overcapture flag
|
||||||
|
bit_offset: 9
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 1
|
||||||
|
fieldset/SR_1CH_CMP:
|
||||||
|
extends: SR_1CH
|
||||||
|
description: status register
|
||||||
|
fields:
|
||||||
|
- name: COMIF
|
||||||
|
description: COM interrupt flag
|
||||||
|
bit_offset: 5
|
||||||
|
bit_size: 1
|
||||||
|
- name: BIF
|
||||||
|
description: Break x (x=1) interrupt flag
|
||||||
|
bit_offset: 7
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 1
|
||||||
|
fieldset/SR_2CH:
|
||||||
|
extends: SR_1CH
|
||||||
|
description: status register
|
||||||
|
fields:
|
||||||
|
- name: CCIF
|
||||||
|
description: Capture/compare x (x=1-2) interrupt flag
|
||||||
|
bit_offset: 1
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 1
|
||||||
|
- name: TIF
|
||||||
|
description: Trigger interrupt flag
|
||||||
|
bit_offset: 6
|
||||||
|
bit_size: 1
|
||||||
|
- name: CCOF
|
||||||
|
description: Capture/Compare x (x=1-2) overcapture flag
|
||||||
|
bit_offset: 9
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 1
|
||||||
fieldset/SR_ADV:
|
fieldset/SR_ADV:
|
||||||
extends: SR_GP16
|
extends: SR_GP16
|
||||||
description: status register
|
description: status register
|
||||||
@ -1061,6 +1941,27 @@ fieldset/SR_GP16:
|
|||||||
description: Transition error interrupt flag
|
description: Transition error interrupt flag
|
||||||
bit_offset: 23
|
bit_offset: 23
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
|
fieldset/TISEL_1CH:
|
||||||
|
description: input selection register
|
||||||
|
fields:
|
||||||
|
- name: TISEL
|
||||||
|
description: Selects TIM_TIx (x=1) input
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 4
|
||||||
|
array:
|
||||||
|
len: 1
|
||||||
|
stride: 8
|
||||||
|
fieldset/TISEL_2CH:
|
||||||
|
extends: TISEL_1CH
|
||||||
|
description: input selection register
|
||||||
|
fields:
|
||||||
|
- name: TISEL
|
||||||
|
description: Selects TIM_TIx (x=1-2) input
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 4
|
||||||
|
array:
|
||||||
|
len: 2
|
||||||
|
stride: 8
|
||||||
fieldset/TISEL_GP16:
|
fieldset/TISEL_GP16:
|
||||||
description: input selection register
|
description: input selection register
|
||||||
fields:
|
fields:
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user