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syscfg-cleanup

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This commit is contained in:
eZio Pan 2024-01-01 10:51:30 +08:00
parent d35c07bece
commit 751158dace
1 changed files with 17 additions and 112 deletions
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129
data/registers/syscfg_f3.yaml
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@ -147,40 +147,33 @@ fieldset/CFGR1:
bit_size: 1 bit_size: 1
enum: I2C3_FMP enum: I2C3_FMP
- name: VBAT_MON - name: VBAT_MON
description: VBAT monitoring enable description: Enable the power switch to deliver VBAT voltage on ADC channel 18 input
bit_offset: 24 bit_offset: 24
bit_size: 1 bit_size: 1
enum: VBAT_MON
- name: FPU_IE0 - name: FPU_IE0
description: Invalid operation interrupt enable description: Invalid operation interrupt enable
bit_offset: 26 bit_offset: 26
bit_size: 1 bit_size: 1
enum: FPU_IE0
- name: FPU_IE1 - name: FPU_IE1
description: Devide-by-zero interrupt enable description: Devide-by-zero interrupt enable
bit_offset: 27 bit_offset: 27
bit_size: 1 bit_size: 1
enum: FPU_IE1
- name: FPU_IE2 - name: FPU_IE2
description: Underflow interrupt enable description: Underflow interrupt enable
bit_offset: 28 bit_offset: 28
bit_size: 1 bit_size: 1
enum: FPU_IE2
- name: FPU_IE3 - name: FPU_IE3
description: Overflow interrupt enable description: Overflow interrupt enable
bit_offset: 29 bit_offset: 29
bit_size: 1 bit_size: 1
enum: FPU_IE3
- name: FPU_IE4 - name: FPU_IE4
description: Input denormal interrupt enable description: Input denormal interrupt enable
bit_offset: 30 bit_offset: 30
bit_size: 1 bit_size: 1
enum: FPU_IE4
- name: FPU_IE5 - name: FPU_IE5
description: Inexact interrupt enable description: Inexact interrupt enable
bit_offset: 31 bit_offset: 31
bit_size: 1 bit_size: 1
enum: FPU_IE5
fieldset/CFGR2: fieldset/CFGR2:
description: configuration register 2 description: configuration register 2
fields: fields:
@ -333,85 +326,69 @@ fieldset/RCR:
description: CCM SRAM protection register description: CCM SRAM protection register
fields: fields:
- name: PAGE0_WP - name: PAGE0_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE1_WP - name: PAGE1_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 1 bit_offset: 1
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE2_WP - name: PAGE2_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 2 bit_offset: 2
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE3_WP - name: PAGE3_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 3 bit_offset: 3
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE4_WP - name: PAGE4_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 4 bit_offset: 4
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE5_WP - name: PAGE5_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 5 bit_offset: 5
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE6_WP - name: PAGE6_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 6 bit_offset: 6
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE7_WP - name: PAGE7_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 7 bit_offset: 7
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE8_WP - name: PAGE8_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 8 bit_offset: 8
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE9_WP - name: PAGE9_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 9 bit_offset: 9
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE10_WP - name: PAGE10_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 10 bit_offset: 10
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE11_WP - name: PAGE11_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 11 bit_offset: 11
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE12_WP - name: PAGE12_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 12 bit_offset: 12
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE13_WP - name: PAGE13_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 13 bit_offset: 13
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE14_WP - name: PAGE14_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 14 bit_offset: 14
bit_size: 1 bit_size: 1
enum: PAGE0_WP
- name: PAGE15_WP - name: PAGE15_WP
description: CCM SRAM page write protection bit description: CCM SRAM page write protection enabled
bit_offset: 15 bit_offset: 15
bit_size: 1 bit_size: 1
enum: PAGE0_WP
enum/ADC12_EXT13_RMP: enum/ADC12_EXT13_RMP:
bit_size: 1 bit_size: 1
variants: variants:
@ -616,60 +593,6 @@ enum/ENCODER_MODE:
- name: MapTim3Tim15 - name: MapTim3Tim15
description: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively description: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
value: 2 value: 2
enum/FPU_IE0:
bit_size: 1
variants:
- name: Disabled
description: Invalid operation interrupt disable
value: 0
- name: Enabled
description: Invalid operation interrupt enable
value: 1
enum/FPU_IE1:
bit_size: 1
variants:
- name: Disabled
description: Devide-by-zero interrupt disable
value: 0
- name: Enabled
description: Devide-by-zero interrupt enable
value: 1
enum/FPU_IE2:
bit_size: 1
variants:
- name: Disabled
description: Underflow interrupt disable
value: 0
- name: Enabled
description: Underflow interrupt enable
value: 1
enum/FPU_IE3:
bit_size: 1
variants:
- name: Disabled
description: Overflow interrupt disable
value: 0
- name: Enabled
description: Overflow interrupt enable
value: 1
enum/FPU_IE4:
bit_size: 1
variants:
- name: Disabled
description: Input denormal interrupt disable
value: 0
- name: Enabled
description: Input denormal interrupt enable
value: 1
enum/FPU_IE5:
bit_size: 1
variants:
- name: Disabled
description: Inexact interrupt disable
value: 0
- name: Enabled
description: Inexact interrupt enable
value: 1
enum/I2C1_FMP: enum/I2C1_FMP:
bit_size: 1 bit_size: 1
variants: variants:
@ -781,15 +704,6 @@ enum/MEM_MODE:
- name: SRAM - name: SRAM
description: Embedded SRAM mapped at 0x0000_0000 description: Embedded SRAM mapped at 0x0000_0000
value: 3 value: 3
enum/PAGE0_WP:
bit_size: 1
variants:
- name: Disabled
description: Write protection of pagex is disabled
value: 0
- name: Enabled
description: Write protection of pagex is enabled
value: 1
enum/PVD_LOCK: enum/PVD_LOCK:
bit_size: 1 bit_size: 1
variants: variants:
@ -922,12 +836,3 @@ enum/USB_IT_RMP:
- name: Remapped - name: Remapped
description: USB_HP, USB_LP and USB_WAKEUP interrupts are mapped on interrupt lines 74, 75 and 76 respectively description: USB_HP, USB_LP and USB_WAKEUP interrupts are mapped on interrupt lines 74, 75 and 76 respectively
value: 1 value: 1
enum/VBAT_MON:
bit_size: 1
variants:
- name: Disable
description: Disable the power switch to not deliver VBAT voltage on ADC channel 18 input
value: 0
- name: Enable
description: Enable the power switch to deliver VBAT voltage on ADC channel 18 input
value: 1