diff --git a/data/registers/rcc_f4.yaml b/data/registers/rcc_f4.yaml
index 02ec8f2..91d8ce1 100644
--- a/data/registers/rcc_f4.yaml
+++ b/data/registers/rcc_f4.yaml
@@ -1789,11 +1789,11 @@ fieldset/APB1RSTR:
     name: USART3RST
   - bit_offset: 19
     bit_size: 1
-    description: USART 4 reset
+    description: UART 4 reset
     name: UART4RST
   - bit_offset: 20
     bit_size: 1
-    description: USART 5 reset
+    description: UART 5 reset
     name: UART5RST
   - bit_offset: 25
     bit_size: 1
diff --git a/data/registers/rcc_l4.yaml b/data/registers/rcc_l4.yaml
index 0b07812..f469afd 100644
--- a/data/registers/rcc_l4.yaml
+++ b/data/registers/rcc_l4.yaml
@@ -338,10 +338,6 @@ fieldset/AHB2ENR:
     bit_size: 1
     description: HASH clock enable
     name: HASHEN
-  - bit_offset: 17
-    bit_size: 1
-    description: HASH clock enable
-    name: HASH1EN
   - bit_offset: 18
     bit_size: 1
     description: Random Number Generator clock enable
@@ -413,10 +409,6 @@ fieldset/AHB2RSTR:
     bit_size: 1
     description: Hash reset
     name: HASHRST
-  - bit_offset: 17
-    bit_size: 1
-    description: Hash reset
-    name: HASH1RST
   - bit_offset: 18
     bit_size: 1
     description: Random number generator reset
@@ -600,14 +592,10 @@ fieldset/APB1ENR1:
     bit_size: 1
     description: SPI2 clock enable
     name: SPI2EN
-  - bit_offset: 15
-    bit_size: 1
-    description: SPI peripheral 3 clock enable
-    name: SPI3EN
   - bit_offset: 15
     bit_size: 1
     description: SPI3 clock enable
-    name: SP3EN
+    name: SPI3EN
   - bit_offset: 17
     bit_size: 1
     description: USART2 clock enable
@@ -742,10 +730,6 @@ fieldset/APB1RSTR1:
     bit_size: 1
     description: UART4 reset
     name: UART4RST
-  - bit_offset: 19
-    bit_size: 1
-    description: USART4 reset.
-    name: USART4RST
   - bit_offset: 20
     bit_size: 1
     description: UART5 reset
@@ -872,10 +856,6 @@ fieldset/APB1SMENR1:
     bit_size: 1
     description: UART4 clocks enable during Sleep and Stop modes
     name: UART4SMEN
-  - bit_offset: 19
-    bit_size: 1
-    description: USART4 clocks enable during Sleep and Stop modes
-    name: USART4SMEN
   - bit_offset: 20
     bit_size: 1
     description: UART5 clocks enable during Sleep and Stop modes
@@ -1206,10 +1186,6 @@ fieldset/CCIPR:
     bit_size: 2
     description: UART4 clock source selection
     name: UART4SEL
-  - bit_offset: 6
-    bit_size: 2
-    description: USART4 clock source selection
-    name: USART4SEL
   - bit_offset: 8
     bit_size: 2
     description: UART5 clock source selection