From 6fdbf26a5c2fd9cb58927edbed05f205bb75468e Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 27 Feb 2024 17:47:05 +0800 Subject: [PATCH 1/7] extract --- data/registers/opamp_h7.yaml | 161 +++++++++++++++++++++++++++++++++++ 1 file changed, 161 insertions(+) create mode 100644 data/registers/opamp_h7.yaml diff --git a/data/registers/opamp_h7.yaml b/data/registers/opamp_h7.yaml new file mode 100644 index 0000000..a3af33a --- /dev/null +++ b/data/registers/opamp_h7.yaml @@ -0,0 +1,161 @@ +block/OPAMP: + description: Operational amplifiers. + items: + - name: OPAMP1_CSR + description: OPAMP1 control/status register. + byte_offset: 0 + fieldset: OPAMP1_CSR + - name: OPAMP1_OTR + description: OPAMP1 offset trimming register in normal mode. + byte_offset: 4 + fieldset: OPAMP1_OTR + - name: OPAMP1_HSOTR + description: OPAMP1 offset trimming register in low-power mode. + byte_offset: 8 + fieldset: OPAMP1_HSOTR + - name: OPAMP2_CSR + description: OPAMP2 control/status register. + byte_offset: 16 + fieldset: OPAMP2_CSR + - name: OPAMP2_OTR + description: OPAMP2 offset trimming register in normal mode. + byte_offset: 20 + fieldset: OPAMP2_OTR + - name: OPAMP2_HSOTR + description: OPAMP2 offset trimming register in low-power mode. + byte_offset: 24 + fieldset: OPAMP2_HSOTR +fieldset/OPAMP1_CSR: + description: OPAMP1 control/status register. + fields: + - name: OPAEN + description: Operational amplifier Enable. + bit_offset: 0 + bit_size: 1 + - name: FORCE_VP + description: Force internal reference on VP (reserved for test. + bit_offset: 1 + bit_size: 1 + - name: VP_SEL + description: Operational amplifier PGA mode. + bit_offset: 2 + bit_size: 2 + - name: VM_SEL + description: Inverting input selection. + bit_offset: 5 + bit_size: 2 + - name: OPAHSM + description: Operational amplifier high-speed mode. + bit_offset: 8 + bit_size: 1 + - name: CALON + description: Calibration mode enabled. + bit_offset: 11 + bit_size: 1 + - name: CALSEL + description: Calibration selection. + bit_offset: 12 + bit_size: 2 + - name: PGA_GAIN + description: allows to switch from AOP offset trimmed values to AOP offset. + bit_offset: 14 + bit_size: 4 + - name: USERTRIM + description: User trimming enable. + bit_offset: 18 + bit_size: 1 + - name: TSTREF + description: OPAMP calibration reference voltage output control (reserved for test). + bit_offset: 29 + bit_size: 1 + - name: CALOUT + description: Operational amplifier calibration output. + bit_offset: 30 + bit_size: 1 +fieldset/OPAMP1_HSOTR: + description: OPAMP1 offset trimming register in low-power mode. + fields: + - name: TRIMLPOFFSETN + description: Trim for NMOS differential pairs. + bit_offset: 0 + bit_size: 5 + - name: TRIMLPOFFSETP + description: Trim for PMOS differential pairs. + bit_offset: 8 + bit_size: 5 +fieldset/OPAMP1_OTR: + description: OPAMP1 offset trimming register in normal mode. + fields: + - name: TRIMOFFSETN + description: Trim for NMOS differential pairs. + bit_offset: 0 + bit_size: 5 + - name: TRIMOFFSETP + description: Trim for PMOS differential pairs. + bit_offset: 8 + bit_size: 5 +fieldset/OPAMP2_CSR: + description: OPAMP2 control/status register. + fields: + - name: OPAEN + description: Operational amplifier Enable. + bit_offset: 0 + bit_size: 1 + - name: FORCE_VP + description: Force internal reference on VP (reserved for test). + bit_offset: 1 + bit_size: 1 + - name: VM_SEL + description: Inverting input selection. + bit_offset: 5 + bit_size: 2 + - name: OPAHSM + description: Operational amplifier high-speed mode. + bit_offset: 8 + bit_size: 1 + - name: CALON + description: Calibration mode enabled. + bit_offset: 11 + bit_size: 1 + - name: CALSEL + description: Calibration selection. + bit_offset: 12 + bit_size: 2 + - name: PGA_GAIN + description: Operational amplifier Programmable amplifier gain value. + bit_offset: 14 + bit_size: 4 + - name: USERTRIM + description: User trimming enable. + bit_offset: 18 + bit_size: 1 + - name: TSTREF + description: OPAMP calibration reference voltage output control (reserved for test). + bit_offset: 29 + bit_size: 1 + - name: CALOUT + description: Operational amplifier calibration output. + bit_offset: 30 + bit_size: 1 +fieldset/OPAMP2_HSOTR: + description: OPAMP2 offset trimming register in low-power mode. + fields: + - name: TRIMLPOFFSETN + description: Trim for NMOS differential pairs. + bit_offset: 0 + bit_size: 5 + - name: TRIMLPOFFSETP + description: Trim for PMOS differential pairs. + bit_offset: 8 + bit_size: 5 +fieldset/OPAMP2_OTR: + description: OPAMP2 offset trimming register in normal mode. + fields: + - name: TRIMOFFSETN + description: Trim for NMOS differential pairs. + bit_offset: 0 + bit_size: 5 + - name: TRIMOFFSETP + description: Trim for PMOS differential pairs. + bit_offset: 8 + bit_size: 5 From 57b221bf09e824133c4e8f4e537c4baeec7f91f4 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 27 Feb 2024 18:07:59 +0800 Subject: [PATCH 2/7] apply transform and remove OPAMP2 --- data/registers/opamp_h7.yaml | 95 ++++-------------------------------- transforms/OPAMP.yaml | 12 +++++ 2 files changed, 21 insertions(+), 86 deletions(-) diff --git a/data/registers/opamp_h7.yaml b/data/registers/opamp_h7.yaml index a3af33a..949d171 100644 --- a/data/registers/opamp_h7.yaml +++ b/data/registers/opamp_h7.yaml @@ -1,31 +1,19 @@ block/OPAMP: description: Operational amplifiers. items: - - name: OPAMP1_CSR + - name: CSR description: OPAMP1 control/status register. byte_offset: 0 - fieldset: OPAMP1_CSR - - name: OPAMP1_OTR + fieldset: CSR + - name: OTR description: OPAMP1 offset trimming register in normal mode. byte_offset: 4 - fieldset: OPAMP1_OTR - - name: OPAMP1_HSOTR + fieldset: OTR + - name: HSOTR description: OPAMP1 offset trimming register in low-power mode. byte_offset: 8 - fieldset: OPAMP1_HSOTR - - name: OPAMP2_CSR - description: OPAMP2 control/status register. - byte_offset: 16 - fieldset: OPAMP2_CSR - - name: OPAMP2_OTR - description: OPAMP2 offset trimming register in normal mode. - byte_offset: 20 - fieldset: OPAMP2_OTR - - name: OPAMP2_HSOTR - description: OPAMP2 offset trimming register in low-power mode. - byte_offset: 24 - fieldset: OPAMP2_HSOTR -fieldset/OPAMP1_CSR: + fieldset: HSOTR +fieldset/CSR: description: OPAMP1 control/status register. fields: - name: OPAEN @@ -72,7 +60,7 @@ fieldset/OPAMP1_CSR: description: Operational amplifier calibration output. bit_offset: 30 bit_size: 1 -fieldset/OPAMP1_HSOTR: +fieldset/HSOTR: description: OPAMP1 offset trimming register in low-power mode. fields: - name: TRIMLPOFFSETN @@ -83,7 +71,7 @@ fieldset/OPAMP1_HSOTR: description: Trim for PMOS differential pairs. bit_offset: 8 bit_size: 5 -fieldset/OPAMP1_OTR: +fieldset/OTR: description: OPAMP1 offset trimming register in normal mode. fields: - name: TRIMOFFSETN @@ -94,68 +82,3 @@ fieldset/OPAMP1_OTR: description: Trim for PMOS differential pairs. bit_offset: 8 bit_size: 5 -fieldset/OPAMP2_CSR: - description: OPAMP2 control/status register. - fields: - - name: OPAEN - description: Operational amplifier Enable. - bit_offset: 0 - bit_size: 1 - - name: FORCE_VP - description: Force internal reference on VP (reserved for test). - bit_offset: 1 - bit_size: 1 - - name: VM_SEL - description: Inverting input selection. - bit_offset: 5 - bit_size: 2 - - name: OPAHSM - description: Operational amplifier high-speed mode. - bit_offset: 8 - bit_size: 1 - - name: CALON - description: Calibration mode enabled. - bit_offset: 11 - bit_size: 1 - - name: CALSEL - description: Calibration selection. - bit_offset: 12 - bit_size: 2 - - name: PGA_GAIN - description: Operational amplifier Programmable amplifier gain value. - bit_offset: 14 - bit_size: 4 - - name: USERTRIM - description: User trimming enable. - bit_offset: 18 - bit_size: 1 - - name: TSTREF - description: OPAMP calibration reference voltage output control (reserved for test). - bit_offset: 29 - bit_size: 1 - - name: CALOUT - description: Operational amplifier calibration output. - bit_offset: 30 - bit_size: 1 -fieldset/OPAMP2_HSOTR: - description: OPAMP2 offset trimming register in low-power mode. - fields: - - name: TRIMLPOFFSETN - description: Trim for NMOS differential pairs. - bit_offset: 0 - bit_size: 5 - - name: TRIMLPOFFSETP - description: Trim for PMOS differential pairs. - bit_offset: 8 - bit_size: 5 -fieldset/OPAMP2_OTR: - description: OPAMP2 offset trimming register in normal mode. - fields: - - name: TRIMOFFSETN - description: Trim for NMOS differential pairs. - bit_offset: 0 - bit_size: 5 - - name: TRIMOFFSETP - description: Trim for PMOS differential pairs. - bit_offset: 8 - bit_size: 5 diff --git a/transforms/OPAMP.yaml b/transforms/OPAMP.yaml index 5545167..c6d6fd1 100644 --- a/transforms/OPAMP.yaml +++ b/transforms/OPAMP.yaml @@ -1,3 +1,15 @@ transforms: - !DeleteEnums from: ^(LOCK)$ + + - !DeleteFieldsets + from: OPAMP2_.+ + + - !RenameRegisters + block: OPAMP + from: OPAMP1_(.+) + to: $1 + + - !Rename + from: OPAMP1_(.+) + to: $1 From 3447a8f6eb1ba4b4eb3a18b61dfd63a0c1c79dcf Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 27 Feb 2024 19:49:51 +0800 Subject: [PATCH 3/7] add enum --- data/registers/opamp_h7.yaml | 82 ++++++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/data/registers/opamp_h7.yaml b/data/registers/opamp_h7.yaml index 949d171..07fb6bb 100644 --- a/data/registers/opamp_h7.yaml +++ b/data/registers/opamp_h7.yaml @@ -24,26 +24,32 @@ fieldset/CSR: description: Force internal reference on VP (reserved for test. bit_offset: 1 bit_size: 1 + enum: FORCE_VP - name: VP_SEL description: Operational amplifier PGA mode. bit_offset: 2 bit_size: 2 + enum: VP_SEL - name: VM_SEL description: Inverting input selection. bit_offset: 5 bit_size: 2 + enum: VM_SEL - name: OPAHSM description: Operational amplifier high-speed mode. bit_offset: 8 bit_size: 1 + enum: OPAHSM - name: CALON description: Calibration mode enabled. bit_offset: 11 bit_size: 1 + enum: CALON - name: CALSEL description: Calibration selection. bit_offset: 12 bit_size: 2 + enum: CALSEL - name: PGA_GAIN description: allows to switch from AOP offset trimmed values to AOP offset. bit_offset: 14 @@ -60,6 +66,7 @@ fieldset/CSR: description: Operational amplifier calibration output. bit_offset: 30 bit_size: 1 + enum: CALOUT fieldset/HSOTR: description: OPAMP1 offset trimming register in low-power mode. fields: @@ -82,3 +89,78 @@ fieldset/OTR: description: Trim for PMOS differential pairs. bit_offset: 8 bit_size: 5 +enum/CALON: + bit_size: 1 + variants: + - name: Normal + description: Normal mode + value: 0 + - name: Calibration + description: Calibration mode (all switches opened by HW) + value: 1 +enum/CALOUT: + bit_size: 1 + variants: + - name: Less + description: Non-inverting < inverting + value: 0 + - name: Greater + description: Non-inverting > inverting + value: 1 +enum/CALSEL: + bit_size: 2 + variants: + - name: Percent3_3 + description: VREFOPAMP=3.3% VDDA. + value: 0 + - name: Percent10 + description: VREFOPAMP=10% VDDA. + value: 1 + - name: Percent50 + description: VREFOPAMP=50% VDDA. + value: 2 + - name: Percent90 + description: VREFOPAMP=90% VDDA. + value: 3 +enum/OPAHSM: + bit_size: 1 + variants: + - name: Normal + description: operational amplifier in normal mode + value: 0 + - name: HighSpeed + description: operational amplifier in high-speed mode + value: 1 +enum/VM_SEL: + bit_size: 2 + variants: + - name: Inm0 + description: INM0 connected to OPAMP_VINM input + value: 0 + - name: Inm1 + description: INM1 connected to OPAMP_VINM input + value: 1 + - name: Pga + description: Feedback resistor is connected to the OPAMP_VINM input (PGA mode), Inverting input selection depends on the PGA_GAIN setting + value: 2 + - name: Follower + description: opamp_out connected to OPAMP_VINM input (Follower mode) + value: 3 +enum/VP_SEL: + bit_size: 2 + variants: + - name: Gpio + description: GPIO connected to OPAMPx_VINP + value: 0 + - name: DacOut + description: dac_outx connected to OPAMPx_VINP + value: 1 +enum/FORCE_VP: + bit_size: 1 + variants: + - name: NormalOperating + description: Normal operating mode. Non-inverting input connected to inputs. + value: 0 + - name: CalibrationVerification + description: Calibration verification mode. Non-inverting input connected to calibration reference voltage. + value: 1 \ No newline at end of file From cb9c35bb4bf8f60bfbabdb6d8cd74d66fac63e96 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 27 Feb 2024 19:51:13 +0800 Subject: [PATCH 4/7] branch from opamp_h7 to h5 --- data/registers/opamp_h5.yaml | 166 +++++++++++++++++++++++++++++++++++ 1 file changed, 166 insertions(+) create mode 100644 data/registers/opamp_h5.yaml diff --git a/data/registers/opamp_h5.yaml b/data/registers/opamp_h5.yaml new file mode 100644 index 0000000..07fb6bb --- /dev/null +++ b/data/registers/opamp_h5.yaml @@ -0,0 +1,166 @@ +block/OPAMP: + description: Operational amplifiers. + items: + - name: CSR + description: OPAMP1 control/status register. + byte_offset: 0 + fieldset: CSR + - name: OTR + description: OPAMP1 offset trimming register in normal mode. + byte_offset: 4 + fieldset: OTR + - name: HSOTR + description: OPAMP1 offset trimming register in low-power mode. + byte_offset: 8 + fieldset: HSOTR +fieldset/CSR: + description: OPAMP1 control/status register. + fields: + - name: OPAEN + description: Operational amplifier Enable. + bit_offset: 0 + bit_size: 1 + - name: FORCE_VP + description: Force internal reference on VP (reserved for test. + bit_offset: 1 + bit_size: 1 + enum: FORCE_VP + - name: VP_SEL + description: Operational amplifier PGA mode. + bit_offset: 2 + bit_size: 2 + enum: VP_SEL + - name: VM_SEL + description: Inverting input selection. + bit_offset: 5 + bit_size: 2 + enum: VM_SEL + - name: OPAHSM + description: Operational amplifier high-speed mode. + bit_offset: 8 + bit_size: 1 + enum: OPAHSM + - name: CALON + description: Calibration mode enabled. + bit_offset: 11 + bit_size: 1 + enum: CALON + - name: CALSEL + description: Calibration selection. + bit_offset: 12 + bit_size: 2 + enum: CALSEL + - name: PGA_GAIN + description: allows to switch from AOP offset trimmed values to AOP offset. + bit_offset: 14 + bit_size: 4 + - name: USERTRIM + description: User trimming enable. + bit_offset: 18 + bit_size: 1 + - name: TSTREF + description: OPAMP calibration reference voltage output control (reserved for test). + bit_offset: 29 + bit_size: 1 + - name: CALOUT + description: Operational amplifier calibration output. + bit_offset: 30 + bit_size: 1 + enum: CALOUT +fieldset/HSOTR: + description: OPAMP1 offset trimming register in low-power mode. + fields: + - name: TRIMLPOFFSETN + description: Trim for NMOS differential pairs. + bit_offset: 0 + bit_size: 5 + - name: TRIMLPOFFSETP + description: Trim for PMOS differential pairs. + bit_offset: 8 + bit_size: 5 +fieldset/OTR: + description: OPAMP1 offset trimming register in normal mode. + fields: + - name: TRIMOFFSETN + description: Trim for NMOS differential pairs. + bit_offset: 0 + bit_size: 5 + - name: TRIMOFFSETP + description: Trim for PMOS differential pairs. + bit_offset: 8 + bit_size: 5 +enum/CALON: + bit_size: 1 + variants: + - name: Normal + description: Normal mode + value: 0 + - name: Calibration + description: Calibration mode (all switches opened by HW) + value: 1 +enum/CALOUT: + bit_size: 1 + variants: + - name: Less + description: Non-inverting < inverting + value: 0 + - name: Greater + description: Non-inverting > inverting + value: 1 +enum/CALSEL: + bit_size: 2 + variants: + - name: Percent3_3 + description: VREFOPAMP=3.3% VDDA. + value: 0 + - name: Percent10 + description: VREFOPAMP=10% VDDA. + value: 1 + - name: Percent50 + description: VREFOPAMP=50% VDDA. + value: 2 + - name: Percent90 + description: VREFOPAMP=90% VDDA. + value: 3 +enum/OPAHSM: + bit_size: 1 + variants: + - name: Normal + description: operational amplifier in normal mode + value: 0 + - name: HighSpeed + description: operational amplifier in high-speed mode + value: 1 +enum/VM_SEL: + bit_size: 2 + variants: + - name: Inm0 + description: INM0 connected to OPAMP_VINM input + value: 0 + - name: Inm1 + description: INM1 connected to OPAMP_VINM input + value: 1 + - name: Pga + description: Feedback resistor is connected to the OPAMP_VINM input (PGA mode), Inverting input selection depends on the PGA_GAIN setting + value: 2 + - name: Follower + description: opamp_out connected to OPAMP_VINM input (Follower mode) + value: 3 +enum/VP_SEL: + bit_size: 2 + variants: + - name: Gpio + description: GPIO connected to OPAMPx_VINP + value: 0 + - name: DacOut + description: dac_outx connected to OPAMPx_VINP + value: 1 +enum/FORCE_VP: + bit_size: 1 + variants: + - name: NormalOperating + description: Normal operating mode. Non-inverting input connected to inputs. + value: 0 + - name: CalibrationVerification + description: Calibration verification mode. Non-inverting input connected to calibration reference voltage. + value: 1 \ No newline at end of file From 69c3921fc3469af3591b354689781ce6707450c9 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 27 Feb 2024 19:59:40 +0800 Subject: [PATCH 5/7] add enum --- data/registers/opamp_h5.yaml | 35 ++++++++++++++++++++++++----------- data/registers/opamp_h7.yaml | 28 +++++++++++++++++++--------- 2 files changed, 43 insertions(+), 20 deletions(-) diff --git a/data/registers/opamp_h5.yaml b/data/registers/opamp_h5.yaml index 07fb6bb..3bb9441 100644 --- a/data/registers/opamp_h5.yaml +++ b/data/registers/opamp_h5.yaml @@ -58,6 +58,7 @@ fieldset/CSR: description: User trimming enable. bit_offset: 18 bit_size: 1 + enum: USERTRIM - name: TSTREF description: OPAMP calibration reference voltage output control (reserved for test). bit_offset: 29 @@ -122,6 +123,15 @@ enum/CALSEL: - name: Percent90 description: VREFOPAMP=90% VDDA. value: 3 +enum/FORCE_VP: + bit_size: 1 + variants: + - name: NormalOperating + description: Normal operating mode. Non-inverting input connected to inputs. + value: 0 + - name: CalibrationVerification + description: Calibration verification mode. Non-inverting input connected to calibration reference voltage. + value: 1 enum/OPAHSM: bit_size: 1 variants: @@ -131,6 +141,15 @@ enum/OPAHSM: - name: HighSpeed description: operational amplifier in high-speed mode value: 1 +enum/USERTRIM: + bit_size: 1 + variants: + - name: Factory + description: \'factory\' trim code used + value: 0 + - name: User + description: \'user\' trim code used + value: 1 enum/VM_SEL: bit_size: 2 variants: @@ -149,18 +168,12 @@ enum/VM_SEL: enum/VP_SEL: bit_size: 2 variants: - - name: Gpio - description: GPIO connected to OPAMPx_VINP + - name: GpioInp0 + description: GPIO INP0 connected to OPAMP_VINP value: 0 - name: DacOut description: dac_outx connected to OPAMPx_VINP value: 1 -enum/FORCE_VP: - bit_size: 1 - variants: - - name: NormalOperating - description: Normal operating mode. Non-inverting input connected to inputs. - value: 0 - - name: CalibrationVerification - description: Calibration verification mode. Non-inverting input connected to calibration reference voltage. - value: 1 \ No newline at end of file + - name: GpioInp2 + description: GPIO INP2 is connected to OPAMP_VINP + value: 2 diff --git a/data/registers/opamp_h7.yaml b/data/registers/opamp_h7.yaml index 07fb6bb..fbe797e 100644 --- a/data/registers/opamp_h7.yaml +++ b/data/registers/opamp_h7.yaml @@ -58,6 +58,7 @@ fieldset/CSR: description: User trimming enable. bit_offset: 18 bit_size: 1 + enum: USERTRIM - name: TSTREF description: OPAMP calibration reference voltage output control (reserved for test). bit_offset: 29 @@ -122,6 +123,15 @@ enum/CALSEL: - name: Percent90 description: VREFOPAMP=90% VDDA. value: 3 +enum/FORCE_VP: + bit_size: 1 + variants: + - name: NormalOperating + description: Normal operating mode. Non-inverting input connected to inputs. + value: 0 + - name: CalibrationVerification + description: Calibration verification mode. Non-inverting input connected to calibration reference voltage. + value: 1 enum/OPAHSM: bit_size: 1 variants: @@ -131,6 +141,15 @@ enum/OPAHSM: - name: HighSpeed description: operational amplifier in high-speed mode value: 1 +enum/USERTRIM: + bit_size: 1 + variants: + - name: Factory + description: \'factory\' trim code used + value: 0 + - name: User + description: \'user\' trim code used + value: 1 enum/VM_SEL: bit_size: 2 variants: @@ -155,12 +174,3 @@ enum/VP_SEL: - name: DacOut description: dac_outx connected to OPAMPx_VINP value: 1 -enum/FORCE_VP: - bit_size: 1 - variants: - - name: NormalOperating - description: Normal operating mode. Non-inverting input connected to inputs. - value: 0 - - name: CalibrationVerification - description: Calibration verification mode. Non-inverting input connected to calibration reference voltage. - value: 1 \ No newline at end of file From 147d16f2e6c542789721276204e44428439588a6 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 27 Feb 2024 20:02:16 +0800 Subject: [PATCH 6/7] add to chips.rs --- stm32-data-gen/src/chips.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/stm32-data-gen/src/chips.rs b/stm32-data-gen/src/chips.rs index 995e535..bceeda6 100644 --- a/stm32-data-gen/src/chips.rs +++ b/stm32-data-gen/src/chips.rs @@ -226,6 +226,8 @@ impl PeriMatcher { ("STM32H7.*:ADC3_COMMON:.*", ("adccommon", "v4", "ADC_COMMON")), ("STM32G4.*:OPAMP:G4_tsmc90_fastOpamp", ("opamp", "g4", "OPAMP")), ("STM32F3.*:OPAMP:tsmc018_ull_opamp_v1_0", ("opamp", "f3", "OPAMP")), + ("STM32H7.*:OPAMP:.*", ("opamp", "h7", "OPAMP")), + ("STM32H5.*:OPAMP:.*", ("opamp", "h5", "OPAMP")), (".*:DCMI:.*", ("dcmi", "v1", "DCMI")), ("STM32C0.*:SYSCFG:.*", ("syscfg", "c0", "SYSCFG")), ("STM32F0.*:SYSCFG:.*", ("syscfg", "f0", "SYSCFG")), From 81d3b42d80fd1e8228fe3f673575bd948d53a519 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 27 Feb 2024 20:12:05 +0800 Subject: [PATCH 7/7] rename --- data/registers/{opamp_h7.yaml => opamp_h_v1.yaml} | 0 data/registers/{opamp_h5.yaml => opamp_h_v2.yaml} | 0 stm32-data-gen/src/chips.rs | 4 ++-- 3 files changed, 2 insertions(+), 2 deletions(-) rename data/registers/{opamp_h7.yaml => opamp_h_v1.yaml} (100%) rename data/registers/{opamp_h5.yaml => opamp_h_v2.yaml} (100%) diff --git a/data/registers/opamp_h7.yaml b/data/registers/opamp_h_v1.yaml similarity index 100% rename from data/registers/opamp_h7.yaml rename to data/registers/opamp_h_v1.yaml diff --git a/data/registers/opamp_h5.yaml b/data/registers/opamp_h_v2.yaml similarity index 100% rename from data/registers/opamp_h5.yaml rename to data/registers/opamp_h_v2.yaml diff --git a/stm32-data-gen/src/chips.rs b/stm32-data-gen/src/chips.rs index bceeda6..e2195bc 100644 --- a/stm32-data-gen/src/chips.rs +++ b/stm32-data-gen/src/chips.rs @@ -226,8 +226,8 @@ impl PeriMatcher { ("STM32H7.*:ADC3_COMMON:.*", ("adccommon", "v4", "ADC_COMMON")), ("STM32G4.*:OPAMP:G4_tsmc90_fastOpamp", ("opamp", "g4", "OPAMP")), ("STM32F3.*:OPAMP:tsmc018_ull_opamp_v1_0", ("opamp", "f3", "OPAMP")), - ("STM32H7.*:OPAMP:.*", ("opamp", "h7", "OPAMP")), - ("STM32H5.*:OPAMP:.*", ("opamp", "h5", "OPAMP")), + ("STM32H7.*:OPAMP:.*", ("opamp", "h_v1", "OPAMP")), + ("STM32H5.*:OPAMP:.*", ("opamp", "h_v2", "OPAMP")), (".*:DCMI:.*", ("dcmi", "v1", "DCMI")), ("STM32C0.*:SYSCFG:.*", ("syscfg", "c0", "SYSCFG")), ("STM32F0.*:SYSCFG:.*", ("syscfg", "f0", "SYSCFG")),