From 7353e48dc909a535c5fcfd1cb9405ca511e1306d Mon Sep 17 00:00:00 2001 From: Lucas Granberg Date: Thu, 9 Feb 2023 09:57:59 +0200 Subject: [PATCH] fix perimap ordering to trigger the right version for L5 --- src/chips.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/chips.rs b/src/chips.rs index bde6441..4162ac7 100644 --- a/src/chips.rs +++ b/src/chips.rs @@ -126,12 +126,12 @@ impl PeriMatcher { (".*:LPUART:sci3_v1_2", ("lpuart", "v2", "LPUART")), (".*:LPUART:sci3_v1_3", ("lpuart", "v2", "LPUART")), (".*:LPUART:sci3_v1_4", ("lpuart", "v2", "LPUART")), + ("STM32L5.*:RNG:.*", ("rng", "v2", "RNG")), + ("STM32U5.*:RNG:.*", ("rng", "v2", "RNG")), (".*:RNG:rng1_v1_1", ("rng", "v1", "RNG")), (".*:RNG:rng1_v2_0", ("rng", "v1", "RNG")), (".*:RNG:rng1_v2_1", ("rng", "v1", "RNG")), (".*:RNG:rng1_v3_1", ("rng", "v2", "RNG")), - ("STM32U5.*:RNG:.*", ("rng", "v2", "RNG")), - ("STM32L5.*:RNG:.*", ("rng", "v2", "RNG")), (".*:SPI:spi2_v1_4", ("spi", "f1", "SPI")), (".*:SPI:spi2s1_v2_1", ("spi", "v1", "SPI")), (".*:SPI:spi2s1_v2_2", ("spi", "v1", "SPI")),