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tailoring from pka_v1b to pka_v1c

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This commit is contained in:
eZio Pan 2024-02-25 21:44:44 +08:00
parent f4567db67a
commit 6f3f972c6c
1 changed files with 0 additions and 16 deletions
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16
data/registers/pka_v1c.yaml
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@ -28,10 +28,6 @@ fieldset/CLRFR:
description: Clear address error flag.
bit_offset: 20
bit_size: 1
- name: OPERRFC
description: Clear operation error flag.
bit_offset: 21
bit_size: 1
fieldset/CR:
description: PKA control register.
fields:
@ -59,17 +55,9 @@ fieldset/CR:
description: Address error interrupt enable.
bit_offset: 20
bit_size: 1
- name: OPERRIE
description: Operation error interrupt enable.
bit_offset: 21
bit_size: 1
fieldset/SR:
description: PKA status register.
fields:
- name: INITOK
description: PKA initialization OK This bit is asserted when PKA initialization is complete. When RNG is not able to output proper random numbers INITOK stays at 0.
bit_offset: 0
bit_size: 1
- name: BUSY
description: PKA operation is in progress This bit is set to 1 whenever START bit in the PKA_CR is set. It is automatically cleared when the computation is complete, meaning that PKA RAM can be safely accessed and a new operation can be started. If PKA is started with a wrong opcode, it is busy for a couple of cycles, then it aborts automatically the operation and go back to ready (BUSY bit is set to 0).
bit_offset: 16
@ -86,7 +74,3 @@ fieldset/SR:
description: Address error flag This bit is cleared using ADDRERRFC bit in PKA_CLRFR.
bit_offset: 20
bit_size: 1
- name: OPERRF
description: Operation error flag This bit is cleared using OPERRFC bit in PKA_CLRFR.
bit_offset: 21
bit_size: 1