add TIM_CORE, common part of TIM_BASIC and TIM_1CH
This commit is contained in:
parent
db6e501fd3
commit
6b5e0c6b4e
@ -1,4 +1,5 @@
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block/TIM_1CH:
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block/TIM_1CH:
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extends: TIM_CORE
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description: 1-channel timers
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description: 1-channel timers
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items:
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items:
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- name: CR1
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- name: CR1
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@ -36,18 +37,6 @@ block/TIM_1CH:
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description: capture/compare enable register
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description: capture/compare enable register
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byte_offset: 32
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byte_offset: 32
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fieldset: CCER_1CH
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fieldset: CCER_1CH
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- name: CNT
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description: counter
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byte_offset: 36
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fieldset: CNT_BASIC
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- name: PSC
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description: prescaler
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byte_offset: 40
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fieldset: PSC_BASIC
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- name: ARR
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description: auto-reload register
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byte_offset: 44
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fieldset: ARR_BASIC
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- name: CCR
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- name: CCR
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description: capture/compare register x (x=1)
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description: capture/compare register x (x=1)
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array:
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array:
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@ -286,12 +275,9 @@ block/TIM_ADV:
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byte_offset: 100
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byte_offset: 100
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fieldset: AF2_ADV
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fieldset: AF2_ADV
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block/TIM_BASIC:
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block/TIM_BASIC:
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extends: TIM_CORE
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description: Basic timers
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description: Basic timers
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items:
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items:
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- name: CR1
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description: control register 1
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byte_offset: 0
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fieldset: CR1_BASIC
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- name: CR2
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- name: CR2
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description: control register 2
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description: control register 2
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byte_offset: 4
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byte_offset: 4
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@ -300,27 +286,38 @@ block/TIM_BASIC:
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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byte_offset: 12
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byte_offset: 12
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fieldset: DIER_BASIC
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fieldset: DIER_BASIC
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block/TIM_CORE:
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description: Virtual timer for common part of TIM_BASIC and TIM_1CH
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items:
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- name: CR1
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description: control register 1
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byte_offset: 0
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fieldset: CR1_CORE
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- name: DIER
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description: DMA/Interrupt enable register
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byte_offset: 12
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fieldset: DIER_CORE
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- name: SR
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- name: SR
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description: status register
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description: status register
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byte_offset: 16
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byte_offset: 16
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fieldset: SR_BASIC
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fieldset: SR_CORE
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- name: EGR
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- name: EGR
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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fieldset: EGR_BASIC
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fieldset: EGR_CORE
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- name: CNT
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- name: CNT
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description: counter
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description: counter
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byte_offset: 36
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byte_offset: 36
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fieldset: CNT_BASIC
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fieldset: CNT_CORE
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- name: PSC
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- name: PSC
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description: prescaler
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description: prescaler
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byte_offset: 40
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byte_offset: 40
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fieldset: PSC_BASIC
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fieldset: PSC_CORE
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- name: ARR
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- name: ARR
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description: auto-reload register
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description: auto-reload register
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byte_offset: 44
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byte_offset: 44
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fieldset: ARR_BASIC
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fieldset: ARR_CORE
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block/TIM_GP16:
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block/TIM_GP16:
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extends: TIM_BASIC
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extends: TIM_BASIC
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description: General purpose 16-bit timers
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description: General purpose 16-bit timers
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@ -519,7 +516,7 @@ fieldset/AF2_ADV:
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len: 2
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len: 2
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stride: 1
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stride: 1
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enum: BKINP
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enum: BKINP
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fieldset/ARR_BASIC:
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fieldset/ARR_CORE:
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description: auto-reload register
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description: auto-reload register
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fields:
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fields:
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- name: ARR
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- name: ARR
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@ -1019,7 +1016,7 @@ fieldset/CCR_GP32:
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description: capture/compare x (x=1-4,6) value
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description: capture/compare x (x=1-4,6) value
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bit_offset: 0
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bit_offset: 0
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bit_size: 32
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bit_size: 32
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fieldset/CNT_BASIC:
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fieldset/CNT_CORE:
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description: counter
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description: counter
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fields:
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fields:
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- name: CNT
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- name: CNT
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@ -1038,39 +1035,15 @@ fieldset/CNT_GP32:
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bit_offset: 0
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bit_offset: 0
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bit_size: 32
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bit_size: 32
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fieldset/CR1_1CH:
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fieldset/CR1_1CH:
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extends: CR1_CORE
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description: control register 1
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description: control register 1
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fields:
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fields:
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- name: CEN
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description: Counter enable
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bit_offset: 0
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bit_size: 1
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- name: UDIS
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description: Update disable
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bit_offset: 1
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bit_size: 1
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- name: URS
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description: Update request source
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bit_offset: 2
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bit_size: 1
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enum: URS
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- name: OPM
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description: One-pulse mode enbaled
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bit_offset: 3
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bit_size: 1
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- name: ARPE
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description: Auto-reload preload enable
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bit_offset: 7
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bit_size: 1
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- name: CKD
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- name: CKD
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description: Clock division
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description: Clock division
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bit_offset: 8
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bit_offset: 8
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bit_size: 2
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bit_size: 2
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enum: CKD
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enum: CKD
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- name: UIFREMAP
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fieldset/CR1_CORE:
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description: UIF status bit remapping enable
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bit_offset: 11
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bit_size: 1
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fieldset/CR1_BASIC:
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description: control register 1
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description: control register 1
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fields:
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fields:
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- name: CEN
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- name: CEN
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@ -1099,7 +1072,7 @@ fieldset/CR1_BASIC:
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bit_offset: 11
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bit_offset: 11
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bit_size: 1
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bit_size: 1
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fieldset/CR1_GP16:
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fieldset/CR1_GP16:
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extends: CR1_BASIC
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extends: CR1_CORE
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description: control register 1
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description: control register 1
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fields:
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fields:
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- name: DIR
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- name: DIR
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@ -1255,12 +1228,9 @@ fieldset/DCR_GP16:
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bit_size: 4
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bit_size: 4
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enum: DBSS
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enum: DBSS
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fieldset/DIER_1CH:
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fieldset/DIER_1CH:
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extends: DIER_CORE
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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fields:
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fields:
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- name: UIE
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description: Update interrupt enable
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bit_offset: 0
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bit_size: 1
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- name: CCIE
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- name: CCIE
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description: Capture/Compare x (x=1) interrupt enable
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description: Capture/Compare x (x=1) interrupt enable
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bit_offset: 1
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bit_offset: 1
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@ -1335,16 +1305,20 @@ fieldset/DIER_ADV:
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bit_offset: 13
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bit_offset: 13
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bit_size: 1
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bit_size: 1
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fieldset/DIER_BASIC:
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fieldset/DIER_BASIC:
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extends: DIER_CORE
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description: DMA/Interrupt enable register
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fields:
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- name: UDE
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description: Update DMA request enable
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bit_offset: 8
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bit_size: 1
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fieldset/DIER_CORE:
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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fields:
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fields:
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- name: UIE
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- name: UIE
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description: Update interrupt enable
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description: Update interrupt enable
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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- name: UDE
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description: Update DMA request enable
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bit_offset: 8
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bit_size: 1
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fieldset/DIER_GP16:
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fieldset/DIER_GP16:
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extends: DIER_BASIC
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extends: DIER_BASIC
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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@ -1424,12 +1398,9 @@ fieldset/ECR_GP16:
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bit_offset: 24
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bit_offset: 24
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bit_size: 2
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bit_size: 2
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fieldset/EGR_1CH:
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fieldset/EGR_1CH:
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extends: EGR_CORE
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description: event generation register
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description: event generation register
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fields:
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fields:
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- name: UG
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description: Update generation
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bit_offset: 0
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bit_size: 1
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- name: CCG
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- name: CCG
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description: Capture/compare x (x=1) generation
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description: Capture/compare x (x=1) generation
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bit_offset: 1
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bit_offset: 1
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@ -1497,7 +1468,7 @@ fieldset/EGR_ADV:
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array:
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array:
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len: 2
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len: 2
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stride: 1
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stride: 1
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fieldset/EGR_BASIC:
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fieldset/EGR_CORE:
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description: event generation register
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description: event generation register
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fields:
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fields:
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- name: UG
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- name: UG
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@ -1505,7 +1476,7 @@ fieldset/EGR_BASIC:
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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fieldset/EGR_GP16:
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fieldset/EGR_GP16:
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extends: EGR_BASIC
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extends: EGR_CORE
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description: event generation register
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description: event generation register
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fields:
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fields:
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- name: CCG
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- name: CCG
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@ -1519,7 +1490,7 @@ fieldset/EGR_GP16:
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description: Trigger generation
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description: Trigger generation
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bit_offset: 6
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bit_offset: 6
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bit_size: 1
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bit_size: 1
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fieldset/PSC_BASIC:
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fieldset/PSC_CORE:
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description: prescaler
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description: prescaler
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fields:
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fields:
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- name: PSC
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- name: PSC
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@ -1605,12 +1576,9 @@ fieldset/SMCR_GP16:
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bit_size: 1
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bit_size: 1
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enum: ETP
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enum: ETP
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fieldset/SR_1CH:
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fieldset/SR_1CH:
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extends: SR_CORE
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description: status register
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description: status register
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fields:
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fields:
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- name: UIF
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description: Update interrupt flag
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bit_offset: 0
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bit_size: 1
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- name: CCIF
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- name: CCIF
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description: Capture/compare x (x=1) interrupt flag
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description: Capture/compare x (x=1) interrupt flag
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bit_offset: 1
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bit_offset: 1
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@ -1707,7 +1675,7 @@ fieldset/SR_ADV:
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description: Capture/compare 6 interrupt flag
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description: Capture/compare 6 interrupt flag
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bit_offset: 17
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bit_offset: 17
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bit_size: 1
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bit_size: 1
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fieldset/SR_BASIC:
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fieldset/SR_CORE:
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description: status register
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description: status register
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fields:
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fields:
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- name: UIF
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- name: UIF
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@ -1715,7 +1683,7 @@ fieldset/SR_BASIC:
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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fieldset/SR_GP16:
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fieldset/SR_GP16:
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extends: SR_BASIC
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extends: SR_CORE
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description: status register
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description: status register
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fields:
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fields:
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- name: CCIF
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- name: CCIF
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@ -1,4 +1,5 @@
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block/TIM_1CH:
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block/TIM_1CH:
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extends: TIM_CORE
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description: 1-channel timers
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description: 1-channel timers
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items:
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items:
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- name: CR1
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- name: CR1
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@ -36,22 +37,6 @@ block/TIM_1CH:
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description: capture/compare enable register
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description: capture/compare enable register
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byte_offset: 32
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byte_offset: 32
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fieldset: CCER_1CH
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fieldset: CCER_1CH
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- name: CNT
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description: counter
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byte_offset: 36
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fieldset: CNT_BASIC
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- name: PSC
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description: prescaler
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byte_offset: 40
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fieldset: PSC_BASIC
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- name: ARR
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description: auto-reload register (Dither mode disabled)
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byte_offset: 44
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fieldset: ARR_BASIC
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- name: ARR_DITHER
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description: auto-reload register (Dither mode enabled)
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byte_offset: 44
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fieldset: ARR_DITHER_BASIC
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- name: CCR
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- name: CCR
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description: capture/compare register x (x=1) (Dither mode disabled)
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description: capture/compare register x (x=1) (Dither mode disabled)
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array:
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array:
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@ -312,12 +297,9 @@ block/TIM_ADV:
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byte_offset: 100
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byte_offset: 100
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fieldset: AF2_ADV
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fieldset: AF2_ADV
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block/TIM_BASIC:
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block/TIM_BASIC:
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extends: TIM_CORE
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description: Basic timers
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description: Basic timers
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items:
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items:
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- name: CR1
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description: control register 1
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byte_offset: 0
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fieldset: CR1_BASIC
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- name: CR2
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- name: CR2
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description: control register 2
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description: control register 2
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byte_offset: 4
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byte_offset: 4
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@ -326,31 +308,42 @@ block/TIM_BASIC:
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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byte_offset: 12
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byte_offset: 12
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fieldset: DIER_BASIC
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fieldset: DIER_BASIC
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block/TIM_CORE:
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description: Virtual timer for common part of TIM_BASIC and TIM_1CH
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items:
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- name: CR1
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description: control register 1
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byte_offset: 0
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fieldset: CR1_CORE
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- name: DIER
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description: DMA/Interrupt enable register
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byte_offset: 12
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fieldset: DIER_CORE
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- name: SR
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- name: SR
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description: status register
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description: status register
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byte_offset: 16
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byte_offset: 16
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fieldset: SR_BASIC
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fieldset: SR_CORE
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- name: EGR
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- name: EGR
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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fieldset: EGR_BASIC
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fieldset: EGR_CORE
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- name: CNT
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- name: CNT
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description: counter
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description: counter
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byte_offset: 36
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byte_offset: 36
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fieldset: CNT_BASIC
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fieldset: CNT_CORE
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- name: PSC
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- name: PSC
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description: prescaler
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description: prescaler
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byte_offset: 40
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byte_offset: 40
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fieldset: PSC_BASIC
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fieldset: PSC_CORE
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- name: ARR
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- name: ARR
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description: auto-reload register (Dither mode disabled)
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description: auto-reload register (Dither mode disabled)
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byte_offset: 44
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byte_offset: 44
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fieldset: ARR_BASIC
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fieldset: ARR_CORE
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- name: ARR_DITHER
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- name: ARR_DITHER
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description: auto-reload register (Dither mode enabled)
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description: auto-reload register (Dither mode enabled)
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byte_offset: 44
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byte_offset: 44
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fieldset: ARR_DITHER_BASIC
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fieldset: ARR_DITHER_CORE
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block/TIM_GP16:
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block/TIM_GP16:
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extends: TIM_BASIC
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extends: TIM_BASIC
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description: General purpose 16-bit timers
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description: General purpose 16-bit timers
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@ -567,14 +560,14 @@ fieldset/AF2_GP16:
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description: ocref_clr source selection
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description: ocref_clr source selection
|
||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
fieldset/ARR_BASIC:
|
fieldset/ARR_CORE:
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/ARR_DITHER_BASIC:
|
fieldset/ARR_DITHER_CORE:
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -1139,7 +1132,7 @@ fieldset/CCR_GP32:
|
|||||||
description: capture/compare x (x=1-4,6) value
|
description: capture/compare x (x=1-4,6) value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 32
|
bit_size: 32
|
||||||
fieldset/CNT_BASIC:
|
fieldset/CNT_CORE:
|
||||||
description: counter
|
description: counter
|
||||||
fields:
|
fields:
|
||||||
- name: CNT
|
- name: CNT
|
||||||
@ -1169,43 +1162,15 @@ fieldset/CNT_GP32:
|
|||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 32
|
bit_size: 32
|
||||||
fieldset/CR1_1CH:
|
fieldset/CR1_1CH:
|
||||||
|
extends: CR1_CORE
|
||||||
description: control register 1
|
description: control register 1
|
||||||
fields:
|
fields:
|
||||||
- name: CEN
|
|
||||||
description: Counter enable
|
|
||||||
bit_offset: 0
|
|
||||||
bit_size: 1
|
|
||||||
- name: UDIS
|
|
||||||
description: Update disable
|
|
||||||
bit_offset: 1
|
|
||||||
bit_size: 1
|
|
||||||
- name: URS
|
|
||||||
description: Update request source
|
|
||||||
bit_offset: 2
|
|
||||||
bit_size: 1
|
|
||||||
enum: URS
|
|
||||||
- name: OPM
|
|
||||||
description: One-pulse mode enbaled
|
|
||||||
bit_offset: 3
|
|
||||||
bit_size: 1
|
|
||||||
- name: ARPE
|
|
||||||
description: Auto-reload preload enable
|
|
||||||
bit_offset: 7
|
|
||||||
bit_size: 1
|
|
||||||
- name: CKD
|
- name: CKD
|
||||||
description: Clock division
|
description: Clock division
|
||||||
bit_offset: 8
|
bit_offset: 8
|
||||||
bit_size: 2
|
bit_size: 2
|
||||||
enum: CKD
|
enum: CKD
|
||||||
- name: UIFREMAP
|
fieldset/CR1_CORE:
|
||||||
description: UIF status bit remapping enable
|
|
||||||
bit_offset: 11
|
|
||||||
bit_size: 1
|
|
||||||
- name: DITHEN
|
|
||||||
description: Dithering enable
|
|
||||||
bit_offset: 12
|
|
||||||
bit_size: 1
|
|
||||||
fieldset/CR1_BASIC:
|
|
||||||
description: control register 1
|
description: control register 1
|
||||||
fields:
|
fields:
|
||||||
- name: CEN
|
- name: CEN
|
||||||
@ -1238,7 +1203,7 @@ fieldset/CR1_BASIC:
|
|||||||
bit_offset: 12
|
bit_offset: 12
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR1_GP16:
|
fieldset/CR1_GP16:
|
||||||
extends: CR1_BASIC
|
extends: CR1_CORE
|
||||||
description: control register 1
|
description: control register 1
|
||||||
fields:
|
fields:
|
||||||
- name: DIR
|
- name: DIR
|
||||||
@ -1390,12 +1355,9 @@ fieldset/DCR_GP16:
|
|||||||
bit_size: 4
|
bit_size: 4
|
||||||
enum: DBSS
|
enum: DBSS
|
||||||
fieldset/DIER_1CH:
|
fieldset/DIER_1CH:
|
||||||
|
extends: DIER_CORE
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
fields:
|
fields:
|
||||||
- name: UIE
|
|
||||||
description: Update interrupt enable
|
|
||||||
bit_offset: 0
|
|
||||||
bit_size: 1
|
|
||||||
- name: CCIE
|
- name: CCIE
|
||||||
description: Capture/Compare x (x=1) interrupt enable
|
description: Capture/Compare x (x=1) interrupt enable
|
||||||
bit_offset: 1
|
bit_offset: 1
|
||||||
@ -1470,16 +1432,20 @@ fieldset/DIER_ADV:
|
|||||||
bit_offset: 13
|
bit_offset: 13
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/DIER_BASIC:
|
fieldset/DIER_BASIC:
|
||||||
|
extends: DIER_CORE
|
||||||
|
description: DMA/Interrupt enable register
|
||||||
|
fields:
|
||||||
|
- name: UDE
|
||||||
|
description: Update DMA request enable
|
||||||
|
bit_offset: 8
|
||||||
|
bit_size: 1
|
||||||
|
fieldset/DIER_CORE:
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
fields:
|
fields:
|
||||||
- name: UIE
|
- name: UIE
|
||||||
description: Update interrupt enable
|
description: Update interrupt enable
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
- name: UDE
|
|
||||||
description: Update DMA request enable
|
|
||||||
bit_offset: 8
|
|
||||||
bit_size: 1
|
|
||||||
fieldset/DIER_GP16:
|
fieldset/DIER_GP16:
|
||||||
extends: DIER_BASIC
|
extends: DIER_BASIC
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
@ -1584,12 +1550,9 @@ fieldset/ECR_GP16:
|
|||||||
bit_offset: 24
|
bit_offset: 24
|
||||||
bit_size: 2
|
bit_size: 2
|
||||||
fieldset/EGR_1CH:
|
fieldset/EGR_1CH:
|
||||||
|
extends: EGR_CORE
|
||||||
description: event generation register
|
description: event generation register
|
||||||
fields:
|
fields:
|
||||||
- name: UG
|
|
||||||
description: Update generation
|
|
||||||
bit_offset: 0
|
|
||||||
bit_size: 1
|
|
||||||
- name: CCG
|
- name: CCG
|
||||||
description: Capture/compare x (x=1) generation
|
description: Capture/compare x (x=1) generation
|
||||||
bit_offset: 1
|
bit_offset: 1
|
||||||
@ -1657,7 +1620,7 @@ fieldset/EGR_ADV:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 1
|
stride: 1
|
||||||
fieldset/EGR_BASIC:
|
fieldset/EGR_CORE:
|
||||||
description: event generation register
|
description: event generation register
|
||||||
fields:
|
fields:
|
||||||
- name: UG
|
- name: UG
|
||||||
@ -1665,7 +1628,7 @@ fieldset/EGR_BASIC:
|
|||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/EGR_GP16:
|
fieldset/EGR_GP16:
|
||||||
extends: EGR_BASIC
|
extends: EGR_CORE
|
||||||
description: event generation register
|
description: event generation register
|
||||||
fields:
|
fields:
|
||||||
- name: CCG
|
- name: CCG
|
||||||
@ -1679,7 +1642,7 @@ fieldset/EGR_GP16:
|
|||||||
description: Trigger generation
|
description: Trigger generation
|
||||||
bit_offset: 6
|
bit_offset: 6
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/PSC_BASIC:
|
fieldset/PSC_CORE:
|
||||||
description: prescaler
|
description: prescaler
|
||||||
fields:
|
fields:
|
||||||
- name: PSC
|
- name: PSC
|
||||||
@ -1782,12 +1745,9 @@ fieldset/SMCR_GP16:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
enum: SMSPS
|
enum: SMSPS
|
||||||
fieldset/SR_1CH:
|
fieldset/SR_1CH:
|
||||||
|
extends: SR_CORE
|
||||||
description: status register
|
description: status register
|
||||||
fields:
|
fields:
|
||||||
- name: UIF
|
|
||||||
description: Update interrupt flag
|
|
||||||
bit_offset: 0
|
|
||||||
bit_size: 1
|
|
||||||
- name: CCIF
|
- name: CCIF
|
||||||
description: Capture/compare x (x=1) interrupt flag
|
description: Capture/compare x (x=1) interrupt flag
|
||||||
bit_offset: 1
|
bit_offset: 1
|
||||||
@ -1884,7 +1844,7 @@ fieldset/SR_ADV:
|
|||||||
description: Capture/compare 6 interrupt flag
|
description: Capture/compare 6 interrupt flag
|
||||||
bit_offset: 17
|
bit_offset: 17
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/SR_BASIC:
|
fieldset/SR_CORE:
|
||||||
description: status register
|
description: status register
|
||||||
fields:
|
fields:
|
||||||
- name: UIF
|
- name: UIF
|
||||||
@ -1892,7 +1852,7 @@ fieldset/SR_BASIC:
|
|||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/SR_GP16:
|
fieldset/SR_GP16:
|
||||||
extends: SR_BASIC
|
extends: SR_CORE
|
||||||
description: status register
|
description: status register
|
||||||
fields:
|
fields:
|
||||||
- name: CCIF
|
- name: CCIF
|
||||||
|
Loading…
x
Reference in New Issue
Block a user