add comparators to G0 and G4
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parent
82bbb78206
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675a67c3af
103
data/registers/comp_v1.yaml
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103
data/registers/comp_v1.yaml
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@ -0,0 +1,103 @@
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block/COMP:
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description: Comparator v1. (RM0444 18)
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items:
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- name: CSR
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description: Comparator control and status register.
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byte_offset: 0
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fieldset: CSR
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fieldset/CSR:
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description: Comparator control and status register.
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fields:
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- name: EN
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description: COMP enable bit.
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bit_offset: 0
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bit_size: 1
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- name: INMSEL
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description: Comparator signal selector for inverting input INM.
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bit_offset: 4
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bit_size: 4
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- name: INPSEL
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description: Comparator signal selector for non-inverting input INP.
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bit_offset: 8
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bit_size: 2
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- name: WINMODE
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description: Comparator non-inverting input selector for window mode.
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bit_offset: 11
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bit_size: 1
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- name: WINOUT
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description: Comparator output selector.
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bit_offset: 14
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bit_size: 1
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- name: POLARITY
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description: Comparator polarity selector.
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bit_offset: 15
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bit_size: 1
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enum: POLARITY
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- name: HYST
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description: Comparator hysteresis selector.
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bit_offset: 16
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bit_size: 2
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enum: HYST
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- name: PWRMODE
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description: Comparator power mode selector.
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bit_offset: 18
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bit_size: 2
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enum: PWRMODE
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- name: BLANKSEL
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description: Comparator blanking source selector.
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bit_offset: 20
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bit_size: 5
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enum: BLANKSEL
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- name: VALUE_DO_NOT_SET
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description: Comparator output status. (READ ONLY)
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bit_offset: 30
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bit_size: 1
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- name: LOCK
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description: CSR register lock.
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bit_offset: 31
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bit_size: 1
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enum/POLARITY:
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bit_size: 1
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variants:
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- name: NonInverted
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value: 0
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- name: Inverted
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value: 1
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enum/HYST:
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bit_size: 2
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variants:
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- name: None
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value: 0
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- name: Low
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value: 1
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- name: Medium
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value: 2
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- name: High
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value: 3
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enum/PWRMODE:
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bit_size: 2
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variants:
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- name: HighSpeed
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value: 0
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- name: MediumSpeed
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value: 1
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enum/BLANKSEL:
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bit_size: 5
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variants:
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- name: None
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value: 0
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- name: Tim1Oc4
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description: TIM1 OC4
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value: 1
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- name: Tim1Oc5
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description: TIM1 OC5
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value: 2
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- name: Tim2Oc3
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description: TIM2 OC3
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value: 4
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- name: Tim3Oc3
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description: TIM3 OC3
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value: 8
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- name: Tim15Oc2
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description: TIM15 OC2
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value: 16
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87
data/registers/comp_v2.yaml
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87
data/registers/comp_v2.yaml
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@ -0,0 +1,87 @@
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block/COMP:
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description: Comparator v2. (RM0440 24)
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items:
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- name: CSR
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description: Comparator control and status register.
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byte_offset: 0
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fieldset: CSR
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fieldset/CSR:
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description: Comparator control and status register.
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fields:
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- name: EN
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description: COMP enable bit.
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bit_offset: 0
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bit_size: 1
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- name: INMSEL
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description: Comparator signal selector for inverting input INM. (RM0440 24.3.2 Table 197)
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bit_offset: 4
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bit_size: 3
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- name: INPSEL
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description: Comparator signal selector for non-inverting input INP. (RM0440 24.3.2 Table 196)
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bit_offset: 8
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bit_size: 1
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- name: POLARITY
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description: Comparator polarity selector.
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bit_offset: 15
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bit_size: 1
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enum: POLARITY
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- name: HYST
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description: Comparator hysteresis selector.
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bit_offset: 16
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bit_size: 3
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enum: HYST
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- name: BLANKSEL
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description: Comparator blanking source selector. (RM0440 24.3.6 Table 198)
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bit_offset: 19
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bit_size: 3
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- name: BRGEN
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description: Vrefint resistor bridge enable. (RM0440 24.6)
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bit_offset: 22
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bit_size: 1
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- name: SCALEN
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description: Vrefint scaled input enable. (RM0440 24.6)
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bit_offset: 23
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bit_size: 1
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- name: VALUE_DO_NOT_SET
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description: Comparator output status. (READ ONLY)
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bit_offset: 30
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bit_size: 1
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- name: LOCK
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description: CSR register lock.
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bit_offset: 31
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bit_size: 1
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enum/POLARITY:
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bit_size: 1
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variants:
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- name: NonInverted
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description: Non-inverted polarity
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value: 0
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- name: Inverted
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description: Inverted polarity
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value: 1
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enum/HYST:
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bit_size: 3
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variants:
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- name: None
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value: 0
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- name: Hyst10m
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description: 10mV hysteresis
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value: 1
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- name: Hyst20m
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description: 20mV hysteresis
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value: 2
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- name: Hyst30m
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description: 30mV hysteresis
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value: 3
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- name: Hyst40m
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description: 40mV hysteresis
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value: 4
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- name: Hyst50m
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description: 50mV hysteresis
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value: 5
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- name: Hyst60m
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description: 60mV hysteresis
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value: 6
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- name: Hyst70m
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description: 70mV hysteresis
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value: 7
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@ -523,6 +523,8 @@ impl PeriMatcher {
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("STM32U5.*:TSC:.*", ("tsc", "v3", "TSC")),
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("STM32U5.*:TSC:.*", ("tsc", "v3", "TSC")),
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("*:VREFINTCAL:.*", ("vrefintcal", "v1", "VREFINTCAL")),
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("*:VREFINTCAL:.*", ("vrefintcal", "v1", "VREFINTCAL")),
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("STM32U5.*:ADF[12]:.*", ("adf", "v1", "ADF")),
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("STM32U5.*:ADF[12]:.*", ("adf", "v1", "ADF")),
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("STM32G0.*1.*:.*:COMP:.*", ("comp", "v1", "COMP")),
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("STM32G4.*:.*:COMP:.*", ("comp", "v2", "COMP")),
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];
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];
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Self {
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Self {
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