Merge pull request #280 from xoviat/rcc

rcc: rename h5 clock enum variants and add check

data/registers/rcc_h5.yaml

@@ -2245,7 +2245,7 @@ enum/HSIDIV:
 enum/ICSEL:
   bit_size: 2
   variants:
-  - name: RCC_PCLK1
+  - name: APB1
     description: rcc_pclk1 selected as peripheral clock
     value: 0
   - name: PLL3_R
@@ -2260,7 +2260,7 @@ enum/ICSEL:
 enum/LPTIMSEL:
   bit_size: 3
   variants:
-  - name: RCC_PCLK3
+  - name: APB3
     description: rcc_pclk3 selected as peripheral clock
     value: 0
   - name: PLL2_P
@@ -2281,7 +2281,7 @@ enum/LPTIMSEL:
 enum/LPUARTSEL:
   bit_size: 3
   variants:
-  - name: RCC_PCLK3
+  - name: APB3
     description: rcc_pclk3 selected as kernel clock (default after reset)
     value: 0
   - name: PLL2_Q
@@ -4030,7 +4030,7 @@ enum/SPI3SEL:
 enum/SPI4SEL:
   bit_size: 3
   variants:
-  - name: RCC_PCLK2
+  - name: APB2
     description: rcc_pclk2 selected as kernel clock (default after reset)
     value: 0
   - name: PLL2_Q
@@ -4051,7 +4051,7 @@ enum/SPI4SEL:
 enum/SPI5SEL:
   bit_size: 3
   variants:
-  - name: RCC_PCLK3
+  - name: APB3
     description: rcc_pclk3 selected as kernel clock (default after reset)
     value: 0
   - name: PLL2_Q
@@ -4162,7 +4162,7 @@ enum/TIMPRE:
 enum/UARTSEL:
   bit_size: 3
   variants:
-  - name: RCC_PCLK1
+  - name: APB1
     description: rcc_pclk1 selected as peripheral clock
     value: 0
   - name: PLL2_Q
@@ -4183,7 +4183,7 @@ enum/UARTSEL:
 enum/USARTSEL:
   bit_size: 3
   variants:
-  - name: RCC_PCLK2
+  - name: APB2
     description: rcc_pclk2 selected as peripheral clock
     value: 0
   - name: PLL2_Q

stm32-data-gen/src/rcc.rs

@@ -1,4 +1,7 @@
-use std::collections::HashMap;
+use std::collections::{HashMap, HashSet};
+
+use anyhow::{anyhow, Ok};
+use chiptool::ir::{BlockItemInner, Enum};
 
 use crate::regex;
 use crate::registers::Registers;
@@ -14,6 +17,59 @@ impl PeripheralToClock {
 
         for (rcc_name, ir) in &registers.registers {
             if let Some(rcc_name) = rcc_name.strip_prefix("rcc_") {
+                let checked_rccs = HashSet::from(["h5"]);
+                let prohibited_variants = HashSet::from(["RCC_PCLK3", "RCC_PCLK2", "RCC_PCLK1"]);
+
+                let rcc_enum_map: HashMap<&String, HashMap<&String, &Enum>> = {
+                    let rcc_blocks = &ir.blocks.get("RCC").unwrap().items;
+
+                    rcc_blocks
+                        .iter()
+                        .filter_map(|b| match &b.inner {
+                            BlockItemInner::Register(register) => register.fieldset.as_ref().map(|f| {
+                                let f = ir.fieldsets.get(f).unwrap();
+                                (
+                                    &b.name,
+                                    f.fields
+                                        .iter()
+                                        .filter_map(|f| {
+                                            let enumm = f.enumm.as_ref()?;
+                                            let enumm = ir.enums.get(enumm)?;
+
+                                            Some((&f.name, enumm))
+                                        })
+                                        .collect(),
+                                )
+                            }),
+                            _ => None,
+                        })
+                        .collect()
+                };
+
+                let check_mux = |register: &String, field: &String| -> Result<(), anyhow::Error> {
+                    if !checked_rccs.contains(&rcc_name) {
+                        return Ok(());
+                    }
+
+                    let block_map = match rcc_enum_map.get(register) {
+                        Some(block_map) => block_map,
+                        _ => return Ok(()),
+                    };
+
+                    let enumm = match block_map.get(field) {
+                        Some(enumm) => enumm,
+                        _ => return Ok(()),
+                    };
+
+                    for v in &enumm.variants {
+                        if prohibited_variants.contains(v.name.as_str()) {
+                            return Err(anyhow!("rcc: prohibited variant name",));
+                        }
+                    }
+
+                    Ok(())
+                };
+
                 let mut family_muxes = HashMap::new();
                 for (reg, body) in &ir.fieldsets {
                     let key = format!("fieldset/{reg}");
@@ -24,6 +80,8 @@ impl PeripheralToClock {
                                     continue;
                                 }
 
+                                check_mux(reg, &field.name)?;
+
                                 family_muxes.insert(
                                     peri.to_string(),
                                     stm32_data_serde::chip::core::peripheral::rcc::Mux {