From 52bc9ebf70e700f97514435793b65656705cf952 Mon Sep 17 00:00:00 2001
From: Ulf Lilleengen <ulf.lilleengen@gmail.com>
Date: Thu, 27 May 2021 12:44:29 +0200
Subject: [PATCH] Add SPIv2 block to STM32l0

---
 parse.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/parse.py b/parse.py
index fd1c282..da956fb 100644
--- a/parse.py
+++ b/parse.py
@@ -231,6 +231,7 @@ perimap = [
     ('.*:RNG:rng1_v3_1', 'rng_v1/RNG'),
     ('.*:SPI:spi2s1_v2_2', 'spi_v1/SPI'),
     ('.*:SPI:spi2s1_v3_3', 'spi_v2/SPI'),
+    ('.*:SPI:spi2s1_v3_1', 'spi_v2/SPI'),
     ('.*:SPI:spi2s2_v1_1', 'spi_v3/SPI'),
     ('.*:SPI:spi2s2_v1_0', 'spi_v3/SPI'),
     ('.*:I2C:i2c1_v1_5', 'i2c_v1/I2C'),