more complete rcc info: clock, and enable/reset registers
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f93860b894
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@ -626,16 +626,8 @@ def parse_chips():
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'address': addr,
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})
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peri_clock = None
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if chip_name.startswith('STM32G0') and pname.startswith('TIM'):
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peri_clock = 'APB'
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elif chip_name.startswith('STM32G0') and pname.startswith('SYSCFG'):
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peri_clock = 'APB'
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else:
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peri_clock = match_peri_clock(rcc_block, pname)
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if peri_clock is not None:
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p['clock'] = peri_clock
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if rcc_info := match_peri_clock(rcc_block, pname):
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p['rcc'] = rcc_info
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if block := match_peri(chip_name + ':' + pname + ':' + pkind):
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p['block'] = block
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@ -1029,24 +1021,38 @@ def parse_rcc_regs():
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family_clocks = {}
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with open(f, 'r') as yaml_file:
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y = yaml.load(yaml_file)
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for (key, body) in y.items():
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if 'SMENR' in key:
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continue
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if m := re.match('^fieldset/(A[PH]B\d?)ENR\d?$', key):
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if m := re.match('^fieldset/(A[PH]B\d?)[LH]?ENR\d?$', key):
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reg = removeprefix(key, 'fieldset/')
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clock = m.group(1)
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for field in body['fields']:
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if field['name'].endswith('EN'):
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peri = removesuffix(field['name'], 'EN')
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family_clocks[peri] = clock
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regs = {
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'enable': OrderedDict({
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'register': reg,
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'field': field['name'],
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})
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}
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if rstr := y[key.replace('ENR', 'RSTR')]:
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if field := next(filter(lambda f: f['name'] == f'{peri}RST', rstr['fields']), None):
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regs['reset'] = OrderedDict({
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'register': reg.replace('ENR', 'RSTR'),
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'field': f'{peri}RST',
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})
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family_clocks[peri] = {
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'clock': clock,
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'registers': regs
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}
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peripheral_to_clock['rcc_' + ff + '/RCC'] = family_clocks
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def match_peri_clock(rcc_block, peri_name):
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if rcc_block in peripheral_to_clock:
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family_clocks = peripheral_to_clock[rcc_block]
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if peri_name in family_clocks:
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return family_clocks[peri_name]
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# print("found no clock for ", peri_name)
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if res := peripheral_to_clock[rcc_block].get(peri_name):
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return res
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if peri_name.endswith("1"):
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return match_peri_clock(rcc_block, removesuffix(peri_name, "1"))
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return None
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