rcc/c0: fix HSI -> HSISYS/HSIKER

data/registers/rcc_c0.yaml

@@ -688,7 +688,7 @@ enum/ADCSEL:
   - name: SYS
     description: System clock
     value: 0
-  - name: HSI
+  - name: HSIKER
     description: HSIKER
     value: 2
 enum/HPRE:
@@ -784,7 +784,7 @@ enum/I2C1SEL:
   - name: SYS
     description: SYSCLK
     value: 1
-  - name: HSI
+  - name: HSIKER
     description: HSIKER
     value: 2
 enum/I2S1SEL:
@@ -793,7 +793,7 @@ enum/I2S1SEL:
   - name: SYS
     description: SYSCLK
     value: 0
-  - name: HSI
+  - name: HSIKER
     description: HSIKER
     value: 2
   - name: I2S_CKIN
@@ -907,8 +907,8 @@ enum/RTCSEL:
 enum/SW:
   bit_size: 3
   variants:
-  - name: HSI
-    description: HSI selected as system clock
+  - name: HSISYS
+    description: HSISYS (HSI divided by HSIDIV) selected as system clock
     value: 0
   - name: HSE
     description: HSE selected as system clock
@@ -955,7 +955,7 @@ enum/USART1SEL:
   - name: SYS
     description: SYSCLK
     value: 1
-  - name: HSI
+  - name: HSIKER
     description: HSIKER
     value: 2
   - name: LSE

stm32-data-gen/src/rcc.rs

@@ -95,6 +95,7 @@ impl ParsedRccs {
             "HSI",
             "SHSI",
             "HSI48",
+            "HSIKER",
             "LSI",
             "CSI",
             "MSI",