Add cordic to all MCUs that have it. Read/write WDATA/RDATA directly for ease of use

data/registers/cordic_v1.yaml

@@ -8,11 +8,13 @@ block/CORDIC:
   - name: WDATA
     description: Argument register.
     byte_offset: 4
-    fieldset: WDATA
+    bit_offset: 0
+    bit_size: 32
   - name: RDATA
     description: Result register.
     byte_offset: 8
-    fieldset: RDATA
+    bit_offset: 0
+    bit_size: 32
 fieldset/CSR:
   description: Control and status register.
   fields:
@@ -66,21 +68,6 @@ fieldset/CSR:
     description: Result ready flag.
     bit_offset: 31
     bit_size: 1
-    enum: RRDY
-fieldset/RDATA:
-  description: Result register.
-  fields:
-  - name: RES
-    description: Function result.
-    bit_offset: 0
-    bit_size: 32
-fieldset/WDATA:
-  description: Argument register.
-  fields:
-  - name: ARG
-    description: Function input arguments.
-    bit_offset: 0
-    bit_size: 32
 enum/ARGSIZE:
   bit_size: 1
   variants:
@@ -198,12 +185,3 @@ enum/RESSIZE:
   - name: Bits16
     description: Use 16 bit output values.
     value: 1
-enum/RRDY:
-  bit_size: 1
-  variants:
-  - name: NotReady
-    description: Results from computation are not read.
-    value: 0
-  - name: Ready
-    description: Results are ready, this flag will be automatically cleared once value is read.
-    value: 1

stm32-data-gen/src/chips.rs

@@ -514,7 +514,7 @@ impl PeriMatcher {
             ("STM32L4.*:GFXMMU:.*", ("gfxmmu", "v1", "GFXMMU")),
             ("STM32U5.*:GFXMMU:.*", ("gfxmmu", "v2", "GFXMMU")),
             ("STM32U5.*:ICACHE:.*", ("icache", "v1", "ICACHE")),
-            ("STM32U5.*:CORDIC:.*", ("cordic", "v1", "CORDIC")),
+            (".*:CORDIC:.*", ("cordic", "v1", "CORDIC")),
             ("STM32F0x[128].*:TSC:.*", ("tsc", "v1", "TSC")),
             ("STM32F3[07][123].*:TSC:.*", ("tsc", "v1", "TSC")),
             ("STM32WB55.*:TSC:.*", ("tsc", "v2", "TSC")),