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Detect GPIO enable/reset registers on chips with separate bus for GPIO

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This commit is contained in:
Ulf Lilleengen 2021-12-02 11:17:52 +01:00
parent cf665a99f3
commit 57c7058739
1 changed files with 3 additions and 1 deletions
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4
stm32data/__main__.py
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@ -1037,7 +1037,9 @@ def parse_rcc_regs():
y = yaml.load(yaml_file)
for (key, body) in y.items():
if m := re.match('^fieldset/(A[PH]B\d?)[LH]?ENR\d?$', key):
# Some chip families have a separate bus for GPIO so its note attached to the AHB/APB
# bus but an IOPORT bus. Use the IOP as the clock for these chips
if m := re.match('^fieldset/((A[PH]B\d?)|IOP)[LH]?ENR\d?$', key):
reg = removeprefix(key, 'fieldset/')
clock = m.group(1)
for field in body['fields']: