apply chiptool transform

This commit is contained in:
eZio Pan 2024-02-18 19:05:10 +08:00
parent ca48d94684
commit 5256872a43
3 changed files with 63 additions and 79 deletions

View File

@ -272,57 +272,30 @@ fieldset/PDMCR:
description: Number of microphones
bit_offset: 4
bit_size: 2
- name: CKEN1
- name: CKEN
description: Clock enable of bitstream clock number 1
bit_offset: 8
bit_size: 1
- name: CKEN2
description: Clock enable of bitstream clock number 2
bit_offset: 9
bit_size: 1
- name: CKEN3
description: Clock enable of bitstream clock number 3
bit_offset: 10
bit_size: 1
- name: CKEN4
description: Clock enable of bitstream clock number 4
bit_offset: 11
bit_size: 1
array:
len: 4
stride: 1
fieldset/PDMDLY:
description: PDM delay register
fields:
- name: DLYM1L
- name: DLYML
description: Delay line adjust for first microphone of pair 1
bit_offset: 0
bit_size: 3
- name: DLYM1R
array:
len: 4
stride: 8
- name: DLYMR
description: Delay line adjust for second microphone of pair 1
bit_offset: 4
bit_size: 3
- name: DLYM2L
description: Delay line for first microphone of pair 2
bit_offset: 8
bit_size: 3
- name: DLYM2R
description: Delay line for second microphone of pair 2
bit_offset: 12
bit_size: 3
- name: DLYM3L
description: Delay line for first microphone of pair 3
bit_offset: 16
bit_size: 3
- name: DLYM3R
description: Delay line for second microphone of pair 3
bit_offset: 20
bit_size: 3
- name: DLYM4L
description: Delay line for first microphone of pair 4
bit_offset: 24
bit_size: 3
- name: DLYM4R
description: Delay line for second microphone of pair 4
bit_offset: 28
bit_size: 3
array:
len: 4
stride: 8
fieldset/SLOTR:
description: This register has no meaning in AC97 and SPDIF audio protocol
fields:

View File

@ -276,57 +276,30 @@ fieldset/PDMCR:
description: Number of microphones
bit_offset: 4
bit_size: 2
- name: CKEN1
- name: CKEN
description: Clock enable of bitstream clock number 1
bit_offset: 8
bit_size: 1
- name: CKEN2
description: Clock enable of bitstream clock number 2
bit_offset: 9
bit_size: 1
- name: CKEN3
description: Clock enable of bitstream clock number 3
bit_offset: 10
bit_size: 1
- name: CKEN4
description: Clock enable of bitstream clock number 4
bit_offset: 11
bit_size: 1
array:
len: 4
stride: 1
fieldset/PDMDLY:
description: PDM delay register
fields:
- name: DLYM1L
- name: DLYML
description: Delay line adjust for first microphone of pair 1
bit_offset: 0
bit_size: 3
- name: DLYM1R
array:
len: 4
stride: 8
- name: DLYMR
description: Delay line adjust for second microphone of pair 1
bit_offset: 4
bit_size: 3
- name: DLYM2L
description: Delay line for first microphone of pair 2
bit_offset: 8
bit_size: 3
- name: DLYM2R
description: Delay line for second microphone of pair 2
bit_offset: 12
bit_size: 3
- name: DLYM3L
description: Delay line for first microphone of pair 3
bit_offset: 16
bit_size: 3
- name: DLYM3R
description: Delay line for second microphone of pair 3
bit_offset: 20
bit_size: 3
- name: DLYM4L
description: Delay line for first microphone of pair 4
bit_offset: 24
bit_size: 3
- name: DLYM4R
description: Delay line for second microphone of pair 4
bit_offset: 28
bit_size: 3
array:
len: 4
stride: 8
fieldset/SLOTR:
description: This register has no meaning in AC97 and SPDIF audio protocol
fields:

View File

@ -1,3 +1,41 @@
transforms:
- !MergeEnums
from: ^[AB](.*)
to: $1
- !Rename
from: ^(.+?)_(.+)
to: $2
- !DeleteEnums
from: ^(C?AFSDET(IE)?|CCNRDY|CNRDYIE|COVRUDR|CWCKCFG|DMAEN|FFLUSH|FREQ(IE)?|C?LFSDET(IE)?|MUTE|C?MUTEDET(IE)?|OVRUDR(IE)?|SAIEN|WCKCFGIE)$
from: ^(C?A?FSDET(IE)?|CCNRDY(IE)?|CNRDYIE|C?OVRUDR|CWCKCFG(IE)?|WCKCFGIE|DMAEN|FFLUSH|FREQ(IE)?|C?LFSDET(IE)?|MUTE|C?MUTEDET(IE)?|OVRUDR(IE)?|SAIEN)$
bit_size: 1
- !MergeFieldsets
from: ^[AB](.*)
to: $1
- !MakeFieldArray
fieldsets: PDMCR
from: CKEN\d
to: CKEN
- !MakeFieldArray
fieldsets: PDMDLY
from: DLYM\d(L|R)
to: DLYM$1
- !MakeBlock
blocks: SAI\d
from: ^(A|B)(.+)
to_outer: $1
to_inner: $2
to_block: CH
- !MakeRegisterArray
blocks: SAI\d
from: ^(A|B)$
to: CH
- !Rename
from: ^SAI\d$
to: SAI