Add opamp and rtc
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Dion Dokter
parent
a4d4695635
commit
50f329f131
186
data/registers/opamp_u0.yaml
Normal file
186
data/registers/opamp_u0.yaml
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@ -0,0 +1,186 @@
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block/OPAMP:
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description: OPAMP address block description.
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items:
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- name: CSR
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description: OPAMP control/status register.
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byte_offset: 0
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fieldset: CSR
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- name: OTR
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description: OPAMP offset trimming register in normal mode.
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byte_offset: 4
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fieldset: OTR
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- name: LPOTR
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description: OPAMP offset trimming register in low-power mode.
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byte_offset: 8
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fieldset: LPOTR
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fieldset/CSR:
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description: OPAMP control/status register.
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fields:
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- name: OPAMPEN
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description: Operational amplifier Enable.
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bit_offset: 0
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bit_size: 1
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- name: OPALPM
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description: Operational amplifier Low Power Mode. The operational amplifier must be disable to change this configuration.
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bit_offset: 1
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bit_size: 1
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enum: OPALPM
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- name: OPAMODE
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description: Operational amplifier PGA mode.
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bit_offset: 2
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bit_size: 2
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enum: OPAMODE
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- name: PGA_GAIN
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description: Operational amplifier Programmable amplifier gain value.
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bit_offset: 4
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bit_size: 2
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enum: PGA_GAIN
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- name: VM_SEL
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description: 'Inverting input selection. These bits are used only when OPAMODE = 00, 01 or 10. 1x: Inverting input not externally connected. These configurations are valid only when OPAMODE = 10 (PGA mode).'
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bit_offset: 8
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bit_size: 2
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enum: VM_SEL
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- name: VP_SEL
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description: Non inverted input selection.
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bit_offset: 10
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bit_size: 1
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enum: VP_SEL
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- name: CALON
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description: Calibration mode enabled.
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bit_offset: 12
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bit_size: 1
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enum: CALON
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- name: CALSEL
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description: Calibration selection.
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bit_offset: 13
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bit_size: 1
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enum: CALSEL
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- name: USERTRIM
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description: allows to switch from factory AOP offset trimmed values to AOP offset user trimmed values This bit is active for both mode normal and low-power.
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bit_offset: 14
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bit_size: 1
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enum: USERTRIM
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- name: CALOUT
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description: Operational amplifier calibration output During calibration mode offset is trimmed when this signal toggle.
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bit_offset: 15
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bit_size: 1
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- name: OPA_RANGE
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description: Operational amplifier power supply range for stability All AOP must be in power down to allow AOP-RANGE bit write. It applies to all AOP embedded in the product.
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bit_offset: 31
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bit_size: 1
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enum: OPA_RANGE
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fieldset/LPOTR:
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description: OPAMP offset trimming register in low-power mode.
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fields:
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- name: TRIMLPOFFSETN
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description: Low-power mode trim for NMOS differential pairs.
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bit_offset: 0
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bit_size: 5
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- name: TRIMLPOFFSETP
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description: Low-power mode trim for PMOS differential pairs.
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bit_offset: 8
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bit_size: 5
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fieldset/OTR:
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description: OPAMP offset trimming register in normal mode.
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fields:
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- name: TRIMOFFSETN
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description: Trim for NMOS differential pairs.
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bit_offset: 0
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bit_size: 5
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- name: TRIMOFFSETP
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description: Trim for PMOS differential pairs.
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bit_offset: 8
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bit_size: 5
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enum/CALON:
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bit_size: 1
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variants:
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- name: Normal
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description: Normal mode.
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value: 0
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- name: Calibration
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description: Calibration mode (all switches opened by HW).
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value: 1
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enum/CALSEL:
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bit_size: 1
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variants:
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- name: NMOS
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description: NMOS calibration (200mV applied on OPAMP inputs).
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value: 0
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- name: PMOS
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description: PMOS calibration (VDDA-200mV applied on OPAMP inputs).
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value: 1
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enum/OPALPM:
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bit_size: 1
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variants:
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- name: Normal
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description: operational amplifier in normal mode.
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value: 0
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- name: LowPower
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description: operational amplifier in low-power mode.
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value: 1
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enum/OPAMODE:
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bit_size: 2
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variants:
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- name: Disable
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description: internal PGA disable.
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value: 0
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- name: Disable2
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description: internal PGA disable. (Duplicate)
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value: 1
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- name: Enable
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description: internal PGA enable, gain programmed in PGA_GAIN.
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value: 2
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- name: Follower
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description: internal follower.
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value: 3
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enum/OPA_RANGE:
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bit_size: 1
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variants:
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- name: Low
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description: Low range (VDDA < 2.4V).
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value: 0
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- name: High
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description: High range (VDDA > 2.4V).
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value: 1
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enum/PGA_GAIN:
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bit_size: 2
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variants:
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- name: Gain2
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description: internal PGA Gain 2.
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value: 0
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- name: Gain4
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description: internal PGA Gain 4.
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value: 1
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- name: Gain8
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description: internal PGA Gain 8.
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value: 2
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- name: Gain16
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description: internal PGA Gain 16.
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value: 3
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enum/USERTRIM:
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bit_size: 1
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variants:
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- name: Factory
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description: Factory trim code used.
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value: 0
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- name: User
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description: User trim code used.
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value: 1
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enum/VM_SEL:
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bit_size: 2
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variants:
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- name: VINM
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description: GPIO connected to VINM (valid also in PGA mode for filtering).
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value: 0
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- name: NotConnected
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description: Inverting input not externally connected. These configurations are valid only when OPAMODE = 10 (PGA mode)
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value: 2
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enum/VP_SEL:
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bit_size: 1
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variants:
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- name: VINP
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description: GPIO connected to VINP.
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value: 0
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- name: DAC
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description: DAC connected to VINP.
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value: 1
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@ -236,6 +236,7 @@ impl PeriMatcher {
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("STM32F3.*:OPAMP:tsmc018_ull_opamp_v1_0", ("opamp", "f3", "OPAMP")),
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("STM32F3.*:OPAMP:tsmc018_ull_opamp_v1_0", ("opamp", "f3", "OPAMP")),
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("STM32H7.*:OPAMP:.*", ("opamp", "h_v1", "OPAMP")),
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("STM32H7.*:OPAMP:.*", ("opamp", "h_v1", "OPAMP")),
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("STM32H5.*:OPAMP:.*", ("opamp", "h_v2", "OPAMP")),
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("STM32H5.*:OPAMP:.*", ("opamp", "h_v2", "OPAMP")),
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("STM32U0.*:OPAMP:.*", ("opamp", "u0", "OPAMP")),
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(".*:DCMI:.*", ("dcmi", "v1", "DCMI")),
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(".*:DCMI:.*", ("dcmi", "v1", "DCMI")),
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("STM32C0.*:SYSCFG:.*", ("syscfg", "c0", "SYSCFG")),
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("STM32C0.*:SYSCFG:.*", ("syscfg", "c0", "SYSCFG")),
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("STM32F0.*:SYSCFG:.*", ("syscfg", "f0", "SYSCFG")),
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("STM32F0.*:SYSCFG:.*", ("syscfg", "f0", "SYSCFG")),
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@ -291,6 +292,7 @@ impl PeriMatcher {
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(".*:RTC:rtc3_v1_1", ("rtc", "v3", "RTC")),
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(".*:RTC:rtc3_v1_1", ("rtc", "v3", "RTC")),
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(".*:RTC:rtc3_v2_0", ("rtc", "v3", "RTC")),
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(".*:RTC:rtc3_v2_0", ("rtc", "v3", "RTC")),
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(".*:RTC:rtc3_v3_0", ("rtc", "v3", "RTC")),
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(".*:RTC:rtc3_v3_0", ("rtc", "v3", "RTC")),
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(".*:RTC:rtc3_v3_5", ("rtc", "v3", "RTC")),
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(".*:SAI:sai1_v1_0", ("sai", "v1", "SAI")),
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(".*:SAI:sai1_v1_0", ("sai", "v1", "SAI")),
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(".*:SAI:sai1_v1_1", ("sai", "v2", "SAI")),
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(".*:SAI:sai1_v1_1", ("sai", "v2", "SAI")),
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(".*:SAI:sai1_v1_2", ("sai", "v2", "SAI")),
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(".*:SAI:sai1_v1_2", ("sai", "v2", "SAI")),
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