diff --git a/data/registers/pwr_l4.yaml b/data/registers/pwr_l4.yaml
new file mode 100644
index 0000000..a5a497e
--- /dev/null
+++ b/data/registers/pwr_l4.yaml
@@ -0,0 +1,413 @@
+---
+block/PWR:
+  description: Power control
+  items:
+    - name: CR1
+      description: Power control register 1
+      byte_offset: 0
+      fieldset: CR1
+    - name: CR2
+      description: Power control register 2
+      byte_offset: 4
+      fieldset: CR2
+    - name: CR3
+      description: Power control register 3
+      byte_offset: 8
+      fieldset: CR3
+    - name: CR4
+      description: Power control register 4
+      byte_offset: 12
+      fieldset: CR4
+    - name: SR1
+      description: Power status register 1
+      byte_offset: 16
+      access: Read
+      fieldset: SR1
+    - name: SR2
+      description: Power status register 2
+      byte_offset: 20
+      access: Read
+      fieldset: SR2
+    - name: SCR
+      description: Power status clear register
+      byte_offset: 24
+      access: Write
+      fieldset: SCR
+    - name: PUCR
+      description: Power Port A pull-up control register
+      array:
+        len: 8
+        stride: 8
+      byte_offset: 32
+      fieldset: PCR
+    - name: PDCR
+      description: Power Port A pull-down control register
+      array:
+        len: 8
+        stride: 8
+      byte_offset: 36
+      fieldset: PCR
+fieldset/CR1:
+  description: Power control register 1
+  fields:
+    - name: LPMS
+      description: Low-power mode selection
+      bit_offset: 0
+      bit_size: 3
+      enum: LPMS
+    - name: DBP
+      description: Disable backup domain write protection
+      bit_offset: 8
+      bit_size: 1
+      enum: DBP
+    - name: VOS
+      description: Voltage scaling range selection
+      bit_offset: 9
+      bit_size: 2
+      enum: VOS
+    - name: LPR
+      description: Low-power run
+      bit_offset: 14
+      bit_size: 1
+      enum: LPR
+fieldset/CR2:
+  description: Power control register 2
+  fields:
+    - name: PVDE
+      description: Power voltage detector enable
+      bit_offset: 0
+      bit_size: 1
+      enum: PVDE
+    - name: PLS
+      description: Power voltage detector level selection
+      bit_offset: 1
+      bit_size: 3
+      enum: PLS
+    - name: PVME1
+      description: "Peripheral voltage monitoring 1 enable: VDDUSB vs. 1.2V"
+      bit_offset: 4
+      bit_size: 1
+      enum: PVME
+    - name: PVME2
+      description: "Peripheral voltage monitoring 2 enable: VDDIO2 vs. 0.9V"
+      bit_offset: 5
+      bit_size: 1
+      enum: PVME
+    - name: PVME3
+      description: "Peripheral voltage monitoring 3 enable: VDDA vs. 1.62V"
+      bit_offset: 6
+      bit_size: 1
+      enum: PVME
+    - name: PVME4
+      description: "Peripheral voltage monitoring 4 enable: VDDA vs. 2.2V"
+      bit_offset: 7
+      bit_size: 1
+      enum: PVME
+    - name: IOSV
+      description: VDDIO2 Independent I/Os supply valid
+      bit_offset: 9
+      bit_size: 1
+      enum: IOSV
+    - name: USV
+      description: VDDUSB USB supply valid
+      bit_offset: 10
+      bit_size: 1
+      enum: USV
+fieldset/CR3:
+  description: Power control register 3
+  fields:
+    - name: EWUP
+      description: Enable Wakeup pin WKUP
+      bit_offset: 0
+      bit_size: 1
+      array:
+        len: 5
+        stride: 1
+      enum: EWUP
+    - name: RRS
+      description: SRAM2 retention in Standby mode
+      bit_offset: 8
+      bit_size: 1
+      enum: RRS
+    - name: APC
+      description: Apply pull-up and pull-down configuration
+      bit_offset: 10
+      bit_size: 1
+      enum: APC
+    - name: EWF
+      description: Enable internal wakeup line
+      bit_offset: 15
+      bit_size: 1
+      enum: EWF
+fieldset/CR4:
+  description: Power control register 4
+  fields:
+    - name: WP1
+      description: Wakeup pin WKUP1 polarity
+      bit_offset: 0
+      bit_size: 1
+    - name: WP2
+      description: Wakeup pin WKUP2 polarity
+      bit_offset: 1
+      bit_size: 1
+    - name: WP3
+      description: Wakeup pin WKUP3 polarity
+      bit_offset: 2
+      bit_size: 1
+    - name: WP4
+      description: Wakeup pin WKUP4 polarity
+      bit_offset: 3
+      bit_size: 1
+    - name: WP5
+      description: Wakeup pin WKUP5 polarity
+      bit_offset: 4
+      bit_size: 1
+    - name: VBE
+      description: VBAT battery charging enable
+      bit_offset: 8
+      bit_size: 1
+    - name: VBRS
+      description: VBAT battery charging resistor selection
+      bit_offset: 9
+      bit_size: 1
+fieldset/PCR:
+  description: Power Port pull control register
+  fields:
+    - name: P
+      description: Port pull bit y (y=0..15)
+      bit_offset: 0
+      bit_size: 1
+      array:
+        len: 16
+        stride: 1
+fieldset/SCR:
+  description: Power status clear register
+  fields:
+    - name: CWUF
+      description: Clear wakeup flag
+      bit_offset: 0
+      bit_size: 1
+      array:
+        len: 5
+        stride: 1
+      enum_write: CWUFW
+    - name: SBF
+      description: Clear standby flag
+      bit_offset: 8
+      bit_size: 1
+fieldset/SR1:
+  description: Power status register 1
+  fields:
+    - name: CWUF1
+      description: Wakeup flag 1
+      bit_offset: 0
+      bit_size: 1
+    - name: CWUF2
+      description: Wakeup flag 2
+      bit_offset: 1
+      bit_size: 1
+    - name: CWUF3
+      description: Wakeup flag 3
+      bit_offset: 2
+      bit_size: 1
+    - name: CWUF4
+      description: Wakeup flag 4
+      bit_offset: 3
+      bit_size: 1
+    - name: CWUF5
+      description: Wakeup flag 5
+      bit_offset: 4
+      bit_size: 1
+    - name: CSBF
+      description: Standby flag
+      bit_offset: 8
+      bit_size: 1
+    - name: WUFI
+      description: Wakeup flag internal
+      bit_offset: 15
+      bit_size: 1
+fieldset/SR2:
+  description: Power status register 2
+  fields:
+    - name: REGLPS
+      description: Low-power regulator started
+      bit_offset: 8
+      bit_size: 1
+    - name: REGLPF
+      description: Low-power regulator flag
+      bit_offset: 9
+      bit_size: 1
+    - name: VOSF
+      description: Voltage scaling flag
+      bit_offset: 10
+      bit_size: 1
+    - name: PVDO
+      description: Power voltage detector output
+      bit_offset: 11
+      bit_size: 1
+    - name: PVMO1
+      description: "Peripheral voltage monitoring output: VDDUSB vs. 1.2 V"
+      bit_offset: 12
+      bit_size: 1
+    - name: PVMO2
+      description: "Peripheral voltage monitoring output: VDDIO2 vs. 0.9 V"
+      bit_offset: 13
+      bit_size: 1
+    - name: PVMO3
+      description: "Peripheral voltage monitoring output: VDDA vs. 1.62 V"
+      bit_offset: 14
+      bit_size: 1
+    - name: PVMO4
+      description: "Peripheral voltage monitoring output: VDDA vs. 2.2 V"
+      bit_offset: 15
+      bit_size: 1
+enum/LPMS:
+  bit_size: 3
+  variants:
+    - name: Stop0
+      description: Stop 0 mode
+      value: 0
+    - name: Stop1
+      description: Stop 1 mode
+      value: 1
+    - name: Stop2
+      description: Stop 2 mode
+      value: 2
+    - name: Standby
+      description: Standby mode
+      value: 3
+    - name: Shutdown
+      description: Shutdown mode
+      value: 4
+enum/DBP:
+  bit_size: 1
+  variants:
+    - name: Disabled
+      description: Access to RTC and backup registers disabled
+      value: 0
+    - name: Enabled
+      description: Access to RTC and backup registers enabled
+      value: 1
+enum/VOS:
+  bit_size: 2
+  variants:
+    - name: Range1
+      description: Range 1
+      value: 1
+    - name: Range2
+      description: Range 2
+      value: 2
+enum/LPR:
+  bit_size: 1
+  variants:
+    - name: MainMode
+      description: Voltage regulator in Main mode
+      value: 0
+    - name: LowPowerMode
+      description: Voltage regulator in low-power mode
+      value: 1
+enum/PVDE:
+  bit_size: 1
+  variants:
+    - name: Disabled
+      description: PVD Disabled
+      value: 0
+    - name: Enabled
+      description: PVD Enabled
+      value: 1
+enum/PLS:
+  bit_size: 3
+  variants:
+    - name: V2_0
+      description: 2.0V
+      value: 0
+    - name: V2_2
+      description: 2.2V
+      value: 1
+    - name: V2_4
+      description: 2.4V
+      value: 2
+    - name: V2_5
+      description: 2.5V
+      value: 3
+    - name: V2_6
+      description: 2.6V
+      value: 4
+    - name: V2_8
+      description: 2.8V
+      value: 5
+    - name: V2_9
+      description: 2.9V
+      value: 6
+    - name: External
+      description: External input analog voltage PVD_IN (compared internally to VREFINT)
+      value: 7
+enum/PVME:
+  bit_size: 1
+  variants:
+    - name: Disabled
+      description: Peripheral voltage monitoring disable
+      value: 0
+    - name: Enabled
+      description: Peripheral voltage monitoring enable
+      value: 1
+enum/IOSV:
+  bit_size: 1
+  variants:
+    - name: Invalid
+      description: VDDIO2 is not present. Logical and electrical isolation is applied to ignore this supply
+      value: 0
+    - name: Valid
+      description: VDDIO2 is valid
+      value: 1
+enum/USV:
+  bit_size: 1
+  variants:
+    - name: Invalid
+      description: VDDUSB is not present. Logical and electrical isolation is applied to ignore this supply
+      value: 0
+    - name: Valid
+      description: VDDUSB is valid
+      value: 1
+enum/EWUP:
+  bit_size: 1
+  variants:
+    - name: Disabled
+      description: WKUP pin x is used for general purpose I/Os. An event on the WKUP pin x does not wakeup the device from Standby mode
+      value: 0
+    - name: Enabled
+      description: WKUP pin x is used for wakeup from Standby mode and forced in input pull down configuration (rising edge on WKUP pin x wakes-up the system from Standby mode)
+      value: 1
+enum/RRS:
+  bit_size: 1
+  variants:
+    - name: PowerOff
+      description: SRAM2 powered off in Standby mode (SRAM2 content lost)
+      value: 0
+    - name: OnLPR
+      description: SRAM2 powered by the low-power regulator in Standby mode (SRAM2 content kept)
+      value: 1
+enum/APC:
+  bit_size: 1
+  variants:
+    - name: Disabled
+      description: PWR_PUCRx and PWR_PDCRx registers are NOT applied to the I/Os
+      value: 0
+    - name: Enabled
+      description: I/O pull-up and pull-down configurations defined in the PWR_PUCRx and PWR_PDCRx registers are applied
+      value: 1
+enum/EWF:
+  bit_size: 1
+  variants:
+    - name: Disabled
+      description: Internal wakeup line disable
+      value: 0
+    - name: Enabled
+      description: Internal wakeup line enable
+      value: 1
+enum/CWUFW:
+  bit_size: 1
+  variants:
+    - name: Clear
+      description: Setting this bit clears the WUF flag in the PWR_SR1 register. This bit is always read as 0.
+      value: 1
diff --git a/stm32data/__main__.py b/stm32data/__main__.py
index 3d31e96..0e77029 100755
--- a/stm32data/__main__.py
+++ b/stm32data/__main__.py
@@ -212,6 +212,7 @@ perimap = [
     ('STM32F4.*:PWR:.*', ('pwr', 'f4', 'PWR')),
     ('STM32F7.*:PWR:.*', ('pwr', 'f7', 'PWR')),
     ('STM32L1.*:PWR:.*', ('pwr', 'l1', 'PWR')),
+    ('STM32L4.*:PWR:.*', ('pwr', 'l4', 'PWR')),
     ('STM32U5.*:PWR:.*', ('pwr', 'u5', 'PWR')),
     ('STM32WL.*:PWR:.*', ('pwr', 'wl5', 'PWR')),
     ('STM32WB.*:PWR:.*', ('pwr', 'wb55', 'PWR')),