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Merge pull request #122 from chemicstry/usb_otg

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Fix missing USB OTG pins
This commit is contained in:
Dario Nieuwenhuis 2022-02-05 00:06:55 +01:00 committed by GitHub
commit 4a6d8b3206
7 changed files with 46 additions and 30 deletions
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4
data/registers/rcc_f1.yaml
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@ -81,7 +81,7 @@ fieldset/AHBENR:
description: SDIO clock enable
bit_offset: 10
bit_size: 1
- name: OTGFSEN
- name: USB_OTG_FSEN
description: USB OTG FS clock enable
bit_offset: 12
bit_size: 1
@ -100,7 +100,7 @@ fieldset/AHBENR:
fieldset/AHBRSTR:
description: AHB peripheral clock reset register (RCC_AHBRSTR)
fields:
- name: OTGFSRST
- name: USB_OTG_FSRST
description: USB OTG FS reset
bit_offset: 12
bit_size: 1

16
data/registers/rcc_f2.yaml
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@ -165,11 +165,11 @@ fieldset/AHB1ENR:
description: Ethernet PTP clock enable
bit_offset: 28
bit_size: 1
- name: OTGHSEN
- name: USB_OTG_HSEN
description: USB OTG HS clock enable
bit_offset: 29
bit_size: 1
- name: OTGHSULPIEN
- name: USB_OTG_HSULPIEN
description: USB OTG HSULPI clock enable
bit_offset: 30
bit_size: 1
@ -256,11 +256,11 @@ fieldset/AHB1LPENR:
description: Ethernet PTP clock enable during Sleep mode
bit_offset: 28
bit_size: 1
- name: OTGHSLPEN
- name: USB_OTG_HSLPEN
description: USB OTG HS clock enable during Sleep mode
bit_offset: 29
bit_size: 1
- name: OTGHSULPILPEN
- name: USB_OTG_HSULPILPEN
description: USB OTG HS ULPI clock enable during Sleep mode
bit_offset: 30
bit_size: 1
@ -319,7 +319,7 @@ fieldset/AHB1RSTR:
description: Ethernet MAC reset
bit_offset: 25
bit_size: 1
- name: OTGHSRST
- name: USB_OTG_HSRST
description: USB OTG HS module reset
bit_offset: 29
bit_size: 1
@ -342,7 +342,7 @@ fieldset/AHB2ENR:
description: Random number generator clock enable
bit_offset: 6
bit_size: 1
- name: OTGFSEN
- name: USB_OTG_FSEN
description: USB OTG FS clock enable
bit_offset: 7
bit_size: 1
@ -365,7 +365,7 @@ fieldset/AHB2LPENR:
description: Random number generator clock enable during Sleep mode
bit_offset: 6
bit_size: 1
- name: OTGFSLPEN
- name: USB_OTG_FSLPEN
description: USB OTG FS clock enable during Sleep mode
bit_offset: 7
bit_size: 1
@ -388,7 +388,7 @@ fieldset/AHB2RSTR:
description: Random number generator module reset
bit_offset: 6
bit_size: 1
- name: OTGFSRST
- name: USB_OTG_FSRST
description: USB OTG FS module reset
bit_offset: 7
bit_size: 1

16
data/registers/rcc_f4.yaml
View File

@ -181,11 +181,11 @@ fieldset/AHB1ENR:
description: Ethernet PTP clock enable
bit_offset: 28
bit_size: 1
- name: OTGHSEN
- name: USB_OTG_HSEN
description: USB OTG HS clock enable
bit_offset: 29
bit_size: 1
- name: OTGHSULPIEN
- name: USB_OTG_HSULPIEN
description: USB OTG HSULPI clock enable
bit_offset: 30
bit_size: 1
@ -288,11 +288,11 @@ fieldset/AHB1LPENR:
description: Ethernet PTP clock enable during Sleep mode
bit_offset: 28
bit_size: 1
- name: OTGHSLPEN
- name: USB_OTG_HSLPEN
description: USB OTG HS clock enable during Sleep mode
bit_offset: 29
bit_size: 1
- name: OTGHSULPILPEN
- name: USB_OTG_HSULPILPEN
description: USB OTG HS ULPI clock enable during Sleep mode
bit_offset: 30
bit_size: 1
@ -371,7 +371,7 @@ fieldset/AHB1RSTR:
description: Ethernet MAC reset
bit_offset: 25
bit_size: 1
- name: OTGHSRST
- name: USB_OTG_HSRST
description: USB OTG HS module reset
bit_offset: 29
bit_size: 1
@ -390,7 +390,7 @@ fieldset/AHB1RSTR:
fieldset/AHB2ENR:
description: AHB2 peripheral clock enable register
fields:
- name: OTGFSEN
- name: USB_OTG_FSEN
description: USB OTG FS clock enable
bit_offset: 7
bit_size: 1
@ -413,7 +413,7 @@ fieldset/AHB2ENR:
fieldset/AHB2LPENR:
description: AHB2 peripheral clock enable in low power mode register
fields:
- name: OTGFSLPEN
- name: USB_OTG_FSLPEN
description: USB OTG FS clock enable during Sleep mode
bit_offset: 7
bit_size: 1
@ -444,7 +444,7 @@ fieldset/AHB2LPENR:
fieldset/AHB2RSTR:
description: AHB2 peripheral reset register
fields:
- name: OTGFSRST
- name: USB_OTG_FSRST
description: USB OTG FS module reset
bit_offset: 7
bit_size: 1

6
data/registers/rcc_l4.yaml
View File

@ -280,7 +280,7 @@ fieldset/AHB2ENR:
description: IO port I clock enable
bit_offset: 8
bit_size: 1
- name: OTGFSEN
- name: USB_OTG_FSEN
description: OTG full speed clock enable
bit_offset: 12
bit_size: 1
@ -351,7 +351,7 @@ fieldset/AHB2RSTR:
description: IO port I reset
bit_offset: 8
bit_size: 1
- name: OTGFSRST
- name: USB_OTG_FSRST
description: USB OTG FS reset
bit_offset: 12
bit_size: 1
@ -430,7 +430,7 @@ fieldset/AHB2SMENR:
description: SRAM2 interface clocks enable during Sleep and Stop modes
bit_offset: 10
bit_size: 1
- name: OTGFSSMEN
- name: USB_OTG_FSSMEN
description: OTG full speed clocks enable during Sleep and Stop modes
bit_offset: 12
bit_size: 1

6
data/registers/rcc_u5.yaml
View File

@ -406,7 +406,7 @@ fieldset/AHB2ENR1:
description: "DCMI and PSSI clock enable\r Set and cleared by software."
bit_offset: 12
bit_size: 1
- name: OTGEN
- name: USB_OTG_FSEN
description: "OTG_FS clock enable\r Set and cleared by software."
bit_offset: 14
bit_size: 1
@ -520,7 +520,7 @@ fieldset/AHB2RSTR1:
description: "DCMI and PSSI reset\r Set and cleared by software."
bit_offset: 12
bit_size: 1
- name: OTGRST
- name: USB_OTG_FSRST
description: "OTG_FS reset\r Set and cleared by software."
bit_offset: 14
bit_size: 1
@ -626,7 +626,7 @@ fieldset/AHB2SMENR1:
description: "DCMI and PSSI clocks enable during Sleep and Stop modes\r Set and cleared by software."
bit_offset: 12
bit_size: 1
- name: OTGSMEN
- name: USB_OTG_FSSMEN
description: "OTG_FS clocks enable during Sleep and Stop modes\r Set and cleared by software."
bit_offset: 14
bit_size: 1

27
stm32data/__main__.py
View File

@ -336,7 +336,7 @@ per_mcu_files = {}
def parse_documentations():
print("linking files and documents")
with open('sources/mcufinder/files.json', 'r') as j:
with open('sources/mcufinder/files.json', 'r', encoding='utf-8') as j:
files = json.load(j)
for file in files['Files']:
file_id = file['id_file']
@ -348,7 +348,7 @@ def parse_documentations():
'type': file['type'],
})
with open('sources/mcufinder/mcus.json', 'r') as j:
with open('sources/mcufinder/mcus.json', 'r', encoding='utf-8') as j:
mcus = json.load(j)
for mcu in mcus['MCUs']:
rpn = mcu['RPN']
@ -438,7 +438,11 @@ def cleanup_pin_name(pin_name):
def parse_signal_name(signal_name):
parts = signal_name.split('_', 1)
if signal_name.startswith('USB_OTG_FS') or signal_name.startswith('USB_OTG_HS'):
parts = [signal_name[:10], signal_name[11:]]
else:
parts = signal_name.split('_', 1)
if len(parts) == 1:
return None
peri_name = parts[0]
@ -502,6 +506,7 @@ def parse_chips():
chip_groups = []
for f in sorted(glob('sources/cubedb/mcu/STM32*.xml')):
f = f.replace(os.path.sep, '/')
if 'STM32MP' in f:
continue
if 'STM32GBK' in f:
@ -661,9 +666,14 @@ def parse_chips():
signal = 'SUBGHZSPI_' + signal[16:-3]
# TODO: What are those signals (well, GPIO is clear) Which peripheral do they belong to?
if signal not in {'GPIO', 'CEC', 'AUDIOCLK', 'VDDTCXO'} and 'EXTI' not in signal:
periph, signal = signal.split('_', maxsplit=1)
pins = periph_pins.setdefault(periph, [])
pins.append(OrderedDict(pin=pin_name, signal=signal))
# both peripherals and signals can have underscores in their names so there is no easy way to split
# check if signal name starts with one of the peripheral names
for periph in peri_kinds.keys():
if signal.startswith(periph + '_'):
signal = removeprefix(signal, periph + '_')
pins = periph_pins.setdefault(periph, [])
pins.append(OrderedDict(pin=pin_name, signal=signal))
break
for periph, pins in periph_pins.items():
pins = remove_duplicates(pins)
sort_pins(pins)
@ -879,6 +889,7 @@ def remove_duplicates(item_list):
def parse_gpio_af():
# os.makedirs('data/gpio_af', exist_ok=True)
for f in glob('sources/cubedb/mcu/IP/GPIO-*_gpio_v1_0_Modes.xml'):
f = f.replace(os.path.sep, '/')
ff = removeprefix(f, 'sources/cubedb/mcu/IP/GPIO-')
ff = removesuffix(ff, '_gpio_v1_0_Modes.xml')
@ -963,6 +974,7 @@ dma_channels = {}
def parse_dma():
for f in glob('sources/cubedb/mcu/IP/*DMA-*Modes.xml'):
f = f.replace(os.path.sep, '/')
is_explicitly_bdma = False
ff = removeprefix(f, 'sources/cubedb/mcu/IP/')
if not (ff.startswith('B') or ff.startswith('D')):
@ -994,6 +1006,7 @@ def parse_dma():
if ff.startswith('STM32L4S'):
dmamux_file = 'L4RS'
for mf in sorted(glob('data/dmamux/{}_*.yaml'.format(dmamux_file))):
mf = mf.replace(os.path.sep, '/')
with open(mf, 'r') as yaml_file:
y = yaml.load(yaml_file)
mf = removesuffix(mf, '.yaml')
@ -1110,6 +1123,7 @@ peripheral_to_clock = {}
def parse_rcc_regs():
print("parsing RCC registers")
for f in glob('data/registers/rcc_*'):
f = f.replace(os.path.sep, '/')
ff = removeprefix(f, 'data/registers/rcc_')
ff = removesuffix(ff, '.yaml')
family_clocks = {}
@ -1160,6 +1174,7 @@ chip_interrupts = {}
def parse_interrupts():
print("parsing interrupts")
for f in glob('sources/cubedb/mcu/IP/NVIC*_Modes.xml'):
f = f.replace(os.path.sep, '/')
ff = removeprefix(f, 'sources/cubedb/mcu/IP/NVIC')
ff = removesuffix(ff, '_Modes.xml')

1
stm32data/header.py
View File

@ -189,6 +189,7 @@ def parse_headers():
os.makedirs('sources/headers_parsed', exist_ok=True)
print('loading headers...')
for f in glob('sources/headers/*.h'):
f = f.replace(os.path.sep, '/')
# if 'stm32f4' not in f: continue
ff = removeprefix(f, 'sources/headers/')
ff = removesuffix(ff, '.h')