diff --git a/data/registers/usart_v3.yaml b/data/registers/usart_v3.yaml
deleted file mode 100644
index adec001..0000000
--- a/data/registers/usart_v3.yaml
+++ /dev/null
@@ -1,775 +0,0 @@
----
-block/USART:
-  description: Universal synchronous asynchronous receiver transmitter
-  items:
-    - name: CR1
-      description: Control register 1
-      byte_offset: 0
-      fieldset: CR1
-    - name: CR2
-      description: Control register 2
-      byte_offset: 4
-      fieldset: CR2
-    - name: CR3
-      description: Control register 3
-      byte_offset: 8
-      fieldset: CR3
-    - name: BRR
-      description: Baud rate register
-      byte_offset: 12
-      fieldset: BRR
-    - name: GTPR
-      description: Guard time and prescaler register
-      byte_offset: 16
-      fieldset: GTPR
-    - name: RTOR
-      description: Receiver timeout register
-      byte_offset: 20
-      fieldset: RTOR
-    - name: RQR
-      description: Request register
-      byte_offset: 24
-      access: Write
-      fieldset: RQR
-    - name: ISR
-      description: Interrupt & status register
-      byte_offset: 28
-      access: Read
-      fieldset: ISR
-    - name: ICR
-      description: Interrupt flag clear register
-      byte_offset: 32
-      access: Write
-      fieldset: ICR
-    - name: RDR
-      description: Receive data register
-      byte_offset: 36
-      access: Read
-      fieldset: RDR
-    - name: TDR
-      description: Transmit data register
-      byte_offset: 40
-      fieldset: TDR
-fieldset/BRR:
-  description: Baud rate register
-  fields:
-    - name: BRR
-      description: DIV_Mantissa
-      bit_offset: 0
-      bit_size: 16
-fieldset/CR1:
-  description: Control register 1
-  fields:
-    - name: UE
-      description: USART enable
-      bit_offset: 0
-      bit_size: 1
-    - name: UESM
-      description: USART enable in Stop mode
-      bit_offset: 1
-      bit_size: 1
-    - name: RE
-      description: Receiver enable
-      bit_offset: 2
-      bit_size: 1
-    - name: TE
-      description: Transmitter enable
-      bit_offset: 3
-      bit_size: 1
-    - name: IDLEIE
-      description: IDLE interrupt enable
-      bit_offset: 4
-      bit_size: 1
-    - name: RXNEIE
-      description: RXNE interrupt enable
-      bit_offset: 5
-      bit_size: 1
-    - name: TCIE
-      description: Transmission complete interrupt enable
-      bit_offset: 6
-      bit_size: 1
-    - name: TXEIE
-      description: interrupt enable
-      bit_offset: 7
-      bit_size: 1
-    - name: PEIE
-      description: PE interrupt enable
-      bit_offset: 8
-      bit_size: 1
-    - name: PS
-      description: Parity selection
-      bit_offset: 9
-      bit_size: 1
-      enum: PS
-    - name: PCE
-      description: Parity control enable
-      bit_offset: 10
-      bit_size: 1
-    - name: WAKE
-      description: Receiver wakeup method
-      bit_offset: 11
-      bit_size: 1
-      enum: WAKE
-    - name: M
-      description: Word length
-      bit_offset: 12
-      bit_size: 1
-      array:
-        len: 2
-        stride: 16
-      enum: M0
-    - name: MME
-      description: Mute mode enable
-      bit_offset: 13
-      bit_size: 1
-    - name: CMIE
-      description: Character match interrupt enable
-      bit_offset: 14
-      bit_size: 1
-    - name: OVER
-      description: Oversampling mode
-      bit_offset: 15
-      bit_size: 1
-      array:
-        len: 1
-        stride: 0
-      enum: OVER
-    - name: DEDT
-      description: Driver Enable de-assertion time
-      bit_offset: 16
-      bit_size: 5
-    - name: DEAT
-      description: Driver Enable assertion time
-      bit_offset: 21
-      bit_size: 5
-    - name: RTOIE
-      description: Receiver timeout interrupt enable
-      bit_offset: 26
-      bit_size: 1
-    - name: EOBIE
-      description: End of Block interrupt enable
-      bit_offset: 27
-      bit_size: 1
-fieldset/CR2:
-  description: Control register 2
-  fields:
-    - name: ADDM
-      description: 7-bit Address Detection/4-bit Address Detection
-      bit_offset: 4
-      bit_size: 1
-      array:
-        len: 1
-        stride: 0
-      enum: ADDM
-    - name: LBDL
-      description: LIN break detection length
-      bit_offset: 5
-      bit_size: 1
-      enum: LBDL
-    - name: LBDIE
-      description: LIN break detection interrupt enable
-      bit_offset: 6
-      bit_size: 1
-    - name: LBCL
-      description: Last bit clock pulse
-      bit_offset: 8
-      bit_size: 1
-      enum: LBCL
-    - name: CPHA
-      description: Clock phase
-      bit_offset: 9
-      bit_size: 1
-      enum: CPHA
-    - name: CPOL
-      description: Clock polarity
-      bit_offset: 10
-      bit_size: 1
-      enum: CPOL
-    - name: CLKEN
-      description: Clock enable
-      bit_offset: 11
-      bit_size: 1
-    - name: STOP
-      description: STOP bits
-      bit_offset: 12
-      bit_size: 2
-      enum: STOP
-    - name: LINEN
-      description: LIN mode enable
-      bit_offset: 14
-      bit_size: 1
-    - name: SWAP
-      description: Swap TX/RX pins
-      bit_offset: 15
-      bit_size: 1
-      enum: SWAP
-    - name: RXINV
-      description: RX pin active level inversion
-      bit_offset: 16
-      bit_size: 1
-      enum: RXINV
-    - name: TXINV
-      description: TX pin active level inversion
-      bit_offset: 17
-      bit_size: 1
-      enum: TXINV
-    - name: DATAINV
-      description: Binary data inversion
-      bit_offset: 18
-      bit_size: 1
-      enum: DATAINV
-    - name: MSBFIRST
-      description: Most significant bit first
-      bit_offset: 19
-      bit_size: 1
-      enum: MSBFIRST
-    - name: ABREN
-      description: Auto baud rate enable
-      bit_offset: 20
-      bit_size: 1
-    - name: ABRMOD
-      description: Auto baud rate mode
-      bit_offset: 21
-      bit_size: 2
-      enum: ABRMOD
-    - name: RTOEN
-      description: Receiver timeout enable
-      bit_offset: 23
-      bit_size: 1
-    - name: ADD
-      description: Address of the USART node
-      bit_offset: 24
-      bit_size: 8
-fieldset/CR3:
-  description: Control register 3
-  fields:
-    - name: EIE
-      description: Error interrupt enable
-      bit_offset: 0
-      bit_size: 1
-    - name: IREN
-      description: Ir mode enable
-      bit_offset: 1
-      bit_size: 1
-    - name: IRLP
-      description: Ir low-power
-      bit_offset: 2
-      bit_size: 1
-      enum: IRLP
-    - name: HDSEL
-      description: Half-duplex selection
-      bit_offset: 3
-      bit_size: 1
-      enum: HDSEL
-    - name: NACK
-      description: Smartcard NACK enable
-      bit_offset: 4
-      bit_size: 1
-    - name: SCEN
-      description: Smartcard mode enable
-      bit_offset: 5
-      bit_size: 1
-    - name: DMAR
-      description: DMA enable receiver
-      bit_offset: 6
-      bit_size: 1
-    - name: DMAT
-      description: DMA enable transmitter
-      bit_offset: 7
-      bit_size: 1
-    - name: RTSE
-      description: RTS enable
-      bit_offset: 8
-      bit_size: 1
-    - name: CTSE
-      description: CTS enable
-      bit_offset: 9
-      bit_size: 1
-    - name: CTSIE
-      description: CTS interrupt enable
-      bit_offset: 10
-      bit_size: 1
-    - name: ONEBIT
-      description: One sample bit method enable
-      bit_offset: 11
-      bit_size: 1
-      enum: ONEBIT
-    - name: OVRDIS
-      description: Overrun Disable
-      bit_offset: 12
-      bit_size: 1
-    - name: DDRE
-      description: DMA Disable on Reception Error
-      bit_offset: 13
-      bit_size: 1
-    - name: DEM
-      description: Driver enable mode
-      bit_offset: 14
-      bit_size: 1
-    - name: DEP
-      description: Driver enable polarity selection
-      bit_offset: 15
-      bit_size: 1
-      enum: DEP
-    - name: SCARCNT
-      description: Smartcard auto-retry count
-      bit_offset: 17
-      bit_size: 3
-    - name: WUS
-      description: Wakeup from Stop mode interrupt flag selection
-      bit_offset: 20
-      bit_size: 2
-      enum: WUS
-    - name: WUFIE
-      description: Wakeup from Stop mode interrupt enable
-      bit_offset: 22
-      bit_size: 1
-fieldset/GTPR:
-  description: Guard time and prescaler register
-  fields:
-    - name: PSC
-      description: Prescaler value
-      bit_offset: 0
-      bit_size: 8
-    - name: GT
-      description: Guard time value
-      bit_offset: 8
-      bit_size: 8
-fieldset/ICR:
-  description: Interrupt flag clear register
-  fields:
-    - name: PECF
-      description: Parity error clear flag
-      bit_offset: 0
-      bit_size: 1
-    - name: FECF
-      description: Framing error clear flag
-      bit_offset: 1
-      bit_size: 1
-    - name: NCF
-      description: Noise detected clear flag
-      bit_offset: 2
-      bit_size: 1
-    - name: ORECF
-      description: Overrun error clear flag
-      bit_offset: 3
-      bit_size: 1
-    - name: IDLECF
-      description: Idle line detected clear flag
-      bit_offset: 4
-      bit_size: 1
-    - name: TCCF
-      description: Transmission complete clear flag
-      bit_offset: 6
-      bit_size: 1
-    - name: LBDCF
-      description: LIN break detection clear flag
-      bit_offset: 8
-      bit_size: 1
-    - name: CTSCF
-      description: CTS clear flag
-      bit_offset: 9
-      bit_size: 1
-    - name: RTOCF
-      description: Receiver timeout clear flag
-      bit_offset: 11
-      bit_size: 1
-    - name: EOBCF
-      description: End of block clear flag
-      bit_offset: 12
-      bit_size: 1
-    - name: CMCF
-      description: Character match clear flag
-      bit_offset: 17
-      bit_size: 1
-    - name: WUCF
-      description: Wakeup from Stop mode clear flag
-      bit_offset: 20
-      bit_size: 1
-fieldset/ISR:
-  description: Interrupt & status register
-  fields:
-    - name: PE
-      description: PE
-      bit_offset: 0
-      bit_size: 1
-    - name: FE
-      description: FE
-      bit_offset: 1
-      bit_size: 1
-    - name: NE
-      description: NE
-      bit_offset: 2
-      bit_size: 1
-    - name: ORE
-      description: ORE
-      bit_offset: 3
-      bit_size: 1
-    - name: IDLE
-      description: IDLE
-      bit_offset: 4
-      bit_size: 1
-    - name: RXNE
-      description: RXNE
-      bit_offset: 5
-      bit_size: 1
-    - name: TC
-      description: TC
-      bit_offset: 6
-      bit_size: 1
-    - name: TXE
-      description: TXE
-      bit_offset: 7
-      bit_size: 1
-    - name: LBDF
-      description: LBDF
-      bit_offset: 8
-      bit_size: 1
-    - name: CTSIF
-      description: CTSIF
-      bit_offset: 9
-      bit_size: 1
-    - name: CTS
-      description: CTS
-      bit_offset: 10
-      bit_size: 1
-    - name: RTOF
-      description: RTOF
-      bit_offset: 11
-      bit_size: 1
-    - name: EOBF
-      description: EOBF
-      bit_offset: 12
-      bit_size: 1
-    - name: ABRE
-      description: ABRE
-      bit_offset: 14
-      bit_size: 1
-    - name: ABRF
-      description: ABRF
-      bit_offset: 15
-      bit_size: 1
-    - name: BUSY
-      description: BUSY
-      bit_offset: 16
-      bit_size: 1
-    - name: CMF
-      description: CMF
-      bit_offset: 17
-      bit_size: 1
-    - name: SBKF
-      description: SBKF
-      bit_offset: 18
-      bit_size: 1
-    - name: RWU
-      description: RWU
-      bit_offset: 19
-      bit_size: 1
-    - name: WUF
-      description: WUF
-      bit_offset: 20
-      bit_size: 1
-    - name: TEACK
-      description: TEACK
-      bit_offset: 21
-      bit_size: 1
-    - name: REACK
-      description: REACK
-      bit_offset: 22
-      bit_size: 1
-fieldset/RDR:
-  description: Receive data register
-  fields:
-    - name: RDR
-      description: Receive data value
-      bit_offset: 0
-      bit_size: 9
-fieldset/RQR:
-  description: Request register
-  fields:
-    - name: ABRRQ
-      description: Auto baud rate request
-      bit_offset: 0
-      bit_size: 1
-      enum: ABRRQ
-    - name: SBKRQ
-      description: Send break request
-      bit_offset: 1
-      bit_size: 1
-      enum: SBKRQ
-    - name: MMRQ
-      description: Mute mode request
-      bit_offset: 2
-      bit_size: 1
-      enum: MMRQ
-    - name: RXFRQ
-      description: Receive data flush request
-      bit_offset: 3
-      bit_size: 1
-      enum: RXFRQ
-    - name: TXFRQ
-      description: Transmit data flush request
-      bit_offset: 4
-      bit_size: 1
-      enum: TXFRQ
-fieldset/RTOR:
-  description: Receiver timeout register
-  fields:
-    - name: RTO
-      description: Receiver timeout value
-      bit_offset: 0
-      bit_size: 24
-    - name: BLEN
-      description: Block Length
-      bit_offset: 24
-      bit_size: 8
-fieldset/TDR:
-  description: Transmit data register
-  fields:
-    - name: TDR
-      description: Transmit data value
-      bit_offset: 0
-      bit_size: 9
-enum/ABRMOD:
-  bit_size: 2
-  variants:
-    - name: Start
-      description: Measurement of the start bit is used to detect the baud rate
-      value: 0
-    - name: Edge
-      description: Falling edge to falling edge measurement
-      value: 1
-    - name: Frame7F
-      description: "0x7F frame detection"
-      value: 2
-    - name: Frame55
-      description: "0x55 frame detection"
-      value: 3
-enum/ABRRQ:
-  bit_size: 1
-  variants:
-    - name: Request
-      description: resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame
-      value: 1
-enum/ADDM:
-  bit_size: 1
-  variants:
-    - name: Bit4
-      description: 4-bit address detection
-      value: 0
-    - name: Bit7
-      description: 7-bit address detection
-      value: 1
-enum/CPHA:
-  bit_size: 1
-  variants:
-    - name: First
-      description: The first clock transition is the first data capture edge
-      value: 0
-    - name: Second
-      description: The second clock transition is the first data capture edge
-      value: 1
-enum/CPOL:
-  bit_size: 1
-  variants:
-    - name: Low
-      description: Steady low value on CK pin outside transmission window
-      value: 0
-    - name: High
-      description: Steady high value on CK pin outside transmission window
-      value: 1
-enum/DATAINV:
-  bit_size: 1
-  variants:
-    - name: Positive
-      description: Logical data from the data register are send/received in positive/direct logic
-      value: 0
-    - name: Negative
-      description: Logical data from the data register are send/received in negative/inverse logic
-      value: 1
-enum/DEP:
-  bit_size: 1
-  variants:
-    - name: High
-      description: DE signal is active high
-      value: 0
-    - name: Low
-      description: DE signal is active low
-      value: 1
-enum/HDSEL:
-  bit_size: 1
-  variants:
-    - name: NotSelected
-      description: Half duplex mode is not selected
-      value: 0
-    - name: Selected
-      description: Half duplex mode is selected
-      value: 1
-enum/IRLP:
-  bit_size: 1
-  variants:
-    - name: Normal
-      description: Normal mode
-      value: 0
-    - name: LowPower
-      description: Low-power mode
-      value: 1
-enum/LBCL:
-  bit_size: 1
-  variants:
-    - name: NotOutput
-      description: The clock pulse of the last data bit is not output to the CK pin
-      value: 0
-    - name: Output
-      description: The clock pulse of the last data bit is output to the CK pin
-      value: 1
-enum/LBDL:
-  bit_size: 1
-  variants:
-    - name: Bit10
-      description: 10-bit break detection
-      value: 0
-    - name: Bit11
-      description: 11-bit break detection
-      value: 1
-enum/M0:
-  bit_size: 1
-  variants:
-    - name: Bit8
-      description: "1 start bit, 8 data bits, n stop bits"
-      value: 0
-    - name: Bit9
-      description: "1 start bit, 9 data bits, n stop bits"
-      value: 1
-enum/M1:
-  bit_size: 1
-  variants:
-    - name: M0
-      description: Use M0 to set the data bits
-      value: 0
-    - name: Bit7
-      description: "1 start bit, 7 data bits, n stop bits"
-      value: 1
-enum/MMRQ:
-  bit_size: 1
-  variants:
-    - name: Mute
-      description: Puts the USART in mute mode and sets the RWU flag
-      value: 1
-enum/MSBFIRST:
-  bit_size: 1
-  variants:
-    - name: LSB
-      description: "data is transmitted/received with data bit 0 first, following the start bit"
-      value: 0
-    - name: MSB
-      description: "data is transmitted/received with MSB (bit 7/8/9) first, following the start bit"
-      value: 1
-enum/ONEBIT:
-  bit_size: 1
-  variants:
-    - name: Sample3
-      description: Three sample bit method
-      value: 0
-    - name: Sample1
-      description: One sample bit method
-      value: 1
-enum/OVER:
-  bit_size: 1
-  variants:
-    - name: Oversampling16
-      description: Oversampling by 16
-      value: 0
-    - name: Oversampling8
-      description: Oversampling by 8
-      value: 1
-enum/PS:
-  bit_size: 1
-  variants:
-    - name: Even
-      description: Even parity
-      value: 0
-    - name: Odd
-      description: Odd parity
-      value: 1
-enum/RXFRQ:
-  bit_size: 1
-  variants:
-    - name: Discard
-      description: "clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition"
-      value: 1
-enum/RXINV:
-  bit_size: 1
-  variants:
-    - name: Standard
-      description: RX pin signal works using the standard logic levels
-      value: 0
-    - name: Inverted
-      description: RX pin signal values are inverted
-      value: 1
-enum/SBKRQ:
-  bit_size: 1
-  variants:
-    - name: Break
-      description: "sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available"
-      value: 1
-enum/STOP:
-  bit_size: 2
-  variants:
-    - name: Stop1
-      description: 1 stop bit
-      value: 0
-    - name: Stop0p5
-      description: 0.5 stop bit
-      value: 1
-    - name: Stop2
-      description: 2 stop bit
-      value: 2
-    - name: Stop1p5
-      description: 1.5 stop bit
-      value: 3
-enum/SWAP:
-  bit_size: 1
-  variants:
-    - name: Standard
-      description: TX/RX pins are used as defined in standard pinout
-      value: 0
-    - name: Swapped
-      description: The TX and RX pins functions are swapped
-      value: 1
-enum/TXFRQ:
-  bit_size: 1
-  variants:
-    - name: Discard
-      description: Set the TXE flags. This allows to discard the transmit data
-      value: 1
-enum/TXINV:
-  bit_size: 1
-  variants:
-    - name: Standard
-      description: TX pin signal works using the standard logic levels
-      value: 0
-    - name: Inverted
-      description: TX pin signal values are inverted
-      value: 1
-enum/WAKE:
-  bit_size: 1
-  variants:
-    - name: Idle
-      description: Idle line
-      value: 0
-    - name: Address
-      description: Address mask
-      value: 1
-enum/WUS:
-  bit_size: 2
-  variants:
-    - name: Address
-      description: WUF active on address match
-      value: 0
-    - name: Start
-      description: WuF active on Start bit detection
-      value: 2
-    - name: RXNE
-      description: WUF active on RXNE
-      value: 3
diff --git a/parse.py b/parse.py
index a3e812b..aafd26b 100755
--- a/parse.py
+++ b/parse.py
@@ -279,13 +279,6 @@ FAKE_PERIPHERALS = [
 ]
 
 perimap = [
-    ('UART:sci2_v1_1', 'usart_v1/UART'),
-    ('UART:sci2_v1_2', 'usart_v1/UART'),
-    ('UART:sci2_v1_2_F1', 'usart_v1/UART'),
-    ('UART:sci2_v2_1', 'usart_v2/UART'),
-    # ('UART:sci2_v3_0', 'usart_v3/UART'),
-    # ('UART:sci2_v3_1', 'usart_v3/UART'),
-
     ('.*:USART:sci2_v1_1', 'usart_v1/USART'),
     ('.*:USART:sci2_v1_2_F1', 'usart_v1/USART'),
     ('.*:USART:sci2_v1_2', 'usart_v1/USART'),
@@ -294,10 +287,11 @@ perimap = [
     ('.*:USART:sci2_v2_2', 'usart_v2/USART'),
     ('.*:USART:sci3_v1_0', 'usart_v2/USART'),
     ('.*:USART:sci3_v1_1', 'usart_v2/USART'),
-    ('.*:USART:sci3_v1_2', 'usart_v3/USART'),
-    ('.*:USART:sci3_v2_0', 'usart_v3/USART'),
-    ('.*:USART:sci3_v2_1', 'usart_v3/USART'),
-    ('.*:UART:sci2_v3_0', 'usart_v3/USART'),
+    ('.*:USART:sci3_v1_2', 'usart_v2/USART'),
+    ('.*:USART:sci3_v2_0', 'usart_v2/USART'),
+    ('.*:USART:sci3_v2_1', 'usart_v2/USART'),
+    ('.*:UART:sci2_v3_0', 'usart_v2/USART'),
+    ('.*:UART:sci2_v3_1', 'usart_v2/USART'),
     ('.*:RNG:rng1_v1_1', 'rng_v1/RNG'),
     ('.*:RNG:rng1_v2_0', 'rng_v1/RNG'),
     ('.*:RNG:rng1_v2_1', 'rng_v1/RNG'),