merge field PAGE_WP and FPU_IE

This commit is contained in:
eZio Pan 2024-01-01 14:49:00 +08:00
parent 751158dace
commit 45efe8a301
2 changed files with 25 additions and 84 deletions

View File

@ -150,30 +150,19 @@ fieldset/CFGR1:
description: Enable the power switch to deliver VBAT voltage on ADC channel 18 input description: Enable the power switch to deliver VBAT voltage on ADC channel 18 input
bit_offset: 24 bit_offset: 24
bit_size: 1 bit_size: 1
- name: FPU_IE0 - name: FPU_IE
description: Invalid operation interrupt enable description: |-
Idx 0: Invalid operation interrupt enable;
Idx 1: Devide-by-zero interrupt enable;
Idx 2: Underflow interrupt enable;
Idx 3: Overflow interrupt enable;
Idx 4: Input denormal interrupt enable;
Idx 5: Inexact interrupt enable
bit_offset: 26 bit_offset: 26
bit_size: 1 bit_size: 1
- name: FPU_IE1 array:
description: Devide-by-zero interrupt enable len: 6
bit_offset: 27 stride: 1
bit_size: 1
- name: FPU_IE2
description: Underflow interrupt enable
bit_offset: 28
bit_size: 1
- name: FPU_IE3
description: Overflow interrupt enable
bit_offset: 29
bit_size: 1
- name: FPU_IE4
description: Input denormal interrupt enable
bit_offset: 30
bit_size: 1
- name: FPU_IE5
description: Inexact interrupt enable
bit_offset: 31
bit_size: 1
fieldset/CFGR2: fieldset/CFGR2:
description: configuration register 2 description: configuration register 2
fields: fields:
@ -325,70 +314,13 @@ fieldset/EXTICR:
fieldset/RCR: fieldset/RCR:
description: CCM SRAM protection register description: CCM SRAM protection register
fields: fields:
- name: PAGE0_WP - name: PAGE_WP
description: CCM SRAM page write protection enabled description: CCM SRAM page x write protection enabled
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
- name: PAGE1_WP array:
description: CCM SRAM page write protection enabled len: 16
bit_offset: 1 stride: 1
bit_size: 1
- name: PAGE2_WP
description: CCM SRAM page write protection enabled
bit_offset: 2
bit_size: 1
- name: PAGE3_WP
description: CCM SRAM page write protection enabled
bit_offset: 3
bit_size: 1
- name: PAGE4_WP
description: CCM SRAM page write protection enabled
bit_offset: 4
bit_size: 1
- name: PAGE5_WP
description: CCM SRAM page write protection enabled
bit_offset: 5
bit_size: 1
- name: PAGE6_WP
description: CCM SRAM page write protection enabled
bit_offset: 6
bit_size: 1
- name: PAGE7_WP
description: CCM SRAM page write protection enabled
bit_offset: 7
bit_size: 1
- name: PAGE8_WP
description: CCM SRAM page write protection enabled
bit_offset: 8
bit_size: 1
- name: PAGE9_WP
description: CCM SRAM page write protection enabled
bit_offset: 9
bit_size: 1
- name: PAGE10_WP
description: CCM SRAM page write protection enabled
bit_offset: 10
bit_size: 1
- name: PAGE11_WP
description: CCM SRAM page write protection enabled
bit_offset: 11
bit_size: 1
- name: PAGE12_WP
description: CCM SRAM page write protection enabled
bit_offset: 12
bit_size: 1
- name: PAGE13_WP
description: CCM SRAM page write protection enabled
bit_offset: 13
bit_size: 1
- name: PAGE14_WP
description: CCM SRAM page write protection enabled
bit_offset: 14
bit_size: 1
- name: PAGE15_WP
description: CCM SRAM page write protection enabled
bit_offset: 15
bit_size: 1
enum/ADC12_EXT13_RMP: enum/ADC12_EXT13_RMP:
bit_size: 1 bit_size: 1
variants: variants:

View File

@ -0,0 +1,9 @@
transforms:
- !MakeFieldArray
fieldsets: RCR
from: PAGE\d+_WP
to: PAGE_WP
- !MakeFieldArray
fieldsets: CFGR1
from: FPU_IE\d
to: FPU_IE