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eZio Pan 2024-02-21 15:53:17 +08:00
parent f40897c303
commit 442d176e8b
2 changed files with 77 additions and 183 deletions
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236
data/registers/dbgmcu_h5.yaml
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@ -33,18 +33,16 @@ block/DBGMCU:
description: DBGMCU status register.
byte_offset: 252
fieldset: SR
- name: DBG_AUTH_HOST
- name: AUTH_HOST
description: DBGMCU debug authentication mailbox host register.
byte_offset: 256
fieldset: DBG_AUTH_HOST
- name: DBG_AUTH_DEVICE
- name: AUTH_DEVICE
description: DBGMCU debug authentication mailbox device register.
byte_offset: 260
fieldset: DBG_AUTH_DEVICE
- name: DBG_AUTH_ACK
- name: AUTH_ACK
description: DBGMCU debug authentication mailbox acknowledge register.
byte_offset: 264
fieldset: DBG_AUTH_ACK
fieldset: AUTH_ACK
- name: PIDR4
description: DBGMCU CoreSight peripheral identity register 4.
byte_offset: 4048
@ -84,258 +82,155 @@ block/DBGMCU:
fieldset/AHB1FZR:
description: DBGMCU AHB1 peripheral freeze register.
fields:
- name: DBG_GPDMA1_0_STOP
- name: GPDMA1_STOP
description: GPDMA1 channel 0 stop in debug.
bit_offset: 0
bit_size: 1
- name: DBG_GPDMA1_1_STOP
description: GPDMA1 channel 1 stop in debug.
bit_offset: 1
bit_size: 1
- name: DBG_GPDMA1_2_STOP
description: GPDMA1 channel 2 stop in debug.
bit_offset: 2
bit_size: 1
- name: DBG_GPDMA1_3_STOP
description: GPDMA1 channel 3 stop in debug.
bit_offset: 3
bit_size: 1
- name: DBG_GPDMA1_4_STOP
description: GPDMA1 channel 4 stop in debug.
bit_offset: 4
bit_size: 1
- name: DBG_GPDMA1_5_STOP
description: GPDMA1 channel 5 stop in debug.
bit_offset: 5
bit_size: 1
- name: DBG_GPDMA1_6_STOP
description: GPDMA1 channel 6 stop in debug.
bit_offset: 6
bit_size: 1
- name: DBG_GPDMA1_7_STOP
description: GPDMA1 channel 7 stop in debug.
bit_offset: 7
bit_size: 1
- name: DBG_GPDMA1_8_STOP
description: GPDMA1 channel 8 stop in debug.
bit_offset: 8
bit_size: 1
- name: DBG_GPDMA1_9_STOP
description: GPDMA1 channel 9 stop in debug.
bit_offset: 9
bit_size: 1
- name: DBG_GPDMA1_10_STOP
description: GPDMA1 channel 10 stop in debug.
bit_offset: 10
bit_size: 1
- name: DBG_GPDMA1_11_STOP
description: GPDMA1 channel 11 stop in debug.
bit_offset: 11
bit_size: 1
- name: DBG_GPDMA1_12_STOP
description: GPDMA1 channel 12 stop in debug.
bit_offset: 12
bit_size: 1
- name: DBG_GPDMA1_13_STOP
description: GPDMA1 channel 13 stop in debug.
bit_offset: 13
bit_size: 1
- name: DBG_GPDMA1_14_STOP
description: GPDMA1 channel 14 stop in debug.
bit_offset: 14
bit_size: 1
- name: DBG_GPDMA1_15_STOP
description: GPDMA1 channel 15 stop in debug.
bit_offset: 15
bit_size: 1
- name: DBG_GPDMA2_0_STOP
array:
len: 16
stride: 1
- name: GPDMA2_STOP
description: GPDMA2 channel 0 stop in debug.
bit_offset: 16
bit_size: 1
- name: DBG_GPDMA2_1_STOP
description: GPDMA2 channel 1 stop in debug.
bit_offset: 17
bit_size: 1
- name: DBG_GPDMA2_2_STOP
description: GPDMA2 channel 2 stop in debug.
bit_offset: 18
bit_size: 1
- name: DBG_GPDMA2_3_STOP
description: GPDMA2 channel 3 stop in debug.
bit_offset: 19
bit_size: 1
- name: DBG_GPDMA2_4_STOP
description: GPDMA2 channel 4 stop in debug.
bit_offset: 20
bit_size: 1
- name: DBG_GPDMA2_5_STOP
description: GPDMA2 channel 5 stop in debug.
bit_offset: 21
bit_size: 1
- name: DBG_GPDMA2_6_STOP
description: GPDMA2 channel 6 stop in debug.
bit_offset: 22
bit_size: 1
- name: DBG_GPDMA2_7_STOP
description: GPDMA2 channel 7 stop in debug.
bit_offset: 23
bit_size: 1
- name: DBG_GPDMA2_8_STOP
description: GPDMA2 channel 8 stop in debug.
bit_offset: 24
bit_size: 1
- name: DBG_GPDMA2_9_STOP
description: GPDMA2 channel 9 stop in debug.
bit_offset: 25
bit_size: 1
- name: DBG_GPDMA2_10_STOP
description: GPDMA2 channel 10 stop in debug.
bit_offset: 26
bit_size: 1
- name: DBG_GPDMA2_11_STOP
description: GPDMA2 channel 11 stop in debug.
bit_offset: 27
bit_size: 1
- name: DBG_GPDMA2_12_STOP
description: GPDMA2 channel 12 stop in debug.
bit_offset: 28
bit_size: 1
- name: DBG_GPDMA2_13_STOP
description: GPDMA2 channel 13 stop in debug.
bit_offset: 29
bit_size: 1
- name: DBG_GPDMA2_14_STOP
description: GPDMA2 channel 14 stop in debug.
bit_offset: 30
bit_size: 1
- name: DBG_GPDMA2_15_STOP
description: GPDMA2 channel 15 stop in debug.
bit_offset: 31
bit_size: 1
array:
len: 16
stride: 1
fieldset/APB1HFZR:
description: DBGMCU APB1H peripheral freeze register.
fields:
- name: DBG_LPTIM2_STOP
- name: LPTIM2_STOP
description: LPTIM2 stop in debug.
bit_offset: 5
bit_size: 1
fieldset/APB1LFZR:
description: DBGMCU APB1L peripheral freeze register.
fields:
- name: DBG_TIM2_STOP
- name: TIM2_STOP
description: TIM2 stop in debug.
bit_offset: 0
bit_size: 1
- name: DBG_TIM3_STOP
- name: TIM3_STOP
description: TIM3 stop in debug.
bit_offset: 1
bit_size: 1
- name: DBG_TIM4_STOP
- name: TIM4_STOP
description: TIM4 stop in debug.
bit_offset: 2
bit_size: 1
- name: DBG_TIM5_STOP
- name: TIM5_STOP
description: TIM5 stop in debug.
bit_offset: 3
bit_size: 1
- name: DBG_TIM6_STOP
- name: TIM6_STOP
description: TIM6 stop in debug.
bit_offset: 4
bit_size: 1
- name: DBG_TIM7_STOP
- name: TIM7_STOP
description: TIM7 stop in debug.
bit_offset: 5
bit_size: 1
- name: DBG_TIM12_STOP
- name: TIM12_STOP
description: TIM12 stop in debug.
bit_offset: 6
bit_size: 1
- name: DBG_TIM13_STOP
- name: TIM13_STOP
description: TIM13 stop in debug.
bit_offset: 7
bit_size: 1
- name: DBG_TIM14_STOP
- name: TIM14_STOP
description: TIM14 stop in debug.
bit_offset: 8
bit_size: 1
- name: DBG_WWDG_STOP
- name: WWDG_STOP
description: WWDG stop in debug.
bit_offset: 11
bit_size: 1
- name: DBG_IWDG_STOP
- name: IWDG_STOP
description: IWDG stop in debug.
bit_offset: 12
bit_size: 1
- name: DBG_I2C1_STOP
- name: I2C1_STOP
description: I2C1 SMBUS timeout stop in debug.
bit_offset: 21
bit_size: 1
- name: DBG_I2C2_STOP
- name: I2C2_STOP
description: I2C2 SMBUS timeout stop in debug.
bit_offset: 22
bit_size: 1
- name: DBG_I3C1_STOP
- name: I3C1_STOP
description: I3C1 SCL stall counter stop in debug.
bit_offset: 23
bit_size: 1
fieldset/APB2FZR:
description: DBGMCU APB2 peripheral freeze register.
fields:
- name: DBG_TIM1_STOP
- name: TIM1_STOP
description: TIM1 stop in debug.
bit_offset: 11
bit_size: 1
- name: DBG_TIM8_STOP
- name: TIM8_STOP
description: TIM8 stop in debug.
bit_offset: 13
bit_size: 1
- name: DBG_TIM15_STOP
- name: TIM15_STOP
description: TIM15 stop in debug.
bit_offset: 16
bit_size: 1
- name: DBG_TIM16_STOP
- name: TIM16_STOP
description: TIM16 stop in debug.
bit_offset: 17
bit_size: 1
- name: DBG_TIM17_STOP
- name: TIM17_STOP
description: TIM17 stop in debug.
bit_offset: 18
bit_size: 1
fieldset/APB3FZR:
description: DBGMCU APB3 peripheral freeze register.
fields:
- name: DBG_I2C3_STOP
- name: I2C3_STOP
description: I2C3 SMBUS timeout stop in debug.
bit_offset: 10
bit_size: 1
- name: DBG_I2C4_STOP
- name: I2C4_STOP
description: I2C4 SMBUS timeout stop in debug.
bit_offset: 11
bit_size: 1
- name: DBG_LPTIM1_STOP
- name: LPTIM1_STOP
description: LPTIM1 stop in debug.
bit_offset: 17
bit_size: 1
- name: DBG_LPTIM3_STOP
- name: LPTIM3_STOP
description: LPTIM3 stop in debug.
bit_offset: 18
bit_size: 1
- name: DBG_LPTIM4_STOP
- name: LPTIM4_STOP
description: LPTIM4 stop in debug.
bit_offset: 19
bit_size: 1
- name: DBG_LPTIM5_STOP
- name: LPTIM5_STOP
description: LPTIM5 stop in debug.
bit_offset: 20
bit_size: 1
- name: DBG_LPTIM6_STOP
- name: LPTIM6_STOP
description: LPTIM6 stop in debug.
bit_offset: 21
bit_size: 1
- name: DBG_RTC_STOP
- name: RTC_STOP
description: RTC stop in debug.
bit_offset: 30
bit_size: 1
fieldset/AUTH_ACK:
description: DBGMCU debug authentication mailbox acknowledge register.
fields:
- name: HOST_ACK
description: Host to device acknowledge. The device sets this bit to indicate that it has placed a message in the DBGMCU_DBG_AUTH_DEVICE register. It should be reset by the host after reading the message.
bit_offset: 0
bit_size: 1
- name: DEV_ACK
description: Device to device acknowledge. The host sets this bit to indicate that it has placed a message in the DBGMCU_DBG_AUTH_HOST register. It is reset by the device after reading the message.
bit_offset: 1
bit_size: 1
fieldset/CIDR0:
description: DBGMCU CoreSight component identity register 0.
fields:
@ -371,11 +266,11 @@ fieldset/CIDR3:
fieldset/CR:
description: DBGMCU configuration register.
fields:
- name: DBG_STOP
- name: STOP
description: Allows debug in Stop mode All clocks are disabled automatically in Stop mode. All active clocks and oscillators continue to run during Stop mode, allowing full debug capability. On exit from Stop mode, the clock settings are set to the Stop mode exit state.
bit_offset: 1
bit_size: 1
- name: DBG_STANDBY
- name: STANDBY
description: Allows debug in Standby mode All clocks are disabled and the core powered down automatically in Standby mode. All active clocks and oscillators continue to run during Standby mode, and the core supply is maintained, allowing full debug capability. On exit from Standby mode, a system reset is performed.
bit_offset: 2
bit_size: 1
@ -395,31 +290,6 @@ fieldset/CR:
description: Debug credentials reset type This bit selects which type of reset is used to revoke the debug authentication credentials.
bit_offset: 16
bit_size: 1
fieldset/DBG_AUTH_ACK:
description: DBGMCU debug authentication mailbox acknowledge register.
fields:
- name: HOST_ACK
description: Host to device acknowledge. The device sets this bit to indicate that it has placed a message in the DBGMCU_DBG_AUTH_DEVICE register. It should be reset by the host after reading the message.
bit_offset: 0
bit_size: 1
- name: DEV_ACK
description: Device to device acknowledge. The host sets this bit to indicate that it has placed a message in the DBGMCU_DBG_AUTH_HOST register. It is reset by the device after reading the message.
bit_offset: 1
bit_size: 1
fieldset/DBG_AUTH_DEVICE:
description: DBGMCU debug authentication mailbox device register.
fields:
- name: MESSAGE
description: Device to debug host mailbox message. During debug authentication the device communicates with the debug host via this register.
bit_offset: 0
bit_size: 32
fieldset/DBG_AUTH_HOST:
description: DBGMCU debug authentication mailbox host register.
fields:
- name: MESSAGE
description: Debug host to device mailbox message. During debug authentication the debug host communicates with the device via this register.
bit_offset: 0
bit_size: 32
fieldset/IDCODE:
description: DBGMCU identity code register.
fields:

24
transforms/DBGMCU.yaml Normal file
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@ -0,0 +1,24 @@
transforms:
- !Rename
from: ^DBG_(.+)
to: $1
- !RenameFields
fieldset: .+
from: ^DBG_(.+)
to: $1
- !RenameRegisters
block: .+
from: ^DBG_(.+)
to: $1
- !RenameEnumVariants
enum: .+
from: ^DBG_(.+)
to: $1
- !MakeFieldArray
fieldsets: AHB1FZR
from: GPDMA(\d)_(\d{1,2})_STOP
to: GPDMA${1}_STOP
- !DeleteFieldsets
from: AUTH_(DEVICE|HOST)