Merge pull request #402 from eZioPan/dts-v1

dts v1
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Dario Nieuwenhuis 2024-02-22 00:40:54 +00:00 committed by GitHub
commit 3e97a2e937
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3 changed files with 213 additions and 0 deletions

201
data/registers/dts_v1.yaml Normal file
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block/DTS:
description: Digital temperature sensor.
items:
- name: CFGR1
description: Temperature sensor configuration register 1.
byte_offset: 0
fieldset: CFGR1
- name: T0VALR1
description: Temperature sensor T0 value register 1.
byte_offset: 8
fieldset: T0VALR1
- name: RAMPVALR
description: Temperature sensor ramp value register.
byte_offset: 16
fieldset: RAMPVALR
- name: ITR1
description: Temperature sensor interrupt threshold register 1.
byte_offset: 20
fieldset: ITR1
- name: DR
description: Temperature sensor data register.
byte_offset: 28
fieldset: DR
- name: SR
description: Temperature sensor status register.
byte_offset: 32
fieldset: SR
- name: ITENR
description: Temperature sensor interrupt enable register.
byte_offset: 36
fieldset: ITENR
- name: ICIFR
description: Temperature sensor clear interrupt flag register.
byte_offset: 40
fieldset: ICIFR
- name: OR
description: Temperature sensor option register.
byte_offset: 44
fieldset: OR
fieldset/CFGR1:
description: Temperature sensor configuration register 1.
fields:
- name: EN
description: 'Temperature sensor 1 enable bit This bit is set and cleared by software. Note: Once enabled, the temperature sensor is active after a specific delay time. The TS1_RDY flag will be set when the sensor is ready.'
bit_offset: 0
bit_size: 1
- name: START
description: Start frequency measurement on temperature sensor 1 This bit is set and cleared by software.
bit_offset: 4
bit_size: 1
- name: INTRIG_SEL
description: 'Input trigger selection bit for temperature sensor 1 These bits are set and cleared by software. They select which input triggers a temperature measurement. Refer to Section 19.3.10: Trigger input.'
bit_offset: 8
bit_size: 4
- name: SMP_TIME
description: Sampling time for temperature sensor 1 These bits allow increasing the sampling time to improve measurement precision. When the PCLK clock is selected as reference clock (REFCLK_SEL = 0), the measurement will be performed at TS1_SMP_TIME period of CLK_PTAT. When the LSE is selected as reference clock (REFCLK_SEL =1), the measurement will be performed at TS1_SMP_TIME period of LSE.
bit_offset: 16
bit_size: 4
- name: REFCLK_SEL
description: Reference clock selection bit This bit is set and cleared by software. It indicates whether the reference clock is the high speed clock (PCLK) or the low speed clock (LSE).
bit_offset: 20
bit_size: 1
- name: Q_MEAS_OPT
description: Quick measurement option bit This bit is set and cleared by software. It is used to increase the measurement speed by suppressing the calibration step. It is effective only when the LSE clock is used as reference clock (REFCLK_SEL=1).
bit_offset: 21
bit_size: 1
- name: HSREF_CLK_DIV
description: High speed clock division ratio These bits are set and cleared by software. They can be used to define the division ratio for the main clock in order to obtain the internal frequency lower than 1 MHz required for the calibration. They are applicable only for calibration when PCLK is selected as reference clock (REFCLK_SEL=0). ...
bit_offset: 24
bit_size: 7
fieldset/DR:
description: Temperature sensor data register.
fields:
- name: MFREQ
description: Value of the counter output value for temperature sensor 1.
bit_offset: 0
bit_size: 16
fieldset/ICIFR:
description: Temperature sensor clear interrupt flag register.
fields:
- name: CITEF
description: Interrupt clear flag for end of measurement on temperature sensor 1 Writing 1 to this bit clears the TS1_ITEF flag in the DTS_SR register.
bit_offset: 0
bit_size: 1
- name: CITLF
description: Interrupt clear flag for low threshold on temperature sensor 1 Writing 1 to this bit clears the TS1_ITLF flag in the DTS_SR register.
bit_offset: 1
bit_size: 1
- name: CITHF
description: Interrupt clear flag for high threshold on temperature sensor 1 Writing this bit to 1 clears the TS1_ITHF flag in the DTS_SR register.
bit_offset: 2
bit_size: 1
- name: CAITEF
description: Write once bit. Clear the asynchronous IT flag for End Of Measure for thermal sensor 1. Writing 1 clears the TS1_AITEF flag of the DTS_SR register.
bit_offset: 4
bit_size: 1
- name: CAITLF
description: Asynchronous interrupt clear flag for low threshold on temperature sensor 1 Writing 1 to this bit clears the TS1_AITLF flag in the DTS_SR register.
bit_offset: 5
bit_size: 1
- name: CAITHF
description: Asynchronous interrupt clear flag for high threshold on temperature sensor 1 Writing 1 to this bit clears the TS1_AITHF flag in the DTS_SR register.
bit_offset: 6
bit_size: 1
fieldset/ITENR:
description: Temperature sensor interrupt enable register.
fields:
- name: ITEEN
description: Interrupt enable flag for end of measurement on temperature sensor 1, synchronized on PCLK. This bit are set and cleared by software. It enables the synchronous interrupt for end of measurement.
bit_offset: 0
bit_size: 1
- name: ITLEN
description: Interrupt enable flag for low threshold on temperature sensor 1, synchronized on PCLK. This bit are set and cleared by software. It enables the synchronous interrupt when the measure reaches or is below the low threshold.
bit_offset: 1
bit_size: 1
- name: ITHEN
description: Interrupt enable flag for high threshold on temperature sensor 1, synchronized on PCLK. This bit are set and cleared by software. It enables the interrupt when the measure reaches or is above the high threshold.
bit_offset: 2
bit_size: 1
- name: AITEEN
description: Asynchronous interrupt enable flag for end of measurement on temperature sensor 1 This bit are set and cleared by software. It enables the asynchronous interrupt for end of measurement (only when REFCLK_SEL = 1).
bit_offset: 4
bit_size: 1
- name: AITLEN
description: Asynchronous interrupt enable flag for low threshold on temperature sensor 1. This bit are set and cleared by software. It enables the asynchronous interrupt when the temperature is below the low threshold (only when REFCLK_SEL= 1).
bit_offset: 5
bit_size: 1
- name: AITHEN
description: Asynchronous interrupt enable flag on high threshold for temperature sensor 1. This bit are set and cleared by software. It enables the asynchronous interrupt when the temperature is above the high threshold (only when REFCLK_SEL= 1).
bit_offset: 6
bit_size: 1
fieldset/ITR1:
description: Temperature sensor interrupt threshold register 1.
fields:
- name: LITTHD
description: Low interrupt threshold for temperature sensor 1 These bits are set and cleared by software. They indicate the lowest value than can be reached before raising an interrupt signal.
bit_offset: 0
bit_size: 16
- name: HITTHD
description: High interrupt threshold for temperature sensor 1 These bits are set and cleared by software. They indicate the highest value than can be reached before raising an interrupt signal.
bit_offset: 16
bit_size: 16
fieldset/OR:
description: Temperature sensor option register.
fields:
- name: OP
description: general purpose option bits.
bit_offset: 0
bit_size: 1
array:
len: 32
stride: 1
fieldset/RAMPVALR:
description: Temperature sensor ramp value register.
fields:
- name: RAMP_COEFF
description: Engineering value of the ramp coefficient for the temperature sensor 1. This value is expressed in Hz/<2F>C.
bit_offset: 0
bit_size: 16
fieldset/SR:
description: Temperature sensor status register.
fields:
- name: ITEF
description: 'Interrupt flag for end of measurement on temperature sensor 1, synchronized on PCLK. This bit is set by hardware when a temperature measure is done. It is cleared by software by writing 1 to the TS2_CITEF bit in the DTS_ICIFR register. Note: This bit is active only when the TS1_ITEFEN bit is set.'
bit_offset: 0
bit_size: 1
- name: ITLF
description: 'Interrupt flag for low threshold on temperature sensor 1, synchronized on PCLK. This bit is set by hardware when the low threshold is set and reached. It is cleared by software by writing 1 to the TS1_CITLF bit in the DTS_ICIFR register. Note: This bit is active only when the TS1_ITLFEN bit is set.'
bit_offset: 1
bit_size: 1
- name: ITHF
description: 'Interrupt flag for high threshold on temperature sensor 1, synchronized on PCLK This bit is set by hardware when the high threshold is set and reached. It is cleared by software by writing 1 to the TS1_CITHF bit in the DTS_ICIFR register. Note: This bit is active only when the TS1_ITHFEN bit is set.'
bit_offset: 2
bit_size: 1
- name: AITEF
description: 'Asynchronous interrupt flag for end of measure on temperature sensor 1 This bit is set by hardware when a temperature measure is done. It is cleared by software by writing 1 to the TS1_CAITEF bit in the DTS_ICIFR register. Note: This bit is active only when the TS1_AITEFEN bit is set.'
bit_offset: 4
bit_size: 1
- name: AITLF
description: 'Asynchronous interrupt flag for low threshold on temperature sensor 1 This bit is set by hardware when the low threshold is reached. It is cleared by software by writing 1 to the TS1_CAITLF bit in the DTS_ICIFR register. Note: This bit is active only when the TS1_AITLFEN bit is set.'
bit_offset: 5
bit_size: 1
- name: AITHF
description: 'Asynchronous interrupt flag for high threshold on temperature sensor 1 This bit is set by hardware when the high threshold is reached. It is cleared by software by writing 1 to the TS1_CAITHF bit in the DTS_ICIFR register. Note: This bit is active only when the TS1_AITHFEN bit is set.'
bit_offset: 6
bit_size: 1
- name: RDY
description: Temperature sensor 1 ready flag This bit is set and reset by hardware. It indicates that a measurement is ongoing.
bit_offset: 15
bit_size: 1
fieldset/T0VALR1:
description: Temperature sensor T0 value register 1.
fields:
- name: FMT0
description: Engineering value of the frequency measured at T0 for. temperature sensor 1 This value is expressed in 0.1 kHz.
bit_offset: 0
bit_size: 16
- name: T0
description: 'Engineering value of the T0 temperature for temperature sensor 1. Others: Reserved, must not be used.'
bit_offset: 16
bit_size: 2

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@ -606,6 +606,7 @@ impl PeriMatcher {
("STM32WL.*:.*:COMP:.*", ("comp", "v3", "COMP")), ("STM32WL.*:.*:COMP:.*", ("comp", "v3", "COMP")),
(r".*:.*:DCACHE:.*", ("dcache", "v1", "DCACHE")), (r".*:.*:DCACHE:.*", ("dcache", "v1", "DCACHE")),
(".*:.*:PSSI:.*", ("pssi", "v1", "PSSI")), (".*:.*:PSSI:.*", ("pssi", "v1", "PSSI")),
(".*:.*:DTS:.*", ("dts", "v1", "DTS")),
]; ];
Self { Self {

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transforms/DTS.yaml Normal file
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transforms:
- !RenameFields
fieldset: .+
from: ^TS1_(.+)$
to: $1
- !MakeFieldArray
fieldsets: OR
from: TS_OP\d+
to: OP