From 39dcea050bf28e347e474e8adc9d82300a189fb5 Mon Sep 17 00:00:00 2001
From: Dominic <git@msrd0.de>
Date: Mon, 12 Feb 2024 18:13:40 +0100
Subject: [PATCH] Add TCM_AXI_SHARED_CFG to SYSCFG_UR18 for STM32H7

---
 data/registers/syscfg_h7.yaml | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/data/registers/syscfg_h7.yaml b/data/registers/syscfg_h7.yaml
index bd08bee..cd7b580 100644
--- a/data/registers/syscfg_h7.yaml
+++ b/data/registers/syscfg_h7.yaml
@@ -321,6 +321,11 @@ fieldset/UR17:
     description: I/O high speed / low voltage
     bit_offset: 0
     bit_size: 1
+  - name: TCM_AXI_SHARED_CFG
+    description: ITCM-RAM / AXI-SRAM size
+    bit_offset: 16
+    bit_size: 2
+    enum: ITCM_AXI_RAM_SIZE
 fieldset/UR18:
   description: SYSCFG user register 18
   fields:
@@ -408,3 +413,18 @@ fieldset/UR9:
     description: Protected area start address for bank 2
     bit_offset: 16
     bit_size: 12
+enum/ITCM_AXI_RAM_SIZE:
+  bit_size: 2
+  variants:
+  - name: Itcm64Axi320
+    description: 64 Kbyte ITCM-RAM / 320 Kbyte AXI-SRAM
+    value: 0
+  - name: Itcm128Axi320
+    description: 128 Kbyte ITCM-RAM / 256 Kbyte AXI-SRAM
+    value: 1
+  - name: Itcm192Axi192
+    description: 192 Kbyte ITCM-RAM / 192 Kbyte AXI-SRAM
+    value: 2
+  - name: Itcm256Axi128
+    description: 256 Kbyte ITCM-RAM / 128 Kbyte AXI-SRAM
+    value: 3