guangzong/stm32-data
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

hrtim: further cleanup

Browse Source
This commit is contained in:
xoviat 2023-05-28 15:42:57 -05:00
parent 87c55dd0ce
commit 3728fefee1
1 changed files with 98 additions and 201 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

299
data/registers/hrtim_v1.yaml
View File

@ -17,7 +17,7 @@ block/HRTIM:
access: Write access: Write
fieldset: MICR fieldset: MICR
- name: MDIER - name: MDIER
description: MDIER4 description: Master Timer DMA / Interrupt Enable Register
byte_offset: 12 byte_offset: 12
fieldset: MDIER fieldset: MDIER
- name: MCNTR - name: MCNTR
@ -32,22 +32,16 @@ block/HRTIM:
description: "Master Timer Repetition Register" description: "Master Timer Repetition Register"
byte_offset: 24 byte_offset: 24
fieldset: MREP fieldset: MREP
- name: MCMP1R - name: MCMPXR
description: "Master Timer Compare 1 Register" description: "Master Timer Compare X Register"
byte_offset: 28 byte_offset: 28
fieldset: MCMP1R fieldset: MCMPXR
- name: MCMP2R array:
description: "Master Timer Compare 2 Register" offsets:
byte_offset: 36 - 0
fieldset: MCMP2R - 8
- name: MCMP3R - 12
description: "Master Timer Compare 3 Register" - 16
byte_offset: 40
fieldset: MCMP3R
- name: MCMP4R
description: "Master Timer Compare 4 Register"
byte_offset: 44
fieldset: MCMP4R
- name: TIMX - name: TIMX
description: "High Resolution Timer: TIMX" description: "High Resolution Timer: TIMX"
array: array:
@ -451,34 +445,13 @@ fieldset/FLTXR:
bit_offset: 31 bit_offset: 31
bit_size: 1 bit_size: 1
enum: LOCKED enum: LOCKED
fieldset/MCMP1R: fieldset/MCMPXR:
description: "Master Timer Compare 1 Register" description: "Master Timer Compare 1 Register"
fields: fields:
- name: MCMP1 - name: MCMP1
description: "Master Timer Compare 1 value" description: "Master Timer Compare 1 value"
bit_offset: 0 bit_offset: 0
bit_size: 16 bit_size: 16
fieldset/MCMP2R:
description: "Master Timer Compare 2 Register"
fields:
- name: MCMP2
description: "Master Timer Compare 2 value"
bit_offset: 0
bit_size: 16
fieldset/MCMP3R:
description: "Master Timer Compare 3 Register"
fields:
- name: MCMP3
description: "Master Timer Compare 3 value"
bit_offset: 0
bit_size: 16
fieldset/MCMP4R:
description: "Master Timer Compare 4 Register"
fields:
- name: MCMP4
description: "Master Timer Compare 4 value"
bit_offset: 0
bit_size: 16
fieldset/MCNTR: fieldset/MCNTR:
description: Master Timer Counter Register description: Master Timer Counter Register
fields: fields:
@ -507,7 +480,7 @@ fieldset/MCR:
bit_offset: 5 bit_offset: 5
bit_size: 1 bit_size: 1
- name: SYNCIN - name: SYNCIN
description: ynchronization input description: Synchronization input
bit_offset: 8 bit_offset: 8
bit_size: 2 bit_size: 2
enum: SYNCIN enum: SYNCIN
@ -533,26 +506,13 @@ fieldset/MCR:
description: Master Counter enable description: Master Counter enable
bit_offset: 16 bit_offset: 16
bit_size: 1 bit_size: 1
- name: TACEN - name: TXCEN
description: Timer A counter enable description: Timer X counter enable
bit_offset: 17 bit_offset: 17
bit_size: 1 bit_size: 1
- name: TBCEN array:
description: Timer B counter enable len: 5
bit_offset: 18 stride: 1
bit_size: 1
- name: TCCEN
description: Timer C counter enable
bit_offset: 19
bit_size: 1
- name: TDCEN
description: Timer D counter enable
bit_offset: 20
bit_size: 1
- name: TECEN
description: Timer E counter enable
bit_offset: 21
bit_size: 1
- name: DACSYNC - name: DACSYNC
description: AC Synchronization description: AC Synchronization
bit_offset: 25 bit_offset: 25
@ -572,125 +532,83 @@ fieldset/MCR:
bit_size: 2 bit_size: 2
enum: BRSTDMA enum: BRSTDMA
fieldset/MDIER: fieldset/MDIER:
description: MDIER4 description: Master Timer DMA / Interrupt Enable Register
fields: fields:
- name: MCMP1IE - name: MCMPXIE
description: MCMP1IE description: Master Compare X Interrupt Enable
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
- name: MCMP2IE array:
description: MCMP2IE len: 4
bit_offset: 1 stride: 1
bit_size: 1
- name: MCMP3IE
description: MCMP3IE
bit_offset: 2
bit_size: 1
- name: MCMP4IE
description: MCMP4IE
bit_offset: 3
bit_size: 1
- name: MREPIE - name: MREPIE
description: MREPIE description: Master Repetition Interrupt Enable
bit_offset: 4 bit_offset: 4
bit_size: 1 bit_size: 1
- name: SYNCIE - name: SYNCIE
description: SYNCIE description: Sync Input Interrupt Enable
bit_offset: 5 bit_offset: 5
bit_size: 1 bit_size: 1
- name: MUPDIE - name: MUPDIE
description: MUPDIE description: Master Update Interrupt Enable
bit_offset: 6 bit_offset: 6
bit_size: 1 bit_size: 1
- name: MCMP1DE - name: MCMPXDE
description: MCMP1DE description: Master Compare X DMA request Enable
bit_offset: 16 bit_offset: 16
bit_size: 1 bit_size: 1
- name: MCMP2DE array:
description: MCMP2DE len: 4
bit_offset: 17 stride: 1
bit_size: 1
- name: MCMP3DE
description: MCMP3DE
bit_offset: 18
bit_size: 1
- name: MCMP4DE
description: MCMP4DE
bit_offset: 19
bit_size: 1
- name: MREPDE - name: MREPDE
description: MREPDE description: Master Repetition DMA request Enable
bit_offset: 20 bit_offset: 20
bit_size: 1 bit_size: 1
- name: SYNCDE - name: SYNCDE
description: SYNCDE description: Sync Input DMA request Enable
bit_offset: 21 bit_offset: 21
bit_size: 1 bit_size: 1
- name: MUPDDE - name: MUPDDE
description: MUPDDE description: Master Update DMA request Enable
bit_offset: 22 bit_offset: 22
bit_size: 1 bit_size: 1
fieldset/MICR: fieldset/MICR:
description: "Master Timer Interrupt Clear Register" description: "Master Timer Interrupt Clear Register"
fields: fields:
- name: MCMP1C - name: MCMPXC
description: "Master Compare 1 Interrupt flag clear" description: "Master Compare X Interrupt flag clear"
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
enum_write: MCMP1C enum_write: MCPMXC
- name: MCMP2C array:
description: "Master Compare 2 Interrupt flag clear" len: 4
bit_offset: 1 stride: 1
bit_size: 1
enum_write: MCMP1C
- name: MCMP3C
description: "Master Compare 3 Interrupt flag clear"
bit_offset: 2
bit_size: 1
enum_write: MCMP1C
- name: MCMP4C
description: "Master Compare 4 Interrupt flag clear"
bit_offset: 3
bit_size: 1
enum_write: MCMP1C
- name: MREPC - name: MREPC
description: "Repetition Interrupt flag clear" description: "Repetition Interrupt flag clear"
bit_offset: 4 bit_offset: 4
bit_size: 1 bit_size: 1
enum_write: MCMP1C enum_write: MCPMXC
- name: SYNCC - name: SYNCC
description: "Sync Input Interrupt flag clear" description: "Sync Input Interrupt flag clear"
bit_offset: 5 bit_offset: 5
bit_size: 1 bit_size: 1
enum_write: MCMP1C enum_write: MCPMXC
- name: MUPDC - name: MUPDC
description: "Master update Interrupt flag clear" description: "Master update Interrupt flag clear"
bit_offset: 6 bit_offset: 6
bit_size: 1 bit_size: 1
enum_write: MCMP1C enum_write: MCPMXC
fieldset/MISR: fieldset/MISR:
description: "Master Timer Interrupt Status Register" description: "Master Timer Interrupt Status Register"
fields: fields:
- name: MCMP1 - name: MCMPX
description: "Master Compare 1 Interrupt Flag" description: "Master Compare X Interrupt Flag"
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
enum_read: EVENT enum_read: EVENT
- name: MCMP2 array:
description: "Master Compare 2 Interrupt Flag" len: 4
bit_offset: 1 stride: 1
bit_size: 1
enum_read: EVENT
- name: MCMP3
description: "Master Compare 3 Interrupt Flag"
bit_offset: 2
bit_size: 1
enum_read: EVENT
- name: MCMP4
description: "Master Compare 4 Interrupt Flag"
bit_offset: 3
bit_size: 1
enum_read: EVENT
- name: MREP - name: MREP
description: "Master Repetition Interrupt Flag" description: "Master Repetition Interrupt Flag"
bit_offset: 4 bit_offset: 4
@ -1080,116 +998,95 @@ fieldset/TIMXCR:
fieldset/TIMXDIER: fieldset/TIMXDIER:
description: Timerx DMA / Interrupt Enable Register description: Timerx DMA / Interrupt Enable Register
fields: fields:
- name: CMP1IE - name: CMPXIE
description: CMP1IE description: Compare X Interrupt Enable
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
- name: CMP2IE array:
description: CMP2IE len: 4
bit_offset: 1 stride: 1
bit_size: 1
- name: CMP3IE
description: CMP3IE
bit_offset: 2
bit_size: 1
- name: CMP4IE
description: CMP4IE
bit_offset: 3
bit_size: 1
- name: REPIE - name: REPIE
description: REPIE description: Repetition Interrupt Enable
bit_offset: 4 bit_offset: 4
bit_size: 1 bit_size: 1
- name: UPDIE - name: UPDIE
description: UPDIE description: Update Interrupt Enable
bit_offset: 6 bit_offset: 6
bit_size: 1 bit_size: 1
- name: CPT1IE - name: CPTXIE
description: CPT1IE description: Capture Interrupt Enable
bit_offset: 7 bit_offset: 7
bit_size: 1 bit_size: 1
- name: CPT2IE array:
description: CPT2IE len: 2
bit_offset: 8 stride: 1
bit_size: 1 - name: SETxXIE
- name: SETx1IE description: Output X Set Interrupt Enable
description: SET1xIE
bit_offset: 9 bit_offset: 9
bit_size: 1 bit_size: 1
array:
offsets:
- 0
- 2
- name: RSTx1IE - name: RSTx1IE
description: RSTx1IE description: Output X Reset Interrupt Enable
bit_offset: 10 bit_offset: 10
bit_size: 1 bit_size: 1
- name: SETx2IE offsets:
description: SETx2IE - 0
bit_offset: 11 - 2
bit_size: 1
- name: RSTx2IE
description: RSTx2IE
bit_offset: 12
bit_size: 1
- name: RSTIE - name: RSTIE
description: RSTIE description: Reset/roll-over Interrupt Enable
bit_offset: 13 bit_offset: 13
bit_size: 1 bit_size: 1
- name: DLYPRTIE - name: DLYPRTIE
description: DLYPRTIE description: Delayed Protection Interrupt Enable
bit_offset: 14 bit_offset: 14
bit_size: 1 bit_size: 1
- name: CMP1DE - name: CMPXDE
description: CMP1DE description: Compare X DMA request Enable
bit_offset: 16 bit_offset: 16
bit_size: 1 bit_size: 1
- name: CMP2DE array:
description: CMP2DE len: 4
bit_offset: 17 stride: 1
bit_size: 1
- name: CMP3DE
description: CMP3DE
bit_offset: 18
bit_size: 1
- name: CMP4DE
description: CMP4DE
bit_offset: 19
bit_size: 1
- name: REPDE - name: REPDE
description: REPDE description: Repetition DMA request Enable
bit_offset: 20 bit_offset: 20
bit_size: 1 bit_size: 1
- name: UPDDE - name: UPDDE
description: UPDDE description: Update DMA request Enable
bit_offset: 22 bit_offset: 22
bit_size: 1 bit_size: 1
- name: CPT1DE - name: CPTXDE
description: CPT1DE description: Capture X DMA request Enable
bit_offset: 23 bit_offset: 23
bit_size: 1 bit_size: 1
- name: CPT2DE array:
description: CPT2DE len: 2
bit_offset: 24 stride: 1
bit_size: 1 - name: SETxXDE
- name: SETx1DE description: Output X Set DMA request Enable
description: SET1xDE
bit_offset: 25 bit_offset: 25
bit_size: 1 bit_size: 1
array:
offsets:
- 0
- 2
- name: RSTx1DE - name: RSTx1DE
description: RSTx1DE description: Output X Reset DMA request Enable
bit_offset: 26 bit_offset: 26
bit_size: 1 bit_size: 1
- name: SETx2DE array:
description: SETx2DE offsets:
bit_offset: 27 - 0
bit_size: 1 - 2
- name: RSTx2DE
description: RSTx2DE
bit_offset: 28
bit_size: 1
- name: RSTDE - name: RSTDE
description: RSTDE description: Reset/roll-over DMA request Enable
bit_offset: 29 bit_offset: 29
bit_size: 1 bit_size: 1
- name: DLYPRTDE - name: DLYPRTDE
description: DLYPRTDE description: Delayed Protection DMA request Enable
bit_offset: 30 bit_offset: 30
bit_size: 1 bit_size: 1
fieldset/TIMXICR: fieldset/TIMXICR:
@ -1596,7 +1493,7 @@ enum/LOCKED:
- name: Locked - name: Locked
description: Bits are read-only description: Bits are read-only
value: 1 value: 1
enum/MCMP1C: enum/MCPMXC:
bit_size: 1 bit_size: 1
variants: variants:
- name: Clear - name: Clear