stm32g4 support.
This commit is contained in:
Dario Nieuwenhuis
parent
6af084d858
commit
353411841c
283
data/registers/pwr_g4.yaml
Normal file
283
data/registers/pwr_g4.yaml
Normal file
@ -0,0 +1,283 @@
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---
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block/PWR:
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description: Power control
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items:
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- name: CR1
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description: Power control register 1
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byte_offset: 0
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fieldset: CR1
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- name: CR2
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description: Power control register 2
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byte_offset: 4
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fieldset: CR2
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- name: CR3
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description: Power control register 3
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byte_offset: 8
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fieldset: CR3
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- name: CR4
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description: Power control register 4
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byte_offset: 12
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fieldset: CR4
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- name: SR1
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description: Power status register 1
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byte_offset: 16
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access: Read
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fieldset: SR1
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- name: SR2
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description: Power status register 2
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byte_offset: 20
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access: Read
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fieldset: SR2
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- name: SCR
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description: Power status clear register
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byte_offset: 24
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access: Write
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fieldset: SCR
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- name: PUCR
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description: Power Port pull-up control register
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byte_offset: 32
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fieldset: PCR
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array:
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len: 7
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stride: 8
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- name: PDCR
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description: Power Port pull-down control register
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byte_offset: 36
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fieldset: PCR
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array:
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len: 7
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stride: 8
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- name: CR5
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description: Power control register 5
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byte_offset: 128
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fieldset: CR5
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fieldset/CR1:
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description: Power control register 1
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fields:
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- name: LPMS
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description: Low-power mode selection
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bit_offset: 0
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bit_size: 3
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- name: DBP
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description: Disable backup domain write protection
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bit_offset: 8
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bit_size: 1
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- name: VOS
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description: Voltage scaling range selection
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bit_offset: 9
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bit_size: 2
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- name: LPR
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description: Low-power run
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bit_offset: 14
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bit_size: 1
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fieldset/CR2:
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description: Power control register 2
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fields:
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- name: PVDE
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description: Power voltage detector enable
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bit_offset: 0
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bit_size: 1
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- name: PLS
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description: Power voltage detector level selection
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bit_offset: 1
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bit_size: 3
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- name: PVMEN1
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description: "Peripheral voltage monitoring 1 enable: VDDA vs. COMP min voltage"
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bit_offset: 4
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bit_size: 1
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- name: PVMEN2
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description: "Peripheral voltage monitoring 2 enable: VDDA vs. Fast DAC min voltage"
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bit_offset: 5
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bit_size: 1
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- name: PVMEN3
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description: "Peripheral voltage monitoring 3 enable: VDDA vs. ADC min voltage 1.62V"
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bit_offset: 6
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bit_size: 1
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- name: PVMEN4
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description: "Peripheral voltage monitoring 4 enable: VDDA vs. OPAMP/DAC min voltage"
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bit_offset: 7
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bit_size: 1
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fieldset/CR3:
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description: Power control register 3
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fields:
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- name: EWUP1
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description: Enable Wakeup pin WKUP1
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bit_offset: 0
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bit_size: 1
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- name: EWUP2
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description: Enable Wakeup pin WKUP2
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bit_offset: 1
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bit_size: 1
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- name: EWUP3
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description: Enable Wakeup pin WKUP3
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bit_offset: 2
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bit_size: 1
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- name: EWUP4
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description: Enable Wakeup pin WKUP4
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bit_offset: 3
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bit_size: 1
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- name: EWUP5
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description: Enable Wakeup pin WKUP5
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bit_offset: 4
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bit_size: 1
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- name: RRS
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description: SRAM2 retention in Standby mode
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bit_offset: 8
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bit_size: 1
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- name: APC
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description: Apply pull-up and pull-down configuration
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bit_offset: 10
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bit_size: 1
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- name: UCPD1_STDBY
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description: STDBY
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bit_offset: 13
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bit_size: 1
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- name: UCPD1_DBDIS
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description: DBDIS
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bit_offset: 14
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bit_size: 1
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- name: EIWUL
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description: Enable external WakeUp line
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bit_offset: 15
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bit_size: 1
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fieldset/CR4:
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description: Power control register 4
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fields:
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- name: WP1
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description: Wakeup pin WKUP1 polarity
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bit_offset: 0
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bit_size: 1
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- name: WP2
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description: Wakeup pin WKUP2 polarity
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bit_offset: 1
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bit_size: 1
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- name: WP3
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description: Wakeup pin WKUP3 polarity
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bit_offset: 2
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bit_size: 1
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- name: WP4
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description: Wakeup pin WKUP4 polarity
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bit_offset: 3
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bit_size: 1
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- name: WP5
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description: Wakeup pin WKUP5 polarity
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bit_offset: 4
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bit_size: 1
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- name: VBE
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description: VBAT battery charging enable
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bit_offset: 8
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bit_size: 1
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- name: VBRS
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description: VBAT battery charging resistor selection
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bit_offset: 9
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bit_size: 1
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fieldset/CR5:
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description: Power control register 5
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fields:
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- name: R1MODE
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description: Main regular range 1 mode
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bit_offset: 0
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bit_size: 1
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fieldset/PCR:
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description: Power Port pull control register
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fields:
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- name: P
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description: Port pull bit y (y=0..15)
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bit_offset: 0
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bit_size: 1
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array:
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len: 16
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stride: 1
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fieldset/SCR:
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description: Power status clear register
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fields:
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- name: CWUF1
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description: Clear wakeup flag 1
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bit_offset: 0
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bit_size: 1
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- name: CWUF2
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description: Clear wakeup flag 2
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bit_offset: 1
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bit_size: 1
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- name: CWUF3
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description: Clear wakeup flag 3
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bit_offset: 2
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bit_size: 1
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- name: CWUF4
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description: Clear wakeup flag 4
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bit_offset: 3
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bit_size: 1
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- name: CWUF5
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description: Clear wakeup flag 5
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bit_offset: 4
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bit_size: 1
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- name: CSBF
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description: Clear standby flag
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bit_offset: 8
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bit_size: 1
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fieldset/SR1:
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description: Power status register 1
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fields:
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- name: WUF1
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description: Wakeup flag 1
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bit_offset: 0
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bit_size: 1
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- name: WUF2
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description: Wakeup flag 2
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bit_offset: 1
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bit_size: 1
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- name: WUF3
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description: Wakeup flag 3
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bit_offset: 2
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bit_size: 1
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- name: WUF4
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description: Wakeup flag 4
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bit_offset: 3
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bit_size: 1
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- name: WUF5
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description: Wakeup flag 5
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bit_offset: 4
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bit_size: 1
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- name: SBF
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description: Standby flag
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bit_offset: 8
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bit_size: 1
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- name: WUFI
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description: Wakeup flag internal
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bit_offset: 15
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bit_size: 1
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fieldset/SR2:
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description: Power status register 2
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fields:
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- name: REGLPS
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description: Low-power regulator started
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bit_offset: 8
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bit_size: 1
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- name: REGLPF
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description: Low-power regulator flag
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bit_offset: 9
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bit_size: 1
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- name: VOSF
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description: Voltage scaling flag
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bit_offset: 10
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bit_size: 1
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- name: PVDO
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description: Power voltage detector output
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bit_offset: 11
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bit_size: 1
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- name: PVMO1
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description: "Peripheral voltage monitoring output: VDDUSB vs. 1.2 V"
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bit_offset: 12
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bit_size: 1
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- name: PVMO2
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description: "Peripheral voltage monitoring output: VDDIO2 vs. 0.9 V"
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bit_offset: 13
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bit_size: 1
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- name: PVMO3
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description: "Peripheral voltage monitoring output: VDDA vs. 1.62 V"
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bit_offset: 14
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bit_size: 1
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- name: PVMO4
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description: "Peripheral voltage monitoring output: VDDA vs. 2.2 V"
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bit_offset: 15
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bit_size: 1
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155
data/registers/syscfg_g4.yaml
Normal file
155
data/registers/syscfg_g4.yaml
Normal file
@ -0,0 +1,155 @@
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---
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block/SYSCFG:
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description: System configuration controller
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items:
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- name: MEMRMP
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description: Remap Memory register
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byte_offset: 0
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fieldset: MEMRMP
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- name: CFGR1
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description: peripheral mode configuration register
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byte_offset: 4
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fieldset: CFGR1
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- name: EXTICR
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description: external interrupt configuration register 1
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array:
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len: 4
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stride: 4
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byte_offset: 8
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fieldset: EXTICR
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- name: SCSR
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description: CCM SRAM control and status register
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byte_offset: 24
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fieldset: SCSR
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- name: CFGR2
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description: configuration register 2
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byte_offset: 28
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fieldset: CFGR2
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- name: SWPR
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description: SRAM Write protection register 1
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byte_offset: 32
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fieldset: SWPR
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- name: SKR
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description: SRAM2 Key Register
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byte_offset: 36
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access: Write
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fieldset: SKR
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fieldset/CFGR1:
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description: peripheral mode configuration register
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fields:
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- name: BOOSTEN
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description: BOOSTEN
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bit_offset: 8
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bit_size: 1
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- name: ANASWVDD
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description: GPIO analog switch control voltage selection
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bit_offset: 9
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bit_size: 1
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- name: I2C_PB6_FMP
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description: FM+ drive capability on PB6
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bit_offset: 16
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bit_size: 1
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- name: I2C_PB7_FMP
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description: FM+ drive capability on PB6
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bit_offset: 17
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bit_size: 1
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- name: I2C_PB8_FMP
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description: FM+ drive capability on PB6
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bit_offset: 18
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bit_size: 1
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- name: I2C_PB9_FMP
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description: FM+ drive capability on PB6
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bit_offset: 19
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bit_size: 1
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- name: I2C1_FMP
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description: I2C1 FM+ drive capability enable
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bit_offset: 20
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bit_size: 1
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- name: I2C2_FMP
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description: I2C1 FM+ drive capability enable
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bit_offset: 21
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bit_size: 1
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- name: I2C3_FMP
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description: I2C1 FM+ drive capability enable
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bit_offset: 22
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bit_size: 1
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- name: I2C4_FMP
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description: I2C1 FM+ drive capability enable
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bit_offset: 23
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bit_size: 1
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- name: FPU_IE
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description: FPU Interrupts Enable
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bit_offset: 26
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bit_size: 6
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fieldset/CFGR2:
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description: configuration register 2
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fields:
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- name: CLL
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description: Core Lockup Lock
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bit_offset: 0
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bit_size: 1
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- name: SPL
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description: SRAM Parity Lock
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bit_offset: 1
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bit_size: 1
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- name: PVDL
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description: PVD Lock
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bit_offset: 2
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bit_size: 1
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- name: ECCL
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description: ECC Lock
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bit_offset: 3
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bit_size: 1
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- name: SPF
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description: SRAM Parity Flag
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bit_offset: 8
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bit_size: 1
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fieldset/EXTICR:
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description: external interrupt configuration register
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fields:
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- name: EXTI
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description: EXTI x configuration
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bit_offset: 0
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bit_size: 4
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array:
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len: 4
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stride: 4
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fieldset/MEMRMP:
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description: Remap Memory register
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fields:
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- name: MEM_MODE
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description: Memory mapping selection
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bit_offset: 0
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bit_size: 3
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- name: FB_mode
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description: User Flash Bank mode
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bit_offset: 8
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bit_size: 1
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fieldset/SCSR:
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description: CCM SRAM control and status register
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fields:
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- name: CCMER
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description: CCM SRAM Erase
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bit_offset: 0
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bit_size: 1
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- name: CCMBSY
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description: CCM SRAM busy by erase operation
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bit_offset: 1
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bit_size: 1
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fieldset/SKR:
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description: SRAM2 Key Register
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fields:
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||||||
|
- name: KEY
|
||||||
|
description: SRAM2 Key for software erase
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 8
|
||||||
|
fieldset/SWPR:
|
||||||
|
description: SRAM Write protection register
|
||||||
|
fields:
|
||||||
|
- name: Page_WP
|
||||||
|
description: Write protection
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 1
|
||||||
|
array:
|
||||||
|
len: 32
|
||||||
|
stride: 1
|
||||||
@ -125,6 +125,7 @@ perimap = [
|
|||||||
('STM32L0.*:SYS:.*', 'syscfg_l0/SYSCFG'),
|
('STM32L0.*:SYS:.*', 'syscfg_l0/SYSCFG'),
|
||||||
('STM32L1.*:SYS:.*', 'syscfg_l1/SYSCFG'),
|
('STM32L1.*:SYS:.*', 'syscfg_l1/SYSCFG'),
|
||||||
('STM32G0.*:SYS:.*', 'syscfg_g0/SYSCFG'),
|
('STM32G0.*:SYS:.*', 'syscfg_g0/SYSCFG'),
|
||||||
|
('STM32G4.*:SYS:.*', 'syscfg_g4/SYSCFG'),
|
||||||
('STM32H7.*:SYS:.*', 'syscfg_h7/SYSCFG'),
|
('STM32H7.*:SYS:.*', 'syscfg_h7/SYSCFG'),
|
||||||
('STM32U5.*:SYS:.*', 'syscfg_u5/SYSCFG'),
|
('STM32U5.*:SYS:.*', 'syscfg_u5/SYSCFG'),
|
||||||
('STM32WB.*:SYS:.*', 'syscfg_wb/SYSCFG'),
|
('STM32WB.*:SYS:.*', 'syscfg_wb/SYSCFG'),
|
||||||
@ -180,6 +181,7 @@ perimap = [
|
|||||||
('.*:STM32L0_crs_v1_0', 'crs_l0/CRS'),
|
('.*:STM32L0_crs_v1_0', 'crs_l0/CRS'),
|
||||||
('.*SDMMC:sdmmc2_v1_0', 'sdmmc_v2/SDMMC'),
|
('.*SDMMC:sdmmc2_v1_0', 'sdmmc_v2/SDMMC'),
|
||||||
('.*:STM32G0_pwr_v1_0', 'pwr_g0/PWR'),
|
('.*:STM32G0_pwr_v1_0', 'pwr_g0/PWR'),
|
||||||
|
('.*:STM32G4_pwr_v1_0', 'pwr_g4/PWR'),
|
||||||
('STM32H7(42|43|53|50).*:STM32H7_pwr_v1_0', 'pwr_h7/PWR'),
|
('STM32H7(42|43|53|50).*:STM32H7_pwr_v1_0', 'pwr_h7/PWR'),
|
||||||
('.*:STM32H7_pwr_v1_0', 'pwr_h7smps/PWR'),
|
('.*:STM32H7_pwr_v1_0', 'pwr_h7smps/PWR'),
|
||||||
('.*:STM32F4_pwr_v1_0', 'pwr_f4/PWR'),
|
('.*:STM32F4_pwr_v1_0', 'pwr_f4/PWR'),
|
||||||
@ -1152,6 +1154,7 @@ def parse_rcc_regs():
|
|||||||
with open(f, 'r') as yaml_file:
|
with open(f, 'r') as yaml_file:
|
||||||
y = yaml.load(yaml_file)
|
y = yaml.load(yaml_file)
|
||||||
for (key, body) in y.items():
|
for (key, body) in y.items():
|
||||||
|
if 'SMENR' in key: continue
|
||||||
if key.startswith("fieldset/A") and key.endswith("ENR"):
|
if key.startswith("fieldset/A") and key.endswith("ENR"):
|
||||||
clock = removesuffix(key, "ENR")
|
clock = removesuffix(key, "ENR")
|
||||||
clock = removeprefix(clock, "fieldset/")
|
clock = removeprefix(clock, "fieldset/")
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user