From 338c78b77149bfb7633117fa021de29651bafae2 Mon Sep 17 00:00:00 2001 From: Jensenn Date: Mon, 25 Apr 2022 12:04:23 -0600 Subject: [PATCH] Add LCD register set from l100 device --- data/registers/lcd_v1.yaml | 1205 ++++++++++++++++++++++++++++++++++++ 1 file changed, 1205 insertions(+) create mode 100644 data/registers/lcd_v1.yaml diff --git a/data/registers/lcd_v1.yaml b/data/registers/lcd_v1.yaml new file mode 100644 index 0000000..b0eb90a --- /dev/null +++ b/data/registers/lcd_v1.yaml @@ -0,0 +1,1205 @@ +--- +block/LCD: + description: Liquid crystal display controller + items: + - name: CR + description: control register + byte_offset: 0 + fieldset: CR + - name: FCR + description: frame control register + byte_offset: 4 + fieldset: FCR + - name: SR + description: status register + byte_offset: 8 + fieldset: SR + - name: CLR + description: clear register + byte_offset: 12 + access: Write + fieldset: CLR + - name: RAM_COM0 + description: display memory + byte_offset: 20 + fieldset: RAM_COM0 + - name: RAM_COM1 + description: display memory + byte_offset: 28 + fieldset: RAM_COM1 + - name: RAM_COM2 + description: display memory + byte_offset: 36 + fieldset: RAM_COM2 + - name: RAM_COM3 + description: display memory + byte_offset: 44 + fieldset: RAM_COM3 + - name: RAM_COM4 + description: display memory + byte_offset: 52 + fieldset: RAM_COM4 + - name: RAM_COM5 + description: display memory + byte_offset: 60 + fieldset: RAM_COM5 + - name: RAM_COM6 + description: display memory + byte_offset: 68 + fieldset: RAM_COM6 + - name: RAM_COM7 + description: display memory + byte_offset: 76 + fieldset: RAM_COM7 +fieldset/CLR: + description: clear register + fields: + - name: SOFC + description: Start of frame flag clear + bit_offset: 1 + bit_size: 1 + - name: UDDC + description: Update display done clear + bit_offset: 3 + bit_size: 1 +fieldset/CR: + description: control register + fields: + - name: LCDEN + description: LCD controller enable + bit_offset: 0 + bit_size: 1 + - name: VSEL + description: Voltage source selection + bit_offset: 1 + bit_size: 1 + - name: DUTY + description: Duty selection + bit_offset: 2 + bit_size: 3 + - name: BIAS + description: Bias selector + bit_offset: 5 + bit_size: 2 + - name: MUX_SEG + description: Mux segment enable + bit_offset: 7 + bit_size: 1 +fieldset/FCR: + description: frame control register + fields: + - name: HD + description: High drive enable + bit_offset: 0 + bit_size: 1 + - name: SOFIE + description: Start of frame interrupt enable + bit_offset: 1 + bit_size: 1 + - name: UDDIE + description: Update display done interrupt enable + bit_offset: 3 + bit_size: 1 + - name: PON + description: Pulse ON duration + bit_offset: 4 + bit_size: 3 + - name: DEAD + description: Dead time duration + bit_offset: 7 + bit_size: 3 + - name: CC + description: Contrast control + bit_offset: 10 + bit_size: 3 + - name: BLINKF + description: Blink frequency selection + bit_offset: 13 + bit_size: 3 + - name: BLINK + description: Blink mode selection + bit_offset: 16 + bit_size: 2 + - name: DIV + description: DIV clock divider + bit_offset: 18 + bit_size: 4 + - name: PS + description: PS 16-bit prescaler + bit_offset: 22 + bit_size: 4 +fieldset/RAM_COM0: + description: display memory + fields: + - name: S00 + description: S00 + bit_offset: 0 + bit_size: 1 + - name: S01 + description: S01 + bit_offset: 1 + bit_size: 1 + - name: S02 + description: S02 + bit_offset: 2 + bit_size: 1 + - name: S03 + description: S03 + bit_offset: 3 + bit_size: 1 + - name: S04 + description: S04 + bit_offset: 4 + bit_size: 1 + - name: S05 + description: S05 + bit_offset: 5 + bit_size: 1 + - name: S06 + description: S06 + bit_offset: 6 + bit_size: 1 + - name: S07 + description: S07 + bit_offset: 7 + bit_size: 1 + - name: S08 + description: S08 + bit_offset: 8 + bit_size: 1 + - name: S09 + description: S09 + bit_offset: 9 + bit_size: 1 + - name: S10 + description: S10 + bit_offset: 10 + bit_size: 1 + - name: S11 + description: S11 + bit_offset: 11 + bit_size: 1 + - name: S12 + description: S12 + bit_offset: 12 + bit_size: 1 + - name: S13 + description: S13 + bit_offset: 13 + bit_size: 1 + - name: S14 + description: S14 + bit_offset: 14 + bit_size: 1 + - name: S15 + description: S15 + bit_offset: 15 + bit_size: 1 + - name: S16 + description: S16 + bit_offset: 16 + bit_size: 1 + - name: S17 + description: S17 + bit_offset: 17 + bit_size: 1 + - name: S18 + description: S18 + bit_offset: 18 + bit_size: 1 + - name: S19 + description: S19 + bit_offset: 19 + bit_size: 1 + - name: S20 + description: S20 + bit_offset: 20 + bit_size: 1 + - name: S21 + description: S21 + bit_offset: 21 + bit_size: 1 + - name: S22 + description: S22 + bit_offset: 22 + bit_size: 1 + - name: S23 + description: S23 + bit_offset: 23 + bit_size: 1 + - name: S24 + description: S24 + bit_offset: 24 + bit_size: 1 + - name: S25 + description: S25 + bit_offset: 25 + bit_size: 1 + - name: S26 + description: S26 + bit_offset: 26 + bit_size: 1 + - name: S27 + description: S27 + bit_offset: 27 + bit_size: 1 + - name: S28 + description: S28 + bit_offset: 28 + bit_size: 1 + - name: S29 + description: S29 + bit_offset: 29 + bit_size: 1 + - name: S30 + description: S30 + bit_offset: 30 + bit_size: 1 + - name: S31 + description: S31 + bit_offset: 31 + bit_size: 1 +fieldset/RAM_COM1: + description: display memory + fields: + - name: S00 + description: S00 + bit_offset: 0 + bit_size: 1 + - name: S01 + description: S01 + bit_offset: 1 + bit_size: 1 + - name: S02 + description: S02 + bit_offset: 2 + bit_size: 1 + - name: S03 + description: S03 + bit_offset: 3 + bit_size: 1 + - name: S04 + description: S04 + bit_offset: 4 + bit_size: 1 + - name: S05 + description: S05 + bit_offset: 5 + bit_size: 1 + - name: S06 + description: S06 + bit_offset: 6 + bit_size: 1 + - name: S07 + description: S07 + bit_offset: 7 + bit_size: 1 + - name: S08 + description: S08 + bit_offset: 8 + bit_size: 1 + - name: S09 + description: S09 + bit_offset: 9 + bit_size: 1 + - name: S10 + description: S10 + bit_offset: 10 + bit_size: 1 + - name: S11 + description: S11 + bit_offset: 11 + bit_size: 1 + - name: S12 + description: S12 + bit_offset: 12 + bit_size: 1 + - name: S13 + description: S13 + bit_offset: 13 + bit_size: 1 + - name: S14 + description: S14 + bit_offset: 14 + bit_size: 1 + - name: S15 + description: S15 + bit_offset: 15 + bit_size: 1 + - name: S16 + description: S16 + bit_offset: 16 + bit_size: 1 + - name: S17 + description: S17 + bit_offset: 17 + bit_size: 1 + - name: S18 + description: S18 + bit_offset: 18 + bit_size: 1 + - name: S19 + description: S19 + bit_offset: 19 + bit_size: 1 + - name: S20 + description: S20 + bit_offset: 20 + bit_size: 1 + - name: S21 + description: S21 + bit_offset: 21 + bit_size: 1 + - name: S22 + description: S22 + bit_offset: 22 + bit_size: 1 + - name: S23 + description: S23 + bit_offset: 23 + bit_size: 1 + - name: S24 + description: S24 + bit_offset: 24 + bit_size: 1 + - name: S25 + description: S25 + bit_offset: 25 + bit_size: 1 + - name: S26 + description: S26 + bit_offset: 26 + bit_size: 1 + - name: S27 + description: S27 + bit_offset: 27 + bit_size: 1 + - name: S28 + description: S28 + bit_offset: 28 + bit_size: 1 + - name: S29 + description: S29 + bit_offset: 29 + bit_size: 1 + - name: S30 + description: S30 + bit_offset: 30 + bit_size: 1 + - name: S31 + description: S31 + bit_offset: 31 + bit_size: 1 +fieldset/RAM_COM2: + description: display memory + fields: + - name: S00 + description: S00 + bit_offset: 0 + bit_size: 1 + - name: S01 + description: S01 + bit_offset: 1 + bit_size: 1 + - name: S02 + description: S02 + bit_offset: 2 + bit_size: 1 + - name: S03 + description: S03 + bit_offset: 3 + bit_size: 1 + - name: S04 + description: S04 + bit_offset: 4 + bit_size: 1 + - name: S05 + description: S05 + bit_offset: 5 + bit_size: 1 + - name: S06 + description: S06 + bit_offset: 6 + bit_size: 1 + - name: S07 + description: S07 + bit_offset: 7 + bit_size: 1 + - name: S08 + description: S08 + bit_offset: 8 + bit_size: 1 + - name: S09 + description: S09 + bit_offset: 9 + bit_size: 1 + - name: S10 + description: S10 + bit_offset: 10 + bit_size: 1 + - name: S11 + description: S11 + bit_offset: 11 + bit_size: 1 + - name: S12 + description: S12 + bit_offset: 12 + bit_size: 1 + - name: S13 + description: S13 + bit_offset: 13 + bit_size: 1 + - name: S14 + description: S14 + bit_offset: 14 + bit_size: 1 + - name: S15 + description: S15 + bit_offset: 15 + bit_size: 1 + - name: S16 + description: S16 + bit_offset: 16 + bit_size: 1 + - name: S17 + description: S17 + bit_offset: 17 + bit_size: 1 + - name: S18 + description: S18 + bit_offset: 18 + bit_size: 1 + - name: S19 + description: S19 + bit_offset: 19 + bit_size: 1 + - name: S20 + description: S20 + bit_offset: 20 + bit_size: 1 + - name: S21 + description: S21 + bit_offset: 21 + bit_size: 1 + - name: S22 + description: S22 + bit_offset: 22 + bit_size: 1 + - name: S23 + description: S23 + bit_offset: 23 + bit_size: 1 + - name: S24 + description: S24 + bit_offset: 24 + bit_size: 1 + - name: S25 + description: S25 + bit_offset: 25 + bit_size: 1 + - name: S26 + description: S26 + bit_offset: 26 + bit_size: 1 + - name: S27 + description: S27 + bit_offset: 27 + bit_size: 1 + - name: S28 + description: S28 + bit_offset: 28 + bit_size: 1 + - name: S29 + description: S29 + bit_offset: 29 + bit_size: 1 + - name: S30 + description: S30 + bit_offset: 30 + bit_size: 1 + - name: S31 + description: S31 + bit_offset: 31 + bit_size: 1 +fieldset/RAM_COM3: + description: display memory + fields: + - name: S00 + description: S00 + bit_offset: 0 + bit_size: 1 + - name: S01 + description: S01 + bit_offset: 1 + bit_size: 1 + - name: S02 + description: S02 + bit_offset: 2 + bit_size: 1 + - name: S03 + description: S03 + bit_offset: 3 + bit_size: 1 + - name: S04 + description: S04 + bit_offset: 4 + bit_size: 1 + - name: S05 + description: S05 + bit_offset: 5 + bit_size: 1 + - name: S06 + description: S06 + bit_offset: 6 + bit_size: 1 + - name: S07 + description: S07 + bit_offset: 7 + bit_size: 1 + - name: S08 + description: S08 + bit_offset: 8 + bit_size: 1 + - name: S09 + description: S09 + bit_offset: 9 + bit_size: 1 + - name: S10 + description: S10 + bit_offset: 10 + bit_size: 1 + - name: S11 + description: S11 + bit_offset: 11 + bit_size: 1 + - name: S12 + description: S12 + bit_offset: 12 + bit_size: 1 + - name: S13 + description: S13 + bit_offset: 13 + bit_size: 1 + - name: S14 + description: S14 + bit_offset: 14 + bit_size: 1 + - name: S15 + description: S15 + bit_offset: 15 + bit_size: 1 + - name: S16 + description: S16 + bit_offset: 16 + bit_size: 1 + - name: S17 + description: S17 + bit_offset: 17 + bit_size: 1 + - name: S18 + description: S18 + bit_offset: 18 + bit_size: 1 + - name: S19 + description: S19 + bit_offset: 19 + bit_size: 1 + - name: S20 + description: S20 + bit_offset: 20 + bit_size: 1 + - name: S21 + description: S21 + bit_offset: 21 + bit_size: 1 + - name: S22 + description: S22 + bit_offset: 22 + bit_size: 1 + - name: S23 + description: S23 + bit_offset: 23 + bit_size: 1 + - name: S24 + description: S24 + bit_offset: 24 + bit_size: 1 + - name: S25 + description: S25 + bit_offset: 25 + bit_size: 1 + - name: S26 + description: S26 + bit_offset: 26 + bit_size: 1 + - name: S27 + description: S27 + bit_offset: 27 + bit_size: 1 + - name: S28 + description: S28 + bit_offset: 28 + bit_size: 1 + - name: S29 + description: S29 + bit_offset: 29 + bit_size: 1 + - name: S30 + description: S30 + bit_offset: 30 + bit_size: 1 + - name: S31 + description: S31 + bit_offset: 31 + bit_size: 1 +fieldset/RAM_COM4: + description: display memory + fields: + - name: S00 + description: S00 + bit_offset: 0 + bit_size: 1 + - name: S01 + description: S01 + bit_offset: 1 + bit_size: 1 + - name: S02 + description: S02 + bit_offset: 2 + bit_size: 1 + - name: S03 + description: S03 + bit_offset: 3 + bit_size: 1 + - name: S04 + description: S04 + bit_offset: 4 + bit_size: 1 + - name: S05 + description: S05 + bit_offset: 5 + bit_size: 1 + - name: S06 + description: S06 + bit_offset: 6 + bit_size: 1 + - name: S07 + description: S07 + bit_offset: 7 + bit_size: 1 + - name: S08 + description: S08 + bit_offset: 8 + bit_size: 1 + - name: S09 + description: S09 + bit_offset: 9 + bit_size: 1 + - name: S10 + description: S10 + bit_offset: 10 + bit_size: 1 + - name: S11 + description: S11 + bit_offset: 11 + bit_size: 1 + - name: S12 + description: S12 + bit_offset: 12 + bit_size: 1 + - name: S13 + description: S13 + bit_offset: 13 + bit_size: 1 + - name: S14 + description: S14 + bit_offset: 14 + bit_size: 1 + - name: S15 + description: S15 + bit_offset: 15 + bit_size: 1 + - name: S16 + description: S16 + bit_offset: 16 + bit_size: 1 + - name: S17 + description: S17 + bit_offset: 17 + bit_size: 1 + - name: S18 + description: S18 + bit_offset: 18 + bit_size: 1 + - name: S19 + description: S19 + bit_offset: 19 + bit_size: 1 + - name: S20 + description: S20 + bit_offset: 20 + bit_size: 1 + - name: S21 + description: S21 + bit_offset: 21 + bit_size: 1 + - name: S22 + description: S22 + bit_offset: 22 + bit_size: 1 + - name: S23 + description: S23 + bit_offset: 23 + bit_size: 1 + - name: S24 + description: S24 + bit_offset: 24 + bit_size: 1 + - name: S25 + description: S25 + bit_offset: 25 + bit_size: 1 + - name: S26 + description: S26 + bit_offset: 26 + bit_size: 1 + - name: S27 + description: S27 + bit_offset: 27 + bit_size: 1 + - name: S28 + description: S28 + bit_offset: 28 + bit_size: 1 + - name: S29 + description: S29 + bit_offset: 29 + bit_size: 1 + - name: S30 + description: S30 + bit_offset: 30 + bit_size: 1 + - name: S31 + description: S31 + bit_offset: 31 + bit_size: 1 +fieldset/RAM_COM5: + description: display memory + fields: + - name: S00 + description: S00 + bit_offset: 0 + bit_size: 1 + - name: S01 + description: S01 + bit_offset: 1 + bit_size: 1 + - name: S02 + description: S02 + bit_offset: 2 + bit_size: 1 + - name: S03 + description: S03 + bit_offset: 3 + bit_size: 1 + - name: S04 + description: S04 + bit_offset: 4 + bit_size: 1 + - name: S05 + description: S05 + bit_offset: 5 + bit_size: 1 + - name: S06 + description: S06 + bit_offset: 6 + bit_size: 1 + - name: S07 + description: S07 + bit_offset: 7 + bit_size: 1 + - name: S08 + description: S08 + bit_offset: 8 + bit_size: 1 + - name: S09 + description: S09 + bit_offset: 9 + bit_size: 1 + - name: S10 + description: S10 + bit_offset: 10 + bit_size: 1 + - name: S11 + description: S11 + bit_offset: 11 + bit_size: 1 + - name: S12 + description: S12 + bit_offset: 12 + bit_size: 1 + - name: S13 + description: S13 + bit_offset: 13 + bit_size: 1 + - name: S14 + description: S14 + bit_offset: 14 + bit_size: 1 + - name: S15 + description: S15 + bit_offset: 15 + bit_size: 1 + - name: S16 + description: S16 + bit_offset: 16 + bit_size: 1 + - name: S17 + description: S17 + bit_offset: 17 + bit_size: 1 + - name: S18 + description: S18 + bit_offset: 18 + bit_size: 1 + - name: S19 + description: S19 + bit_offset: 19 + bit_size: 1 + - name: S20 + description: S20 + bit_offset: 20 + bit_size: 1 + - name: S21 + description: S21 + bit_offset: 21 + bit_size: 1 + - name: S22 + description: S22 + bit_offset: 22 + bit_size: 1 + - name: S23 + description: S23 + bit_offset: 23 + bit_size: 1 + - name: S24 + description: S24 + bit_offset: 24 + bit_size: 1 + - name: S25 + description: S25 + bit_offset: 25 + bit_size: 1 + - name: S26 + description: S26 + bit_offset: 26 + bit_size: 1 + - name: S27 + description: S27 + bit_offset: 27 + bit_size: 1 + - name: S28 + description: S28 + bit_offset: 28 + bit_size: 1 + - name: S29 + description: S29 + bit_offset: 29 + bit_size: 1 + - name: S30 + description: S30 + bit_offset: 30 + bit_size: 1 + - name: S31 + description: S31 + bit_offset: 31 + bit_size: 1 +fieldset/RAM_COM6: + description: display memory + fields: + - name: S00 + description: S00 + bit_offset: 0 + bit_size: 1 + - name: S01 + description: S01 + bit_offset: 1 + bit_size: 1 + - name: S02 + description: S02 + bit_offset: 2 + bit_size: 1 + - name: S03 + description: S03 + bit_offset: 3 + bit_size: 1 + - name: S04 + description: S04 + bit_offset: 4 + bit_size: 1 + - name: S05 + description: S05 + bit_offset: 5 + bit_size: 1 + - name: S06 + description: S06 + bit_offset: 6 + bit_size: 1 + - name: S07 + description: S07 + bit_offset: 7 + bit_size: 1 + - name: S08 + description: S08 + bit_offset: 8 + bit_size: 1 + - name: S09 + description: S09 + bit_offset: 9 + bit_size: 1 + - name: S10 + description: S10 + bit_offset: 10 + bit_size: 1 + - name: S11 + description: S11 + bit_offset: 11 + bit_size: 1 + - name: S12 + description: S12 + bit_offset: 12 + bit_size: 1 + - name: S13 + description: S13 + bit_offset: 13 + bit_size: 1 + - name: S14 + description: S14 + bit_offset: 14 + bit_size: 1 + - name: S15 + description: S15 + bit_offset: 15 + bit_size: 1 + - name: S16 + description: S16 + bit_offset: 16 + bit_size: 1 + - name: S17 + description: S17 + bit_offset: 17 + bit_size: 1 + - name: S18 + description: S18 + bit_offset: 18 + bit_size: 1 + - name: S19 + description: S19 + bit_offset: 19 + bit_size: 1 + - name: S20 + description: S20 + bit_offset: 20 + bit_size: 1 + - name: S21 + description: S21 + bit_offset: 21 + bit_size: 1 + - name: S22 + description: S22 + bit_offset: 22 + bit_size: 1 + - name: S23 + description: S23 + bit_offset: 23 + bit_size: 1 + - name: S24 + description: S24 + bit_offset: 24 + bit_size: 1 + - name: S25 + description: S25 + bit_offset: 25 + bit_size: 1 + - name: S26 + description: S26 + bit_offset: 26 + bit_size: 1 + - name: S27 + description: S27 + bit_offset: 27 + bit_size: 1 + - name: S28 + description: S28 + bit_offset: 28 + bit_size: 1 + - name: S29 + description: S29 + bit_offset: 29 + bit_size: 1 + - name: S30 + description: S30 + bit_offset: 30 + bit_size: 1 + - name: S31 + description: S31 + bit_offset: 31 + bit_size: 1 +fieldset/RAM_COM7: + description: display memory + fields: + - name: S00 + description: S00 + bit_offset: 0 + bit_size: 1 + - name: S01 + description: S01 + bit_offset: 1 + bit_size: 1 + - name: S02 + description: S02 + bit_offset: 2 + bit_size: 1 + - name: S03 + description: S03 + bit_offset: 3 + bit_size: 1 + - name: S04 + description: S04 + bit_offset: 4 + bit_size: 1 + - name: S05 + description: S05 + bit_offset: 5 + bit_size: 1 + - name: S06 + description: S06 + bit_offset: 6 + bit_size: 1 + - name: S07 + description: S07 + bit_offset: 7 + bit_size: 1 + - name: S08 + description: S08 + bit_offset: 8 + bit_size: 1 + - name: S09 + description: S09 + bit_offset: 9 + bit_size: 1 + - name: S10 + description: S10 + bit_offset: 10 + bit_size: 1 + - name: S11 + description: S11 + bit_offset: 11 + bit_size: 1 + - name: S12 + description: S12 + bit_offset: 12 + bit_size: 1 + - name: S13 + description: S13 + bit_offset: 13 + bit_size: 1 + - name: S14 + description: S14 + bit_offset: 14 + bit_size: 1 + - name: S15 + description: S15 + bit_offset: 15 + bit_size: 1 + - name: S16 + description: S16 + bit_offset: 16 + bit_size: 1 + - name: S17 + description: S17 + bit_offset: 17 + bit_size: 1 + - name: S18 + description: S18 + bit_offset: 18 + bit_size: 1 + - name: S19 + description: S19 + bit_offset: 19 + bit_size: 1 + - name: S20 + description: S20 + bit_offset: 20 + bit_size: 1 + - name: S21 + description: S21 + bit_offset: 21 + bit_size: 1 + - name: S22 + description: S22 + bit_offset: 22 + bit_size: 1 + - name: S23 + description: S23 + bit_offset: 23 + bit_size: 1 + - name: S24 + description: S24 + bit_offset: 24 + bit_size: 1 + - name: S25 + description: S25 + bit_offset: 25 + bit_size: 1 + - name: S26 + description: S26 + bit_offset: 26 + bit_size: 1 + - name: S27 + description: S27 + bit_offset: 27 + bit_size: 1 + - name: S28 + description: S28 + bit_offset: 28 + bit_size: 1 + - name: S29 + description: S29 + bit_offset: 29 + bit_size: 1 + - name: S30 + description: S30 + bit_offset: 30 + bit_size: 1 + - name: S31 + description: S31 + bit_offset: 31 + bit_size: 1 +fieldset/SR: + description: status register + fields: + - name: ENS + description: LCD enabled status + bit_offset: 0 + bit_size: 1 + - name: SOF + description: Start of frame flag + bit_offset: 1 + bit_size: 1 + - name: UDR + description: Update display request + bit_offset: 2 + bit_size: 1 + - name: UDD + description: Update Display Done + bit_offset: 3 + bit_size: 1 + - name: RDY + description: Ready flag + bit_offset: 4 + bit_size: 1 + - name: FCRSF + description: LCD Frame Control Register Synchronization flag + bit_offset: 5 + bit_size: 1