From 2c7422ab76ab5ebecb3b50bb639d02ff25b72d5d Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Mon, 16 Aug 2021 14:59:16 -0400 Subject: [PATCH 1/2] Special-case the H7 EXTI reg layout. --- parse.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/parse.py b/parse.py index 944787b..dc8cf9f 100755 --- a/parse.py +++ b/parse.py @@ -885,6 +885,8 @@ def parse_chips(): if addr := defines.get('EXTI_BASE'): if chip_name.startswith("STM32WB55"): block = 'exti_wb55/EXTI' + elif chip_name.startswith("STM32H7"): + block = 'exti_h7/EXTI' else: block = 'exti_v1/EXTI' From 541091cded417e0edd212f73c78bc74e18f62d21 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Mon, 16 Aug 2021 15:12:17 -0400 Subject: [PATCH 2/2] Include the reg block. --- data/registers/exti_h7.yaml | 140 ++++++++++++++++++++++++++++++++++++ 1 file changed, 140 insertions(+) create mode 100644 data/registers/exti_h7.yaml diff --git a/data/registers/exti_h7.yaml b/data/registers/exti_h7.yaml new file mode 100644 index 0000000..61c8663 --- /dev/null +++ b/data/registers/exti_h7.yaml @@ -0,0 +1,140 @@ +--- +block/EXTI: + description: External interrupt/event controller + items: + - name: IMR + description: Interrupt mask register (EXTI_IMR) + byte_offset: 128 + reset_value: 0 + fieldset: IMR + - name: EMR + description: Event mask register (EXTI_EMR) + byte_offset: 132 + reset_value: 0 + fieldset: EMR + - name: RTSR + description: Rising Trigger selection register (EXTI_RTSR) + byte_offset: 0 + reset_value: 0 + fieldset: RTSR + - name: FTSR + description: Falling Trigger selection register (EXTI_FTSR) + byte_offset: 4 + reset_value: 0 + fieldset: FTSR + - name: SWIER + description: Software interrupt event register (EXTI_SWIER) + byte_offset: 8 + reset_value: 0 + fieldset: SWIER + - name: PR + description: Pending register (EXTI_PR) + byte_offset: 136 + reset_value: 0 + fieldset: PR +fieldset/EMR: + description: Event mask register (EXTI_EMR) + fields: + - name: MR + description: Event Mask on line 0 + bit_offset: 0 + bit_size: 1 + array: + len: 23 + stride: 1 + enum: MR +fieldset/FTSR: + description: Falling Trigger selection register (EXTI_FTSR) + fields: + - name: TR + description: Falling trigger event configuration of line 0 + bit_offset: 0 + bit_size: 1 + array: + len: 23 + stride: 1 + enum: TR +fieldset/IMR: + description: Interrupt mask register (EXTI_IMR) + fields: + - name: MR + description: Interrupt Mask on line 0 + bit_offset: 0 + bit_size: 1 + array: + len: 23 + stride: 1 + enum: MR +fieldset/PR: + description: Pending register (EXTI_PR) + fields: + - name: PR + description: Pending bit 0 + bit_offset: 0 + bit_size: 1 + array: + len: 23 + stride: 1 + enum_read: PRR + enum_write: PRW +fieldset/RTSR: + description: Rising Trigger selection register (EXTI_RTSR) + fields: + - name: TR + description: Rising trigger event configuration of line 0 + bit_offset: 0 + bit_size: 1 + array: + len: 23 + stride: 1 + enum: TR +fieldset/SWIER: + description: Software interrupt event register (EXTI_SWIER) + fields: + - name: SWIER + description: Software Interrupt on line 0 + bit_offset: 0 + bit_size: 1 + array: + len: 23 + stride: 1 + enum_write: SWIERW +enum/MR: + bit_size: 1 + variants: + - name: Masked + description: Interrupt request line is masked + value: 0 + - name: Unmasked + description: Interrupt request line is unmasked + value: 1 +enum/TR: + bit_size: 1 + variants: + - name: Disabled + description: Falling edge trigger is disabled + value: 0 + - name: Enabled + description: Falling edge trigger is enabled + value: 1 +enum/PRR: + bit_size: 1 + variants: + - name: NotPending + description: No trigger request occurred + value: 0 + - name: Pending + description: Selected trigger request occurred + value: 1 +enum/PRW: + bit_size: 1 + variants: + - name: Clear + description: Clears pending bit + value: 1 +enum/SWIERW: + bit_size: 1 + variants: + - name: Pend + description: Generates an interrupt request + value: 1