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Add SPI modules for F1 family

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This commit is contained in:
Nicolas Viennot 2022-03-14 21:46:02 -04:00
parent cf354c22e1
commit 2cd7632fc9
1 changed files with 1 additions and 0 deletions
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stm32data/__main__.py
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@ -178,6 +178,7 @@ perimap = [
('STM32WL5.*:RCC:.*', ('rcc', 'wl5', 'RCC')),
('STM32WLE.*:RCC:.*', ('rcc', 'wle', 'RCC')),
('STM32F1.*:SPI[1234]:.*', ('spi', 'f1', 'SPI')),
('STM32F3.*:SPI[1234]:.*', ('spi', 'v2', 'SPI')),
('STM32F1.*:AFIO:.*', ('afio', 'f1', 'AFIO')),