diff --git a/data/registers/rcc_f1.yaml b/data/registers/rcc_f1.yaml
index cc34396..7bd3c81 100644
--- a/data/registers/rcc_f1.yaml
+++ b/data/registers/rcc_f1.yaml
@@ -81,7 +81,7 @@ fieldset/AHBENR:
       description: SDIO clock enable
       bit_offset: 10
       bit_size: 1
-    - name: OTGFSEN
+    - name: USB_OTG_FSEN
       description: USB OTG FS clock enable
       bit_offset: 12
       bit_size: 1
@@ -100,7 +100,7 @@ fieldset/AHBENR:
 fieldset/AHBRSTR:
   description: AHB peripheral clock reset register (RCC_AHBRSTR)
   fields:
-    - name: OTGFSRST
+    - name: USB_OTG_FSRST
       description: USB OTG FS reset
       bit_offset: 12
       bit_size: 1
diff --git a/data/registers/rcc_f2.yaml b/data/registers/rcc_f2.yaml
index aae064d..24e9588 100644
--- a/data/registers/rcc_f2.yaml
+++ b/data/registers/rcc_f2.yaml
@@ -165,11 +165,11 @@ fieldset/AHB1ENR:
       description: Ethernet PTP clock enable
       bit_offset: 28
       bit_size: 1
-    - name: OTGHSEN
+    - name: USB_OTG_HSEN
       description: USB OTG HS clock enable
       bit_offset: 29
       bit_size: 1
-    - name: OTGHSULPIEN
+    - name: USB_OTG_HSULPIEN
       description: USB OTG HSULPI clock enable
       bit_offset: 30
       bit_size: 1
@@ -256,11 +256,11 @@ fieldset/AHB1LPENR:
       description: Ethernet PTP clock enable during Sleep mode
       bit_offset: 28
       bit_size: 1
-    - name: OTGHSLPEN
+    - name: USB_OTG_HSLPEN
       description: USB OTG HS clock enable during Sleep mode
       bit_offset: 29
       bit_size: 1
-    - name: OTGHSULPILPEN
+    - name: USB_OTG_HSULPILPEN
       description: USB OTG HS ULPI clock enable during Sleep mode
       bit_offset: 30
       bit_size: 1
@@ -319,7 +319,7 @@ fieldset/AHB1RSTR:
       description: Ethernet MAC reset
       bit_offset: 25
       bit_size: 1
-    - name: OTGHSRST
+    - name: USB_OTG_HSRST
       description: USB OTG HS module reset
       bit_offset: 29
       bit_size: 1
@@ -342,7 +342,7 @@ fieldset/AHB2ENR:
       description: Random number generator clock enable
       bit_offset: 6
       bit_size: 1
-    - name: OTGFSEN
+    - name: USB_OTG_FSEN
       description: USB OTG FS clock enable
       bit_offset: 7
       bit_size: 1
@@ -365,7 +365,7 @@ fieldset/AHB2LPENR:
       description: Random number generator clock enable during Sleep mode
       bit_offset: 6
       bit_size: 1
-    - name: OTGFSLPEN
+    - name: USB_OTG_FSLPEN
       description: USB OTG FS clock enable during Sleep mode
       bit_offset: 7
       bit_size: 1
@@ -388,7 +388,7 @@ fieldset/AHB2RSTR:
       description: Random number generator module reset
       bit_offset: 6
       bit_size: 1
-    - name: OTGFSRST
+    - name: USB_OTG_FSRST
       description: USB OTG FS module reset
       bit_offset: 7
       bit_size: 1
diff --git a/data/registers/rcc_f4.yaml b/data/registers/rcc_f4.yaml
index 49e0bd0..7be0093 100644
--- a/data/registers/rcc_f4.yaml
+++ b/data/registers/rcc_f4.yaml
@@ -181,11 +181,11 @@ fieldset/AHB1ENR:
       description: Ethernet PTP clock enable
       bit_offset: 28
       bit_size: 1
-    - name: OTGHSEN
+    - name: USB_OTG_HSEN
       description: USB OTG HS clock enable
       bit_offset: 29
       bit_size: 1
-    - name: OTGHSULPIEN
+    - name: USB_OTG_HSULPIEN
       description: USB OTG HSULPI clock enable
       bit_offset: 30
       bit_size: 1
@@ -288,11 +288,11 @@ fieldset/AHB1LPENR:
       description: Ethernet PTP clock enable during Sleep mode
       bit_offset: 28
       bit_size: 1
-    - name: OTGHSLPEN
+    - name: USB_OTG_HSLPEN
       description: USB OTG HS clock enable during Sleep mode
       bit_offset: 29
       bit_size: 1
-    - name: OTGHSULPILPEN
+    - name: USB_OTG_HSULPILPEN
       description: USB OTG HS ULPI clock enable during Sleep mode
       bit_offset: 30
       bit_size: 1
@@ -371,7 +371,7 @@ fieldset/AHB1RSTR:
       description: Ethernet MAC reset
       bit_offset: 25
       bit_size: 1
-    - name: OTGHSRST
+    - name: USB_OTG_HSRST
       description: USB OTG HS module reset
       bit_offset: 29
       bit_size: 1
@@ -390,7 +390,7 @@ fieldset/AHB1RSTR:
 fieldset/AHB2ENR:
   description: AHB2 peripheral clock enable register
   fields:
-    - name: OTGFSEN
+    - name: USB_OTG_FSEN
       description: USB OTG FS clock enable
       bit_offset: 7
       bit_size: 1
@@ -413,7 +413,7 @@ fieldset/AHB2ENR:
 fieldset/AHB2LPENR:
   description: AHB2 peripheral clock enable in low power mode register
   fields:
-    - name: OTGFSLPEN
+    - name: USB_OTG_FSLPEN
       description: USB OTG FS clock enable during Sleep mode
       bit_offset: 7
       bit_size: 1
@@ -444,7 +444,7 @@ fieldset/AHB2LPENR:
 fieldset/AHB2RSTR:
   description: AHB2 peripheral reset register
   fields:
-    - name: OTGFSRST
+    - name: USB_OTG_FSRST
       description: USB OTG FS module reset
       bit_offset: 7
       bit_size: 1
diff --git a/data/registers/rcc_l4.yaml b/data/registers/rcc_l4.yaml
index 30da215..cc9568e 100644
--- a/data/registers/rcc_l4.yaml
+++ b/data/registers/rcc_l4.yaml
@@ -280,7 +280,7 @@ fieldset/AHB2ENR:
       description: IO port I clock enable
       bit_offset: 8
       bit_size: 1
-    - name: OTGFSEN
+    - name: USB_OTG_FSEN
       description: OTG full speed clock enable
       bit_offset: 12
       bit_size: 1
@@ -351,7 +351,7 @@ fieldset/AHB2RSTR:
       description: IO port I reset
       bit_offset: 8
       bit_size: 1
-    - name: OTGFSRST
+    - name: USB_OTG_FSRST
       description: USB OTG FS reset
       bit_offset: 12
       bit_size: 1
@@ -430,7 +430,7 @@ fieldset/AHB2SMENR:
       description: SRAM2 interface clocks enable during Sleep and Stop modes
       bit_offset: 10
       bit_size: 1
-    - name: OTGFSSMEN
+    - name: USB_OTG_FSSMEN
       description: OTG full speed clocks enable during Sleep and Stop modes
       bit_offset: 12
       bit_size: 1
diff --git a/data/registers/rcc_u5.yaml b/data/registers/rcc_u5.yaml
index dec1256..acdf0a3 100644
--- a/data/registers/rcc_u5.yaml
+++ b/data/registers/rcc_u5.yaml
@@ -406,7 +406,7 @@ fieldset/AHB2ENR1:
       description: "DCMI and PSSI clock enable\r Set and cleared by software."
       bit_offset: 12
       bit_size: 1
-    - name: OTGEN
+    - name: USB_OTG_FSEN
       description: "OTG_FS clock enable\r Set and cleared by software."
       bit_offset: 14
       bit_size: 1
@@ -520,7 +520,7 @@ fieldset/AHB2RSTR1:
       description: "DCMI and PSSI reset\r Set and cleared by software."
       bit_offset: 12
       bit_size: 1
-    - name: OTGRST
+    - name: USB_OTG_FSRST
       description: "OTG_FS reset\r Set and cleared by software."
       bit_offset: 14
       bit_size: 1
@@ -626,7 +626,7 @@ fieldset/AHB2SMENR1:
       description: "DCMI and PSSI clocks enable during Sleep and Stop modes\r Set and cleared by software."
       bit_offset: 12
       bit_size: 1
-    - name: OTGSMEN
+    - name: USB_OTG_FSSMEN
       description: "OTG_FS clocks enable during Sleep and Stop modes\r Set and cleared by software."
       bit_offset: 14
       bit_size: 1